JPH09134381A - Device for dividing operation method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce redivision and the repetition of design change and to improve design efficiency by executing division into a part realized by means of a software and a part realized by means of a hardware based on previously prepared basic circuit information. SOLUTION: In a basic circuit analizing part 102, the kind and number of arithmetic equipments added in the basic circuit 101 which is previously prepared by a designer and information, etc., of inter-arithmetic equipment connection are analized. Then, an operation method dividing part 104 divides the operation method 103 into the part realized by the software and the part realized by the hardware based on basic circuit information which is analized by the basic circuit analizing part 102 and an interface adding part 105 adds an interface for delivery between the software part and the hardware part to the software and the hardware parts. By the processing, a software method 106 realized by the software and a hardware method 107 reaslized by the hardware are generated so as to stored in an external storage device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an operation specification dividing device, and more particularly, it is necessary to re-execute the specification of the entire system when it is divided into a part realized by software and a part realized by hardware, and design change. The present invention relates to an operation specification dividing device capable of reducing repetition.

[0002]

2. Description of the Related Art In order to realize a system satisfying predetermined requirements, the system is constructed by appropriately constructing hardware, or by creating software and executing it by a CPU or the like. Can be realized.

However, in general, when it is realized by hardware, the processing speed can be relatively increased, but the required area becomes large and the cost increases. On the other hand, when it is realized by software, generally, the required area and the cost can be reduced, but the processing speed is reduced.

Therefore, in the design and development of the system, the system to be realized is divided into a part to be realized by hardware and a part to be realized by software as necessary, and the design and development should be carried out so as to meet predetermined requirements. Often done. In order to realize this division, it has been conventionally practiced to use a language that describes a behavioral specification to be realized, which is a behavioral description, and to divide the behavioral specification using the behavioral description.

FIG. 7 is a flow chart showing a general system development and design process. First, in the software / hardware dividing step S1, the operation specification is divided into a part realized by hardware and a part realized by software in consideration of a predetermined request, particularly timing and circuit scale.

Next, in the estimation step S2, a rough estimation of the hardware amount of the portion realized by the hardware in the software / hardware division step S1 is performed. For example, it is performed by checking the number of additions and multiplications from the behavioral description of the part realized by hardware.

Next, in the judgment step S3, the amount of hardware estimated in the estimation step S2 is judged. If the determination does not satisfy the desired request, the process returns to step S1 and the operation specification is divided into a part to be realized by hardware and a part to be realized by software.

Next, in the logic synthesis step S4, logic synthesis is performed on the hardware portion estimated in the estimation step S2 to obtain the circuit configuration of this hardware portion.

Next, in the judgment step S5, the validity of the circuit configuration obtained in the logic synthesis step S4 is judged. If the result of this determination is that the desired request is not satisfied, the process returns to step S1 and the operation specifications are again divided into parts that are realized by hardware and parts that are realized by software, and the same processing is performed thereafter.

As described above, when the operation specifications are divided, the system to be realized is divided into a part to be realized by hardware and a part to be realized by software, as required. The system can be designed to meet the above requirements.

[0011]

However, when the operation specifications are conventionally divided, the timing constraint for the operation and the scale of the circuit after the synthesis of the portion realized by the hardware are estimated based only on the operation description. It was divided considering only the timing and circuit scale. Therefore, with the conventional method, it is difficult to divide based on accurate estimation,
Further, when trying to put a plurality of operation specifications into practical use on the same hardware, an additional circuit such as an extra connection is required, and a design change may be required after the hardware synthesis. Furthermore, there is a problem in that only a hardware configuration intended by the designer can be obtained, and the re-division often occurs, which increases the system design time.

Therefore, the present invention has been made in view of such a conventional situation, and an object of the present invention is to divide an operation specification in a system design, and to perform an optimum division so that an operation specification can be obtained. It is to improve the design efficiency and reduce the time for system design by reducing the number of re-divisions and design changes.

[0013]

In order to achieve the above-mentioned object, a feature of the present invention resides in that an operation specification of a system is divided into a part realized by software and a part realized by hardware. , A basic circuit analysis section for analyzing the structure of a basic circuit having a predetermined hardware configuration, and a software section for realizing the operation specifications by software based on the information analyzed by the basic circuit analysis section. And an operation specification dividing unit that divides the hardware portion realized by hardware, and an interface for data transfer between the divided software portion and the hardware portion into the software portion and the hardware portion. And an interface addition unit to be added.

According to the configuration of the above-mentioned invention, when the operation specification is divided, it is divided into a portion realized by software and a portion realized by hardware based on the information of the basic circuit prepared in advance by the designer. I am doing it. By dividing in this way, it is possible to easily obtain a hardware configuration close to the one intended by the designer, and it is possible to redone the division and enable a design with few repeated design changes.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an operation specification dividing device according to the present invention will be described below with reference to the drawings.
The hardware configuration of the operation specification dividing device according to the present invention is
CPU for performing various processes, keyboard, mouse,
An input device such as a light pen or a flexible disk device, and an external storage device such as a memory device or a disk device,
A normal computer system including an output device such as a display device and a printer device may be used. The CPU includes an arithmetic unit that executes various processing units such as the basic circuit analysis unit 102 shown in FIG. 1, and a main storage unit that stores instructions of the processing unit. The basic circuit 101, operation specification 103, software specification 106, and hardware specification 107 shown in FIG. 1 are stored in the above external storage device.

First Embodiment FIG. 1 is a block diagram showing a first embodiment according to the present invention. This block diagram corresponds to the software / hardware dividing step S1 in the flowchart of the general circuit design process shown in FIG.
It concerns this software / hardware partitioning step. This operation specification dividing device includes a basic circuit analysis unit 102 that analyzes the structure of a basic circuit 101 having a predetermined hardware configuration, and a basic circuit analysis unit 1.
An operation specification dividing unit 104 that divides an operation specification 103 into a part that is realized by software and a part that is realized by hardware based on the information analyzed in 02, and a divided software part and a hardware part. Interface addition unit 105 for adding an interface for data transfer of the software to the software part and the hardware part
Equipped with.

Next, the operation of the operation specification dividing device will be described. First, in the basic circuit analysis unit 102, the type and number of the arithmetic units included in the basic circuit 101 prepared by the designer in advance, information on the connection between the arithmetic units, for example, the connection of the arithmetic units included in the basic circuit Analyze what kind of calculation order is possible, etc. This basic circuit may be stored in the external storage device in advance, or may be created by the operator as necessary.

Next, in the operation specification dividing unit 104, based on the information of the basic circuit analyzed by the basic circuit analysis unit 102, the operation specification is divided into a portion realized by software and a portion realized by hardware. To do. Next, in the interface adding unit 105, an interface for passing data between the software part and the hardware part is added to the software part and the hardware part. By the above processing, the software specification 106 realized by software and the hardware specification 107 realized by hardware are generated and stored in the above external storage device.

As described above, the operation specification dividing apparatus according to the present embodiment divides the operation specification based on the structural information of the basic circuit prepared by the designer in advance.
The hardware part can be divided so that the hardware configuration intended by the designer can be obtained, and the division can be redone.
It enables a design with few repeated design changes.

Second Embodiment Next, a second embodiment of the operation specification dividing device according to the present invention will be described. In this embodiment, the details of the processing in the operation specification division unit 104 and the basic circuit analysis unit 102 in FIG. 1 will be described using a specific example.

FIG. 2 shows an example of operation specifications used in this embodiment. In this embodiment, the behavioral specifications are represented by behavioral descriptions. Circle numbers are attached to each operation description for convenience of the following description. The operation specifications shown in FIG. 2 are shown in FIG.
It is assumed that the operation specification 103 is inside.

FIG. 3 shows the dependency relationship of each statement of the operation specification shown in FIG. This dependency relationship is analyzed by the operation specification division unit 109. White circles in FIG. 3 represent the start (upper part of the drawing) and the end (lower part of the drawing) of the operation, and the circled numbers correspond to the statement numbers shown in FIG. Further, the solid line between the circled numbers indicates that there is a data dependency between those statements.

FIG. 4 shows an example of a basic circuit prepared by the designer in advance. This basic circuit shows an actual circuit configuration for easy understanding. This basic circuit may be stored in the form of a behavioral description.

In the following description, an embodiment will be described in which the operation specification shown in FIG. 2 is divided into a part realized by software and a part realized by hardware based on the structural information of the basic circuit shown in FIG. To do.

FIG. 5 shows a flow chart of division of operation specifications. First of all, do the scheduling process,
Wait for statement that can be executed in state 1 W ₀
And register it in the set S ₁ . Here, it is assumed that two or more operations executed continuously are not scheduled in one state. Further, the set S _i is a set of statements executed in the state i, and in the example shown in FIG. 2, S ₁ = {,,,}.

Next, for each statement belonging to the set S ₁ , the operation of the output destination is examined. In this example, the statement output destination is addition, and the statement output destination is subtraction. It can be seen that the basic circuit example shown in FIG. 4 has a structure in which there is a connection from the adder to the subtractor, but there is no connection from the subtractor to the adder. The basic circuit analysis unit 102 analyzes the structural information of the basic circuit.

Therefore, the statement is deleted from S ₁ and registered in the set SW. Here, the set SW is a set of statements realized by software. And
A statement that is the output destination of the statement is attached to the set S ₂ with a weight W ₁ . Here, the weights W ₀ and W ₁ are set to values such that W ₀ <W ₁ . As described above, generally, the statement n + 1, which is the next output destination of the statement n, is registered with a weight larger than the weight of the statement n. Next, since only one addition and one subtraction can be executed at the same time on the basic circuit, the statement, is selected and registered in the set HW. Here, the set HW is a set of statements realized by hardware. At present, HW = {,}.

Next, the statements that can be simultaneously executed in state 2 are registered in the set S ₂ . At that time, the statements belonging to the set SW are also considered. In the present example, S ₂ = {,,}. The operations that can be executed at the same time on the basic circuit are one addition and one subtraction, and if you select from the order of the weight attached to the statement, the statement is selected and registered in the set HW. As a result, HW = {,,,}, SW
= {,} Is obtained.

In this way, the operation specifications shown in FIG. 2 are divided into a software part realized by software and a hardware part realized by hardware. An output example of the result of this division is shown in FIG.

In the interface adding unit 105, an interface circuit for controlling data transfer between a CPU executing software and hardware is added to the basic circuit, and a hardware specification 107 is output. It is also possible to divide the operation specification including this interface circuit. As a result, it is possible to perform division considering an interface not included in the operation specifications. At this time, a processing routine matching the interface circuit included in the basic circuit is added to the software portion.

As described above, if the statement is realized by hardware without considering the structure of the basic circuit, it is necessary to add a new connection from the subtracter to the adder which does not exist on the basic circuit. You can see that the number of useless circuits increases. In the present embodiment, structural information is generated by analyzing what kind of calculation sequence is possible for the connection of the arithmetic units included in the basic circuit, and the operation specification 103 is generated based on the structural information of this basic circuit. Is divided into a part realized by software and a part realized by hardware. This allows the hardware portion to be divided so that the hardware configuration intended by the designer is obtained.

[0032]

As described above, according to the present invention, the hardware configuration intended by the designer is obtained by dividing the operation specifications based on the structural information of the basic circuit prepared by the designer in advance. As described above, the hardware part can be divided, and the division can be redone, and the design with a small number of design changes can be performed. Therefore, efficient designing can be performed, and the time and cost required for designing can be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an operation specification dividing device according to the present invention.

FIG. 2 is a diagram showing an example of operation specifications.

FIG. 3 is a diagram showing statement dependency relationships.

FIG. 4 is a diagram showing an example of a basic circuit.

FIG. 5 is a diagram showing a division flowchart.

FIG. 6 is a diagram showing a result of division.

FIG. 7 is a flowchart showing a general circuit design process.

[Explanation of symbols]

 101 basic circuit 102 basic circuit analysis unit 103 operation specification 104 operation specification dividing unit 105 interface addition unit 106 software specification 107 hardware specification

Claims (1)

[Claims] 1. A device for dividing an operation specification of a system into a part to be realized by software and a part to be realized by hardware, and a basic circuit for analyzing the structure of a basic circuit having a predetermined hardware configuration. A circuit analysis unit, and an operation specification division unit that divides the operation specifications into a software part that realizes the operation specifications by software and a hardware part that realizes the hardware based on the information analyzed by the basic circuit analysis unit. An operation specification dividing device, comprising: an interface adding unit that adds an interface for data transfer between the divided software unit and hardware unit to the software unit and the hardware unit.