JPH09130963A - Power factor improving unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable power factor improving unit suitable for system power supply and the like. SOLUTION: A first power factor improving system comprising a noise filter NF2 and a power factor improving module PF1 and a second power factor improving system comprising a noise filter NF3 and a power factor improving module PF2 are provided between an input terminal 2 and an output terminal 4 where each module PF1, PF2 is provided with a temperature sensor 8, 10. When the temperature of module PF1, PF2 is abnormal, an abnormality decision circuit 12 outputs an alarm signal Sa and upon elapse of a predetermined time τ, a feedback circuit NFB is interrupted through a trip circuit 16 by a timer circuit 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power factor correction unit that improves power factor by suppressing reactive power.

[0002]

2. Description of the Related Art In electronic systems such as computer systems which are required to have high processing speed and to be highly functional and multifunctional, it is extremely important to reduce power consumption. Therefore, by providing a power factor correction circuit in the power supply device and suppressing the reactive current returning to the power supply line, the effective current (current consumed by the electronic system) is relatively increased, so The power consumption is reduced by substantially reducing the input current flowing to the system.

[0003]

The reliability of the power factor correction circuit depends on the reliability of the electronic system. Therefore, a power factor correction circuit with higher reliability is desired. ing. Further, in a high-function and multi-function electronic system such as an electronic exchange system or a computer system, a so-called system power supply that can be quickly repaired even if some abnormality occurs is required. Also, a suitable power factor correction circuit is required.

The present invention has been made in view of the above problems, and an object thereof is to provide a power factor correction unit having high reliability and suitable for a system power supply and the like.

[0005]

In order to achieve such an object, the present invention relates to a power factor correction unit for improving a power factor by suppressing a harmonic current contained in the input current. Suppress harmonic currents included 2
More than one power factor improving system, temperature detecting means for detecting the temperature of each power factor improving system, and a detection result of the temperature detecting means is compared with a predetermined threshold value, and an alarm signal is output when the temperature exceeds a predetermined temperature. And a timer means for counting a predetermined time from the time when the alarm signal is generated and shutting off the power factor improving system after the predetermined time has elapsed.

[0006]

As described above, according to the present invention, two or more power factor correction systems are provided, and even if a temperature abnormality occurs in at least one of the paths, the remaining power factor correction system is used for a predetermined period. The reliability is improved by continuously operating.

Furthermore, an alarm signal is generated at the time when a temperature abnormality is detected, and the power factor correction system is shut off after a lapse of a predetermined time, so that a sudden power shut-off state is applied to various electronic systems. To prevent.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the power factor correction unit according to the present invention will be described below with reference to FIG. In the figure, an input terminal 2 connected to a power line AC from a commercial AC power source, an output terminal 4 for outputting an effective current generated by a power factor correction process, and an alarm signal indicating an internal state of the power factor correction unit. An alarm output terminal 6 for externally outputting Sa is provided. Although not shown in the drawing, a ground terminal or the like, which serves as an electrical reference for each functional block described later, is naturally provided.

A feedback circuit NFB for feedback-controlling the input current I from the power supply line AC and a first noise filter NF1 are connected in series to the input terminal 2, and the output contact X and the output of the first noise filter NF1 are output. Two power factor correction systems having the same characteristics are provided in parallel with the terminal 4.

The first power factor correction system has a second noise filter NF2 connected to the output contact X, a first power factor correction module PF1 and a rectifier diode D1 connected in cascade, The power factor correction system of No. 3 includes a third noise filter NF3 connected to the output contact X,
The second power factor correction module P that is cascade-connected to it
F2 and rectifying diode D2 are provided, and the cathodes of these rectifying diodes D1 and D2 are both connected to the output terminal 4. Further, capacitors C1 and C2 having a noise filter function are connected between the respective anodes of the rectifier diodes D1 and D2 and the ground terminal.

Here, each of the first and second power factor correction modules PF1 and PF2 has a module structure in which the power factor correction circuit is molded with a synthetic resin or the like to make the module compact. The rate improving circuit makes the current waveform close to a sine wave while monitoring the input current, and controls the input voltage of the capacitors C1 and C2 to be constant, thereby returning to the power line AC through the capacitors C1 and C2. An active filter or the like for suppressing current (harmonic current) is applied.

Further, each power factor correction module PF1, PF
2, temperature sensors 8 and 10 for detecting these temperatures are attached, and an abnormality determination circuit 12 inputs these temperature detection signals ST1 and ST2 one by one.

The abnormality judging circuit 12 is realized by a logic circuit which is made into firmware by using, for example, a programmable logic device (PLD), and the temperature detection signals ST1 and ST2 are set to a threshold temperature which is internally set in advance. When the value of the data DTH is exceeded, the alarm signal Sa is output via the alarm output terminal 6.

More specifically, ST1 ≧ DTH, S
When T2 <DTH, the abnormality determination circuit 12 outputs an alarm signal Sa indicating that the abnormality has occurred in the first power factor correction module PF1 and the rated temperature has been exceeded. When ST1 <DTH and ST2 ≧ DTH, the alarm signal Sa indicating the temperature abnormality of the second power factor correction module PF2 is output. Furthermore, when ST1 ≧ DTH and ST2 ≧ DTH, an alarm signal Sa indicating that a temperature abnormality has occurred in both the power factor correction modules PF1 and PF2 is output, and ST1 <
When DTH and ST2 <DTH, the alarm signal Sa is not output.

Further, the abnormality determination circuit 12 outputs an alarm signal Sa.
Is provided with a timer circuit 14 that counts a predetermined time τ in synchronization with a time point ta at which is output. By stopping the feedback circuit NFB via the trip circuit 16 at a time point tb (= ta + τ) when the predetermined time τ has elapsed. , From input terminal 2 to first
The input current I to the noise filter NF1 is cut off.
The time τ preset in the timer circuit 14 is
For example, it can be variably set within a range of several tens of milliseconds to several tens of seconds.

In the power factor correction unit, the above-mentioned components are connected to a wiring pattern formed on an insulating substrate having a predetermined size, and the power factor correction unit is placed in a relatively thin box-shaped casing. The structure is such that the insulating substrate is housed together.

Next, the operation of the power factor correction unit will be described. For example, as shown in the figure, a power line AC from a commercial AC power source is connected to the input terminal 2, a DC / DC converter circuit (DC-DC converter) or the like is connected to the output terminal 4, and an alarm output terminal 6 is connected to an electronic system. Central processing unit (CP
U) etc.

When the power factor correction unit is operating normally, the first to third noise filters NF1 to NF3
The noise from the power supply line AC is removed by the power supply line AC, the first and second power factor correction circuits PF1 and PF2 suppress harmonic currents, and supply effective currents to the capacitors C1 and C2. Therefore, the reactive current returning to the power supply line AC via the capacitors C1 and C2 is suppressed, and a DC voltage substantially equal to the voltage across the capacitors C1 and C2 is output to the output terminal 4. Then, the DC / DC converter circuit further controls the voltage of the output terminal 4 to generate a desired stabilized voltage.

On the other hand, the first and second power factor correction modules P
When an abnormality occurs in at least one of F1 and PF2 and the temperature rises, the abnormality determination circuit 12 detects the module corresponding to the abnormality occurrence based on the temperature detection signals ST1 and ST2 of the temperature sensors 8 and 10, and issues an alarm. The signal Sa is transferred to the central processing unit of the electronic system via the alarm output terminal 6. Therefore, the reliability of the entire electronic system can be improved by preliminarily incorporating a program or the like for sequentially monitoring the power system for abnormality in the electronic system.

Furthermore, the power factor improving unit does not become in the completely shut-off state even at the time ta when the alarm signal Sa is output, and at the time tb when the time τ has elapsed,
It will be shut off for the first time. That is, it is extremely rare that both the first and second power factor correction modules PF1 and PF2 generate a temperature abnormality at the same time point ta. Therefore, one power factor correction module (for example, PF1) If an abnormality occurs in the electronic system, an alarm signal Sa indicating the initial abnormality is output, but the remaining power factor correction module (for example, PF2) continues the operation for a predetermined time τ, thereby the electronic system. It avoids an abnormal situation that causes a sudden power cutoff.

More specifically, in a highly functional and multifunctional electronic system such as a computer system or an electronic exchange system, if a sudden power cutoff occurs, a huge amount of data processed up to now is destroyed. It will be severely damaged. However, according to this power factor correction unit, at the time ta when the warning signal Sa is received, the processing for saving the data processed by the electronic system up to now to the external storage device or the like is started, and the data is processed during the time τ. A failure can be prevented in advance by completing the evacuation and setting the normal power-supply cutoff state. Then, an observer or the like can replace the abnormal power factor correction unit with a normal power factor correction unit and restart the electronic system.

Since the power factor correction unit is unitized as described above, it can be easily attached / detached to / from the electronic system, and as a result, the electronic system can be restarted quickly and the electronic system can be quickly restarted. It is possible to easily expand and change the system and build a new system.

Further, although the case where two power factor correction systems are provided has been described in this embodiment, the present invention is not limited to this, and one having two or more power factor correction systems is provided. Including.

[0024]

According to the present invention as described above,
The reliability is high because two or more power factor correction systems are provided and the remaining power factor correction system continues to operate for a predetermined period even if a temperature abnormality occurs in at least one system. Furthermore, when a temperature abnormality is detected, an alarm signal is generated and the power is cut off after a lapse of a predetermined time, so the electronic system to which this power factor correction unit is applied will not be damaged and the reliability of the electronic system will be improved. It can contribute to improvement.

[Brief description of the drawings]

FIG. 1 is a block diagram for explaining a configuration of an embodiment of a power factor correction unit according to the present invention.

[Explanation of symbols]

2 ... input terminal, 4 ... output terminal, 6 ... alarm output terminal, 8,
10 ... Temperature sensor, 12 ... Abnormality determination circuit, 14 ... Timer circuit, 16 ... Trip circuit, NFB ... Feedback circuit, NF
1-NF3 ... Noise filter, PF1, PF2 ... Power factor improvement module, C1, C2 ... Capacitor, D1, D2 ...
Rectifier diode, AC ... Power line.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H02J 9/06 502 H02J 9/06 502F H02M 1/12 H02M 1/12

Claims (1)

[Claims] 1. A power factor correction unit for improving a power factor by suppressing a harmonic current contained in an input current, comprising two or more power factor improving systems for suppressing a harmonic current contained in the input current. A temperature detection means for detecting the temperature of each of the power factor correction systems, an abnormality determination means for comparing the detection result of the temperature detection means with a predetermined threshold value, and generating an alarm signal when the temperature exceeds a predetermined temperature, A power factor improving unit, comprising: a timer unit that counts a predetermined time from the point of time when the alarm signal is generated and shuts off the power factor improving system after a predetermined time has elapsed.