JPH09129447A - Laminated type inductor - Google Patents

Laminated type inductor

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Publication number
JPH09129447A
JPH09129447A JP7285487A JP28548795A JPH09129447A JP H09129447 A JPH09129447 A JP H09129447A JP 7285487 A JP7285487 A JP 7285487A JP 28548795 A JP28548795 A JP 28548795A JP H09129447 A JPH09129447 A JP H09129447A
Authority
JP
Japan
Prior art keywords
coil
inductor
external electrodes
mounting surface
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7285487A
Other languages
Japanese (ja)
Inventor
Kazuyoshi Uchiyama
一義 内山
Shingo Okuyama
晋吾 奥山
Masahiko Kawaguchi
正彦 川口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP7285487A priority Critical patent/JPH09129447A/en
Publication of JPH09129447A publication Critical patent/JPH09129447A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To obtain a laminated type inductor, as mounted on a printed wiring board, allowing it to make a self-resonance frequency into a high frequency and having little deterioration of a self-inductance value and a Q-value. SOLUTION: A laminated-type inductor 1 is a laminate of insulating sheets provided with coil conductors. Coiled conductors are connected in series in a through hole to form a coil 3. Then, a lamination direction of the insulating sheets is in parallel with the mounting surface 1a and vertical to external electrodes 5, 6. The axial direction of the coil 3 is in parallel with the mounting surface 1a and vertical to the external electrodes 5, 6.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、積層型インダク
タ、特に高周波用積層型インダクタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated inductor, and more particularly to a high frequency laminated inductor.

【0002】[0002]

【従来の技術】従来の積層型インダクタは、図7(模式
的に示す)に示すように、内部に複数のコイル導体が積
層されて構成されたコイル51の軸方向が実装面52に
対して垂直であると共に、入出力外部電極53,54に
対して平行であった。
2. Description of the Related Art In a conventional laminated inductor, as shown in FIG. 7 (schematically shown), the coil 51 formed by laminating a plurality of coil conductors inside has an axial direction with respect to a mounting surface 52. It was vertical and parallel to the input / output external electrodes 53 and 54.

【0003】[0003]

【発明が解決しようとする課題】従来の積層型インダク
タにあっては、コイル51と外部電極53,54間にそ
れぞれ分布状に浮遊容量が発生するが、特に、コイル5
1の両端近傍部分と外部電極53,54間に発生する浮
遊容量C11,C12は、それぞれコイル51と外部電
極53間、あるいはコイル51と外部電極54間の電位
差が大きく、かつ、間隔が狭いため、大きい数値とな
る。これらの大きい数値の浮遊容量C11,C12は、
インダクタの外部電極53と54間に電気的に並列に挿
入されるので、トータルの浮遊容量はC11とC12が
加算されてさらに大きな値となる。従って、浮遊容量の
影響が無視できず、インダクタの自己共振周波数が低周
波化するという問題がある。
In the conventional laminated inductor, stray capacitances are generated in a distributed manner between the coil 51 and the external electrodes 53 and 54.
The stray capacitances C11 and C12 generated between the portions near both ends of 1 and the external electrodes 53 and 54 have a large potential difference between the coil 51 and the external electrode 53, or between the coil 51 and the external electrode 54, and a narrow interval. , A large number. These large numerical values of stray capacitances C11 and C12 are
Since the inductors are electrically inserted in parallel between the external electrodes 53 and 54, the total stray capacitance becomes a larger value by adding C11 and C12. Therefore, the influence of the stray capacitance cannot be ignored, and the self-resonant frequency of the inductor is lowered.

【0004】また、従来の積層型インダクタにあって
は、コイル51に発生する磁束φの方向が実装面に対し
て垂直であるため、磁束φによって印刷配線板55、特
に印刷配線板55上に形成されたグランド等の広面積導
体パターンに渦電流が発生し、この渦電流損失によって
磁束φが弱められ、自己インダクタンス値やQ値が劣化
するという問題もある。
Further, in the conventional laminated inductor, since the direction of the magnetic flux φ generated in the coil 51 is perpendicular to the mounting surface, the magnetic flux φ causes the printed wiring board 55, particularly the printed wiring board 55, to move. There is also a problem that an eddy current is generated in the formed large-area conductor pattern such as the ground, and the magnetic flux φ is weakened by this eddy current loss, so that the self-inductance value and Q value are deteriorated.

【0005】そこで、本発明の目的は、自己共振周波数
の高周波化が図れ、印刷配線板等に実装した際の自己イ
ンダクタンス値やQ値の劣化が少ない積層型インダクタ
を提供することにある。
Therefore, an object of the present invention is to provide a multilayer inductor which can achieve a higher self-resonant frequency and which is less likely to deteriorate in self-inductance value and Q value when mounted on a printed wiring board or the like.

【0006】[0006]

【課題を解決するための手段】以上の目的を達成するた
め、本発明に係る積層型インダクタは、コイル導体を電
気的に接続して構成したコイルの軸方向が実装面に対し
て平行であり、かつ前記コイル導体と絶縁性部材からな
る積層体の積み重ね方向が前記実装面に対して平行であ
ることを特徴とする。
In order to achieve the above object, in the laminated inductor according to the present invention, the axial direction of the coil formed by electrically connecting the coil conductors is parallel to the mounting surface. Further, the stacking direction of the laminated body including the coil conductor and the insulating member is parallel to the mounting surface.

【0007】また、本発明に係る積層型インダクタは、
コイル導体を電気的に接続して構成したコイルの軸方向
が、前記コイルの端部を電気的に接続した外部電極に対
して垂直であり、かつ、前記コイル導体と絶縁性部材か
らなる積層体の積み重ね方向が前記外部電極に対して垂
直であることを特徴とする。
The laminated inductor according to the present invention is
The axial direction of the coil formed by electrically connecting the coil conductors is perpendicular to the external electrode electrically connecting the ends of the coil, and the laminated body includes the coil conductor and an insulating member. The stacking direction of is perpendicular to the external electrode.

【0008】[0008]

【作用】以上の構成により、コイルの軸方向が実装面に
対して平行であるため、コイルに発生した磁束の方向が
実装面に対して平行になり、磁束が印刷配線板等に形成
された導体パターンによって弱められにくくなる。従っ
て、自己インダクタンス値やQ値の劣化が抑えられる。
With the above construction, since the axial direction of the coil is parallel to the mounting surface, the direction of the magnetic flux generated in the coil is parallel to the mounting surface, and the magnetic flux is formed on the printed wiring board or the like. The conductor pattern makes it less likely to be weakened. Therefore, deterioration of the self-inductance value and the Q value can be suppressed.

【0009】また、コイルの軸方向が外部電極に対して
垂直であるため、コイルと外部電極間に発生する浮遊容
量は、小さな数値となる。なぜなら、コイルと外部電極
間の電位差が小さく、しかも間隔を広くできるからであ
る。
Since the axial direction of the coil is perpendicular to the external electrode, the stray capacitance generated between the coil and the external electrode has a small numerical value. This is because the potential difference between the coil and the external electrode is small and the gap can be widened.

【0010】[0010]

【発明の実施の形態】以下、本発明に係る積層型インダ
クタの実施形態について添付図面を参照して説明する。 [第1実施形態、図1〜図5]図1(模式的に示す)に
示すように、積層型インダクタ1は、内蔵されているコ
イル3の軸方向がインダクタ1の実装面1aに対して平
行であり、しかもインダクタ1の両端部にそれぞれ設け
られている入出力外部電極5,6に対して垂直である。
コイル3の両端部はそれぞれ入出力外部電極5,6に電
気的に接続されている。入出力外部電極5,6は実装面
1aに対して垂直な関係にある。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a laminated inductor according to the present invention will be described below with reference to the accompanying drawings. [First Embodiment, FIGS. 1 to 5] As shown in FIG. 1 (schematically shown), in a laminated inductor 1, an axial direction of a built-in coil 3 is relative to a mounting surface 1 a of the inductor 1. They are parallel to each other and are perpendicular to the input / output external electrodes 5 and 6 provided at both ends of the inductor 1.
Both ends of the coil 3 are electrically connected to the input / output external electrodes 5 and 6, respectively. The input / output external electrodes 5 and 6 are in a relationship perpendicular to the mounting surface 1a.

【0011】さらに、図2を参照して積層型インダクタ
1の構造について詳説する。インダクタ1は、コイル導
体31,32……3nをそれぞれ設けた絶縁性シート1
1、スルーホール15のみを設けた絶縁性シート11に
て構成されている。コイル導体31〜3nは、積層された
状態では絶縁性シート11に設けたスルーホール15を
介して直列に電気的に接続され、ソレノイド状のコイル
3を形成する。
Further, the structure of the laminated inductor 1 will be described in detail with reference to FIG. The inductor 1 is an insulating sheet 1 provided with coil conductors 3 1 , 3 2, ... 3 n.
1. The insulating sheet 11 is provided with only the through holes 15. In the stacked state, the coil conductors 3 1 to 3 n are electrically connected in series through the through holes 15 provided in the insulating sheet 11 to form the solenoidal coil 3.

【0012】コイル導体31〜3nは絶縁性シート11の
表面に、周知の印刷法やスパッタリング法や真空蒸着法
等の方法によって形成されたり、あるいは以下に説明す
る方法によって形成される。図3(a)に示すように、
ポリエチレンテレフタレート等の樹脂フィルム21に裏
打ちされた絶縁性シート11を準備する。絶縁性シート
11の材料としては、例えばフェライト、誘電体、絶縁
体等のセラミックが使用される。絶縁性シート2の厚み
T1は、後述の内部電極の厚みT2と隣接する内部電極
間の絶縁に必要な厚みT3を加えた寸法に設定する。
The coil conductors 3 1 to 3 n are formed on the surface of the insulating sheet 11 by a known printing method, a sputtering method, a vacuum deposition method, or the like, or by the method described below. As shown in FIG.
An insulating sheet 11 backed by a resin film 21 such as polyethylene terephthalate is prepared. As the material of the insulating sheet 11, for example, ceramics such as ferrite, dielectrics, and insulators are used. The thickness T1 of the insulating sheet 2 is set to a dimension including a thickness T2 of an internal electrode described later and a thickness T3 necessary for insulation between adjacent internal electrodes.

【0013】次に、図3(b)に示すように、樹脂フィ
ルム21側から絶縁性シート11にレーザ加工又はサン
ドブラスト加工又はダイサー加工等を施し、所定の形状
のコイル導体用溝22を形成する。コイル導体用溝22
の深さは、所望のコイル導体の厚みT2に等しい寸法で
ある。さらに、図3(c)に示すように、このコイル導
体用溝22の所定の位置にスルーホール用孔23をレー
ザ加工、パンチング加工等にて形成する。
Next, as shown in FIG. 3B, the insulating sheet 11 is subjected to laser processing, sand blast processing, dicer processing, or the like from the resin film 21 side to form a coil conductor groove 22 having a predetermined shape. . Groove for coil conductor 22
Has a dimension equal to the desired coil conductor thickness T2. Further, as shown in FIG. 3C, a through hole 23 is formed at a predetermined position of the coil conductor groove 22 by laser processing, punching processing or the like.

【0014】次に、図3(d)に示すように、Ag,P
d,Ag−Pd,Cu等の導電性ペースト25をコイル
導体用溝22及びスルーホール用孔23に印刷法等にて
塗り込み、充填、乾燥する。こうして、コイル導体用溝
22に充填された導電性ペースト25はコイル導体とさ
れ、スルーホール用孔23に充填された導電性ペースト
25はスルーホール15とされる。そして、コイル導体
用溝22の底面から絶縁性シート11の下面までの距離
が、隣接するコイル導体間の絶縁に必要な厚みT3に相
当する。
Next, as shown in FIG. 3D, Ag, P
A conductive paste 25 such as d, Ag-Pd, or Cu is applied to the groove 22 for coil conductor and the hole 23 for through hole by a printing method or the like, filled, and dried. In this way, the conductive paste 25 filled in the coil conductor groove 22 becomes a coil conductor, and the conductive paste 25 filled in the through hole hole 23 becomes a through hole 15. The distance from the bottom surface of the coil conductor groove 22 to the lower surface of the insulating sheet 11 corresponds to the thickness T3 required for insulation between adjacent coil conductors.

【0015】この後、図3(e)に示すように、樹脂フ
ィルム21を剥す。得られた絶縁性シート11はコイル
導体31〜3nやスルーホール15を内蔵し、その表面は
平坦である。従って、絶縁性シート11の積層枚数が多
くなっても、あるいはコイル導体31〜3nの厚みが厚く
なっても、均一な厚さに積み重ねることができ、積層ず
れも抑えることができる。
After this, as shown in FIG. 3 (e), the resin film 21 is peeled off. The resulting insulating sheet 11 has a built-in coil conductor 3 1 to 3 n and the through hole 15, its surface is flat. Therefore, even if the number of laminated insulating sheets 11 increases or the thickness of the coil conductors 3 1 to 3 n increases, they can be stacked to have a uniform thickness and the stacking deviation can be suppressed.

【0016】以上の構成からなる絶縁性シート11は、
積み重ねられて圧着された後、一体的に焼成され積層体
とされる。次に、この積層体の両端部にそれぞれ外部電
極5,6をスパッタリング、真空蒸着、あるいは印刷焼
付等の手段にて形成する。外部電極5はスルーホール1
5を介してコイル3の一方の端部、具体的にはコイル導
体31の端部に電気的に接続し、外部電極6はスルーホ
ール15を介してコイル3の他方の端部、具体的にはコ
イル導体3nの端部に電気的に接続している。
The insulating sheet 11 having the above structure is
After being stacked and pressure-bonded, they are integrally fired to form a laminated body. Next, external electrodes 5 and 6 are formed on both ends of the laminate by means of sputtering, vacuum deposition, printing or the like. External electrode 5 is through hole 1
5 is electrically connected to one end of the coil 3, specifically, the end of the coil conductor 3 1 , and the external electrode 6 is connected to the other end of the coil 3 via the through hole 15. Is electrically connected to the end of the coil conductor 3 n .

【0017】こうして得られたインダクタ1は、絶縁性
シート11の積み重ね方向が実装面1aに対して平行
で、外部電極5,6に対して垂直である。一方、コイル
3の軸方向は、実装面1aに対して平行で、外部電極
5,6に対して垂直である。このため、図1に示すよう
に、インダクタ1を印刷配線板9上に実装した場合、コ
イル3に発生する磁束φの方向が実装面1aに対して平
行となるので、磁束φが印刷配線板9上に形成されたグ
ランド等の広面積導体パターンによって弱められにくく
なる。この結果、インダクタ1の自己インダクタンス値
やQ値の低下が従来のインダクタと比較して少なくな
る。
In the inductor 1 thus obtained, the stacking direction of the insulating sheets 11 is parallel to the mounting surface 1a and perpendicular to the external electrodes 5 and 6. On the other hand, the axial direction of the coil 3 is parallel to the mounting surface 1a and perpendicular to the external electrodes 5 and 6. Therefore, as shown in FIG. 1, when the inductor 1 is mounted on the printed wiring board 9, the direction of the magnetic flux φ generated in the coil 3 is parallel to the mounting surface 1a, so that the magnetic flux φ is generated. The wide area conductor pattern such as the ground formed on the surface 9 makes it difficult to weaken. As a result, the self-inductance value and Q value of the inductor 1 are reduced less than those of the conventional inductor.

【0018】また、図4(模式的に示す)に示すよう
に、インダクタ1は、コイル3と外部電極5,6間に浮
遊容量が発生するが、コイル3の両端部分と外部電極
5,6間に発生する浮遊容量C1,C2は、それぞれコ
イル3と外部電極5間、あるいはコイル3と外部電極6
間の電位差は大きいが、間隔が広いため極めて小さい数
値となる。従って、浮遊容量C1,C2の影響は実用上
無視できる。そして、図5(模式的に示す)に示すよう
に、コイル導体31〜3n及び外部電極5,6の隣接導体
間に発生する浮遊容量C3,C4……C9は、外部電極
5と6間に電気的に直列に挿入されるので、トータルの
浮遊容量Cxは以下の式で得られ、その値は極めて小さ
い。
Further, as shown in FIG. 4 (schematically shown), in the inductor 1, although stray capacitance is generated between the coil 3 and the external electrodes 5 and 6, both end portions of the coil 3 and the external electrodes 5 and 6 are generated. The stray capacitances C1 and C2 generated between the coil 3 and the external electrode 5 or between the coil 3 and the external electrode 6, respectively.
Although the potential difference between them is large, the value is extremely small because the interval is wide. Therefore, the influence of the stray capacitances C1 and C2 can be ignored in practical use. Then, as shown in FIG. 5 (shown schematically), stray capacitance C3, C4 ...... C9 occurring between adjacent conductors of the coil conductor 3 1 to 3 n and the external electrodes 5 and 6, the external electrodes 5 6 Since it is electrically inserted in series between them, the total stray capacitance Cx is obtained by the following equation, and its value is extremely small.

【0019】Cx=1/{(1/C1)+(1/C2)
+……+(1/C9)} 従って、浮遊容量C3〜C9の影響も実用上無視でき
る。この結果、インダクタ1の自己共振周波数の高周波
化を図ることができる。
Cx = 1 / {(1 / C1) + (1 / C2)
+ ... + (1 / C9)} Therefore, the influence of the stray capacitances C3 to C9 can be practically ignored. As a result, the self-resonant frequency of the inductor 1 can be increased.

【0020】[第2実施形態、図6]図6(模式的に示
す)に示すように、積層型インダクタ31は、前記第1
実施形態と同様にして製作された積層体の両端部の隅部
のみに外部電極32,33を設けたものである。従っ
て、このインダクタ31は、コイル導体と絶縁性シート
の積み重ね方向が実装面31aに対して平行で、外部電
極32,33に対して垂直であり、かつ、コイル3の軸
方向は実装面31aに対して平行で、外部電極32,3
3に対して垂直である。外部電極32,33の高さ寸法
Hはコイル3の内径の1/2以下の寸法に設定すること
が好ましい。外部電極32,33はそれぞれコイル3の
両端部に電気的に接続されている。
[Second Embodiment, FIG. 6] As shown in FIG. 6 (schematically shown), the multilayer inductor 31 includes the first inductor
The external electrodes 32 and 33 are provided only at the corners of both ends of the laminated body manufactured in the same manner as the embodiment. Therefore, in this inductor 31, the stacking direction of the coil conductor and the insulating sheet is parallel to the mounting surface 31a and is perpendicular to the external electrodes 32 and 33, and the axial direction of the coil 3 is on the mounting surface 31a. Parallel to the external electrodes 32, 3
Perpendicular to 3. The height dimension H of the external electrodes 32, 33 is preferably set to be equal to or less than half the inner diameter of the coil 3. The external electrodes 32 and 33 are electrically connected to both ends of the coil 3, respectively.

【0021】こうして得られたインダクタ31は、前記
第1実施形態の積層型インダクタ1と同様の作用効果に
加え、浮遊容量C1,C2をさらに減少させることがで
き、インダクタ31の自己共振周波数の更なる高周波数
化を図ることができる。外部電極32,33の面積が、
インダクタ1の外部電極5,6と比較して小さくなり、
コイル3との対向面積が少なくなったからである。
The inductor 31 thus obtained has the same effect as that of the laminated inductor 1 of the first embodiment, and can further reduce the stray capacitances C1 and C2. It is possible to achieve higher frequencies. The area of the external electrodes 32 and 33 is
It becomes smaller than the external electrodes 5 and 6 of the inductor 1,
This is because the area facing the coil 3 has decreased.

【0022】また、コイル3と端子電極32,33の間
の浮遊容量が小さくなるため(距離が広くなるため)、
コイル3の巻回数を増やしてコイル3の端部を積層体端
面近傍まで拡張させることができ、インダクタのサイズ
を大型化することなく、自己インダクタンス値を大きく
することができる。そして、コイル3に発生する磁束φ
の方向は外部電極32,33に対して垂直であるが、外
部電極32,33の面積が小さいため、外部電極32,
33に渦電流が発生しにくく、また、渦電流が発生して
もその損失は小さい。従って、インダクタの自己インダ
クタンス値やQ値をアップさせることができる。
Further, since the stray capacitance between the coil 3 and the terminal electrodes 32 and 33 becomes small (because the distance becomes wide),
The number of windings of the coil 3 can be increased to extend the end of the coil 3 to the vicinity of the end face of the laminate, and the self-inductance value can be increased without increasing the size of the inductor. Then, the magnetic flux φ generated in the coil 3
Direction is perpendicular to the external electrodes 32, 33, but the external electrodes 32, 33 have a small area,
The eddy current is unlikely to be generated in 33, and even if the eddy current is generated, the loss is small. Therefore, the self-inductance value and Q value of the inductor can be increased.

【0023】[他の実施形態]なお、本発明に係る積層
型インダクタは前記実施形態に限定するものではなく、
その要旨の範囲内で種々に変更することができる。特
に、コイルの巻回数や形状は任意であって、仕様に合わ
せて種々のものが選択される。また、外部電極の形状、
例えば折り返しの有無等も任意である。
[Other Embodiments] The multilayer inductor according to the present invention is not limited to the above-described embodiment.
Various modifications can be made within the scope of the gist. In particular, the number of turns and the shape of the coil are arbitrary, and various types are selected according to the specifications. Also, the shape of the external electrode,
For example, the presence or absence of folding back is optional.

【0024】[0024]

【発明の効果】以上の説明で明らかなように、本発明に
よれば、コイルの軸方向が実装面に対して平行であるた
め、コイルに発生した磁束の方向が実装面に対して平行
になり、インダクタを印刷配線板等に実装しても、自己
インダクタンス値やQ値の劣化を抑えることができる。
As apparent from the above description, according to the present invention, since the axial direction of the coil is parallel to the mounting surface, the direction of the magnetic flux generated in the coil is parallel to the mounting surface. Therefore, even if the inductor is mounted on a printed wiring board or the like, deterioration of the self-inductance value and the Q value can be suppressed.

【0025】また、コイルの軸方向が外部電極に対して
垂直であるため、コイルと外部電極間に発生する浮遊容
量やコイル自身の隣接導体間に発生する浮遊容量を極小
化でき、インダクタの自己共振周波数の高周波化を図る
ことができる。
Further, since the axial direction of the coil is perpendicular to the external electrode, the stray capacitance generated between the coil and the external electrode and the stray capacitance generated between the adjacent conductors of the coil itself can be minimized, and the self-movement of the inductor can be minimized. It is possible to increase the resonance frequency.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る積層型インダクタの第1実施形態
を示す内部透視図。
FIG. 1 is an internal perspective view showing a first embodiment of a laminated inductor according to the present invention.

【図2】図1に示した積層型インダクタの分解斜視図。FIG. 2 is an exploded perspective view of the laminated inductor shown in FIG.

【図3】図1に示した積層型インダクタの製造方法の一
例を示す断面図。
FIG. 3 is a cross-sectional view showing an example of a method of manufacturing the laminated inductor shown in FIG.

【図4】図1に示した積層型インダクタのコイルと外部
電極間の浮遊容量を説明するための内部透視図。
FIG. 4 is an internal perspective view for explaining stray capacitance between the coil and the external electrode of the multilayer inductor shown in FIG.

【図5】図1に示した積層型インダクタのコイル間の浮
遊容量を説明するための内部透視図。
5 is an internal perspective view for explaining stray capacitance between coils of the multilayer inductor shown in FIG.

【図6】本発明に係る積層型インダクタの第2実施形態
を示す内部透視図。
FIG. 6 is an internal perspective view showing a second embodiment of the multilayer inductor according to the present invention.

【図7】従来の積層型インダクタを示す内部透視図。FIG. 7 is an internal perspective view showing a conventional multilayer inductor.

【符号の説明】[Explanation of symbols]

1…積層型インダクタ 3…コイル 31〜3n…コイル導体 5,6…外部電極 11…絶縁性シート 31…積層型インダクタ 32,33…外部電極1 ... multilayer inductor 3 ... coil 3 1 to 3 n ... coil conductors 5 ... external electrode 11 ... insulating sheet 31 ... layered inductor 32, 33 ... external electrode

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 コイル導体と絶縁性部材を積層して構成
した積層型インダクタにおいて、 前記コイル導体を電気的に接続して構成したコイルの軸
方向が実装面に対して平行であり、かつ前記コイル導体
と前記絶縁性部材からなる積層体の積み重ね方向が前記
実装面に対して平行であることを特徴とする積層型イン
ダクタ。
1. A laminated inductor formed by laminating a coil conductor and an insulating member, wherein an axial direction of a coil formed by electrically connecting the coil conductor is parallel to a mounting surface, and A laminated inductor, wherein a stacking direction of a laminated body including a coil conductor and the insulating member is parallel to the mounting surface.
【請求項2】 コイル導体と絶縁性部材を積層して構成
した積層型インダクタにおいて、 前記コイル導体を電気的に接続して構成したコイルの軸
方向が、前記コイルの端部を電気的に接続した外部電極
に対して垂直であり、かつ、前記コイル導体と前記絶縁
性部材からなる積層体の積み重ね方向が前記外部電極に
対して垂直であることを特徴とする積層型インダクタ。
2. In a multilayer inductor formed by laminating a coil conductor and an insulating member, the axial direction of the coil formed by electrically connecting the coil conductors electrically connects the ends of the coil. And a stacking direction of a stack of the coil conductor and the insulating member is perpendicular to the external electrode.
JP7285487A 1995-11-02 1995-11-02 Laminated type inductor Pending JPH09129447A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7285487A JPH09129447A (en) 1995-11-02 1995-11-02 Laminated type inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7285487A JPH09129447A (en) 1995-11-02 1995-11-02 Laminated type inductor

Publications (1)

Publication Number Publication Date
JPH09129447A true JPH09129447A (en) 1997-05-16

Family

ID=17692164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7285487A Pending JPH09129447A (en) 1995-11-02 1995-11-02 Laminated type inductor

Country Status (1)

Country Link
JP (1) JPH09129447A (en)

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US6154114A (en) * 1998-05-01 2000-11-28 Taiyo Yuden Co., Ltd. Multi-laminated inductor and manufacturing method thereof
US6165866A (en) * 1997-12-16 2000-12-26 Taiyo Yuden Co., Ltd. Manufacturing method for laminated chip electronic part
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US6675462B1 (en) 1998-05-01 2004-01-13 Taiyo Yuden Co., Ltd. Method of manufacturing a multi-laminated inductor
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6165866A (en) * 1997-12-16 2000-12-26 Taiyo Yuden Co., Ltd. Manufacturing method for laminated chip electronic part
US6154114A (en) * 1998-05-01 2000-11-28 Taiyo Yuden Co., Ltd. Multi-laminated inductor and manufacturing method thereof
US6675462B1 (en) 1998-05-01 2004-01-13 Taiyo Yuden Co., Ltd. Method of manufacturing a multi-laminated inductor
JP2001044039A (en) * 1999-07-30 2001-02-16 Tdk Corp Chipped ferrite part and manufacture thereof
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JP2016197821A (en) * 2015-04-03 2016-11-24 シャープ株式会社 Gate drive circuit
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