JPH09128292A - Cache memory device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten average access time at data readout time by improving a cache hit rate more as compared with a conventional read-ahead type device. SOLUTION: A cache device is equipped with a cache memory for temporarily storing data read out of a recording medium and is controlled by a cache control part 13. Once a read request is received from a host computer, the start LBA number and data length of data requested to be read out are stored in a start LBA number storage part 1 and a data length storage part 2, and a new start LBA number and new data length are obtained by a control part 6, a comparison subtraction part 7, and a comparison addition part 8 from a return value and a preread value stored in a return value storage part 3 and a preread value storage part 5 while a read and a preread process tracing back the LBA numbers are taken into consideration. On the basis of them, the data requested to be read out and the data in the precedent and following areas are read out and stored in the cache memory together.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cache memory which temporarily stores data transferred between a host computer and a recording medium in a high-speed accessible cache memory to speed up a recording process and a reproducing process. Regarding the device.

[0002]

2. Description of the Related Art Generally, an information recording / reproducing device such as an optical disk device is used as an external recording device of a host computer in an information processing device. In recent years, a cache memory is provided in the middle, and data transfer is performed via the cache memory to speed up data recording and reproduction. ing. In particular, in an optical disk apparatus using an optical disk as a recording medium, since writing to the recording medium takes a lot of time, a disk cache memory for temporarily storing recording data and reproduction data is generally provided.

As a device provided with such a cache memory, for example, in a storage control device disclosed in Japanese Patent Application Laid-Open No. 2-122345, when a data read request is made, the data is sent together with the data requested by the host computer. A so-called read-ahead type cache memory device has been proposed in which data of a further block is pre-read in advance. According to this configuration, in the data requested by the host computer, the data stored in the cache memory is transferred from the cache memory to the host computer without being read from the recording medium, thereby shortening the access time in the read processing. It is possible to further improve the hit rate of the cache memory at the time of reading by the pre-reading process.

[0004]

However, in the above-mentioned conventional apparatus, the access to the random block or the access in the direction in which the block number decreases decreases as follows.
Since the data read into the cache memory does not hit even if the pre-reading process is performed, it is necessary to perform a series of data reading operations to read the data from the recording medium. Therefore, in the conventional read-ahead cache memory device, the average access time may be significantly long depending on the status of the block to be accessed.

The present invention has been made in view of these circumstances, and it is possible to further improve the cache hit rate and reduce the average access time at the time of reading data, as compared with the conventional read-ahead system device. The present invention aims to provide a new cache memory device.

[0006]

A cache memory device according to the present invention is a cache memory device for temporarily storing data read from a recording medium in response to a read request from a host computer, and data requested to be read from the host computer. On the basis of the writing position on the recording medium, the data reading position setting means for reading an area traced back by a predetermined size from the writing position, and the instruction of the data reading position setting means,
A retroactive data reading means for reading the data of the retrospective area together with the read-requested data and storing it in the cache memory means, together with the read-requested data and a predetermined position from the write position of this data. By reading the data of the area traced back in size, the cache hit rate can be improved.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 5 relate to an embodiment of the present invention, FIG. 1 is a block diagram showing a functional configuration of a cache control unit, FIG. 2 is a configuration diagram showing a schematic configuration of an information recording / reproducing system including a cache device, and FIG. Is Figure 2
4 is a block diagram showing the internal configuration of the cache device of FIG. 4, FIG. 4 is an operation explanatory diagram showing a read area at the time of reading data in the cache device of the present embodiment, and FIG. 5 is a flowchart showing a flow of operations of the cache control unit.

In the present embodiment, a configuration example in which only the cache function is an independent device is shown for the sake of clarity.

As shown in FIG. 2, the information recording / reproducing system includes a disk device 11 for reading and writing data using a recording medium such as a hard disk, a magneto-optical disk, a phase change optical disk, and the disk device 11. It comprises a host computer 9 for sending a read request and a write request, and a cache device 10 provided between the host computer 9 and the disk device 11 and having a cache function for improving the access speed. SCSI (Small Computer System I
nterface) connected by bus.

The cache function is not limited to an independent cache device, but the same effect can be obtained by providing a cache program in the host computer or a cache means in the disk controller in the disk device. . In the present embodiment, only the process of reading data from the disk device 11 will be described.

FIG. 3 shows the main internal structure of the cache device 10. The cache device 10 includes interface circuits 12 and 14 connected to a SCSI bus for exchanging commands and data with the host computer 9 and the disk device 11, respectively, and a cache for temporarily storing data read from the disk device 11. Memory 1
5, a cache control unit 13 for controlling the interface circuits 12 and 14 and the cache memory 15.
And, and each unit is connected by an internal bus.

Next, the functional configuration of the cache control unit 13 provided in the cache device 10 will be described with reference to FIG.
This will be described with reference to FIG.

The physical position of a sector on a recording medium for recording / reproducing data is represented by a track number or a sector number, but these numbers may differ depending on the type and structure of the disc. For this reason, in the standards such as SCSI, which is one of the interfaces for transferring data between the disk device and the host computer, in order to specify the position of the sector for recording / reproducing data, it is consecutive for each area. LBA with renumbered serial numbers (Logical Block Ad
dress) is used.

The cache control unit 13 is a start LBA number storage unit 1 as a functional block for tracing back the LBA number and reading data when a read request (hereinafter referred to as a read request) is received from the host computer 9. It has a data length storage unit 2, a return value storage unit 3, a hit determination unit 4, a control unit 6, a comparison subtraction unit 7, and a comparison addition unit 8. Further, as a functional block for performing prefetch processing (read ahead) when receiving a read request from the host computer 9, the control section 6, the prefetch value storage section 5, and the comparison and addition section 8 are included.

The start LBA number storage unit 1 stores the LBA number at the beginning of reading (read start) at the time of a read request. The data length storage unit 2 stores the length of data (the number of LBAs) from the start LBA number at the time of a read request. The return value storage unit 3 stores a return value (number of LBAs) for reading back from the start LBA number. The prefetch value storage unit 5 stores the prefetch value (LBA number) for performing the prefetch process. The values in the return value storage unit 3 and the prefetch value storage unit 5 may be preset fixed values or variable values.

The hit determination unit 4 receives the values of the start LBA number storage unit 1 and the data length storage unit 2 and hits the block for which the read request is made, ie, the read-requested data is stored in the cache memory 15. It is designed to determine whether or not it is stored.

The control unit 6 controls the operations of the comparison / subtraction unit 7 and the comparison / addition unit 8 based on the result of the hit determination unit 4. If the cache is hit, the comparison / subtraction unit 7
The values stored in the start LBA number storage unit 1 and the data length storage unit 2 are sent to the interface circuit 14 as they are, without performing subtraction or addition in the comparison / addition unit 8. When the cache is not hit, the comparison subtraction unit 7 and the comparison addition unit 8
The new start LBA number and the data length calculated in step 1 are sent to the interface circuit 14 via the internal bus.

When the cache is not hit, the comparison / subtraction unit 7 subtracts from the values in the start LBA number storage unit 1 and the return value storage unit 3 and adds a new start LBA number in consideration of reading back the LBA number. Is output to the internal bus. If the cache is hit, the start LB received from the host computer 9 and stored in the start LBA number storage unit 1
The A number is directly output to the internal bus.

When the cache is not hit, the comparison / addition unit 8 performs addition from the values of the data length storage unit 2, return value storage unit 3 and prefetch value storage unit 5, and reads back the LBA number and prefetch processing. A new data length (the number of LBAs) taking into consideration is obtained and output to the internal bus. When the cache is hit, the data length received from the host computer 9 and stored in the data length storage unit 2 is directly output to the internal bus.

The cache device 1 configured as described above
The operation of 0 will be described in more detail with reference to FIGS.

In the present embodiment, when a read request is received from the host computer 9, as shown in FIG. 4, a pre-reading process for reading the block for which the read request is made and the area α adjacent to this block with a large LBA number. In addition to the above, a process for reading back the area β having a small LBA number adjacent to the block for which the read request is made is performed. That is, as the block to be actually read, the data in the area including the areas α and β before and after the block for which the read request is made is read and stored in the cache memory 15 of the cache device 10.

The operation of the cache control unit 13 after receiving the read request is, as shown in FIG. 5, firstly, in step S1 (hereinafter, the steps will be omitted and simply referred to as S1). From the values of the start LBA number storage unit 1 and the data length storage unit 2, it is determined whether or not the read-requested block hits the cache.

If the block requested to be read in S2 hits the cache, the cache memory 15
Since it suffices to read the data stored in, the process proceeds to S3, and the control unit 6 sends the respective values stored in the start LBA number storage unit 1 and the data length storage unit 2 to the internal bus as they are. Then, the data stored in the cache memory 15 is read and transferred to the host computer 9 via the interface circuit 12 and the SCSI bus.

If the block for which the read request is issued does not hit the cache in S2, the process proceeds to S4, in which the return value storage unit 3, the start LBA number storage unit 1 and the comparison / subtraction unit 7 start the LBA number storage unit 1 And a subtraction from the value in the return value storage unit 3 to obtain a new start LBA number in consideration of reading back the LBA number. Here, when the start LBA number is smaller than the return value, the new start LBA number is set to 0, and when the start LBA number is larger than the return value, the difference between the two values is set to the new start LBA number.

Next, in S5, the start LBA number storage unit 1, the return value storage unit 3, the data length storage unit 2, the prefetch value storage unit 5, and the comparison and addition unit 8 are used to store the data length storage unit 2 and the return value storage unit. 3 and the value of the prefetch value storage unit 5 are added to obtain a new data length in which the read process of tracing back the LBA number and the prefetch process are taken into consideration. Where the start LBA
When the sum of the number, the data length and the prefetch value is larger than the maximum value of the LBA number, the difference between the maximum value of the LBA number and the new start LBA number is set as the new data length. When the sum is smaller than the maximum value of the LBA number, the sum of the data length, the prefetch value and the return value is set as the new data length.

After that, in S6, the control unit 6 sends the new start LBA number and data length to the internal bus and transfers them to the disk device 11 via the interface circuit 14 and the SCSI bus. In response to this, the disk device 11
At, the data in the area specified by the new start LBA number and data length is read.

The data read by the disk device 11 is transferred to the cache device 10 and stored in the cache memory 15, and only the data requested to be read is transferred to the host computer 9 via the cache device 10. With the above, the process for the read request from the host computer 9 is completed.

As described above, the present embodiment does not perform the pre-reading process of reading the block preceding the read-requested block together as in the conventional read-ahead method, but traces back from the read-requested first block. By reading the blocks together and fetching them into the cache memory, the probability that the data read into the cache memory will be hit even when accessing to random blocks or in the direction of decreasing block numbers. Get higher Therefore, the cache hit rate can be further improved as compared with the conventional read-ahead method regardless of the type of the application or the operating system (OS) or the operating status, and as a result, the average access during data read It is possible to shorten the time.

[Additional Notes] (1) Cache memory means for temporarily storing data read from a recording medium in response to a read request from the host computer, and a writing position on the recording medium for the data requested to be read by the host computer. On the basis of the data read position setting means for reading an area that is traced back by a predetermined size from the write position and the instruction of the data read position setting means, the trace area is traced back together with the data requested to be read. And a retroactive data reading unit for reading data and storing the data in the cache memory unit.

(2) The data read position setting means, based on the write position on the recording medium of the data requested to be read from the host computer, in addition to the area traced back by a predetermined size from the write position, An area of a predetermined size ahead of the write position is to be read, and further, based on an instruction of the data read position setting means, the read-requested data and the data of the traced area are used together with the previous area. 2. The cache memory device according to appendix 1, further comprising pre-read data reading means for reading data in the area and storing the read data in the cache memory means.

(3) The data read position setting means uses, as the write position, an LBA (Logical Block Ad) indicating a track position and a sector position on the recording medium.
3. The cache memory device according to appendix 1 or 2, wherein a dress) is used.

(4) The data read position setting means uses a start LBA number and a data length as a write position on the recording medium for the data requested to be read, and traces back a predetermined amount from the start LBA number. It has subtraction means for subtracting the return value to obtain a new start LBA number, and addition means for adding the return value to the data length to obtain a new data length. These new start LBA number and new 4. The cache memory device according to appendix 3, wherein the data read area is set according to a different data length.

(5) The data read position setting means uses a start LBA number and a data length as a write position on the recording medium for the data requested to be read, and traces back a predetermined amount from the start LBA number. Subtracting means for subtracting the return value to obtain a new start LBA number, and the data length and the return value together with a look-ahead value indicating an area of a predetermined size ahead of the final position of the read-requested data. 4. The cache memory device according to appendix 3, further comprising: an addition unit that obtains a new data length, and the data read area is set by the new start LBA number and the new data length.

(6) Cache hit determining means for determining whether or not the data requested to be read from the host computer is stored in the cache memory means, and the data requested to be read is stored in the cache memory means. And a cache control unit for reading the data of the traced area together with the read-requested data and storing the read data in the cache memory unit. Cache memory device.

(7) In a cache memory device having cache memory means for temporarily storing data read from a recording medium in response to a read request from the host computer, the host computer requests to read data recorded in the recording medium. When there is, based on the writing position on the recording medium of the data requested to be read from the host computer, a data reading position setting procedure for reading a region that is traced back by a predetermined size from the writing position, and A retrospective data reading procedure for reading out the data in the area traced back together with the data requested to be read out and storing it in the cache memory means based on the set data read position information. .

(8) In a cache memory device having cache memory means for temporarily storing data read from a recording medium in response to a read request from the host computer, a read request for data recorded in the recording medium from the host computer. Then, based on the writing position on the recording medium of the data requested to be read from the host computer, in addition to the area traced back by a predetermined size from this writing position, a predetermined size ahead of this writing position. Data read position setting procedure for reading an area of the above, and the cache of the cache by reading the data of the previous area together with the data of the read requested data and the data of the traced area based on the set data read position information. Retrospective and readahead data reading stored in memory means A cache memory management method, comprising:

[0037]

As described above, according to the present invention, it is possible to further improve the cache hit rate and reduce the average access time at the time of reading data, as compared with the conventional read-ahead system device. effective.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a functional configuration of a cache control unit in a cache device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram showing a schematic configuration of an information recording / reproducing system including a cache device.

FIG. 3 is a block diagram showing an internal configuration of the cache device of FIG.

FIG. 4 is an operation explanatory view showing a read area at the time of reading data in the cache device of the present embodiment.

FIG. 5 is a flowchart showing a flow of operations of a cache control unit.

[Explanation of symbols]

 1 ... Start LBA number storage unit 2 ... Data length storage unit 3 ... Return value storage unit 4 ... Hit determination unit 5 ... Prefetch value storage unit 6 ... Control unit 7 ... Comparison subtraction unit 8 ... Comparison addition unit 9 ... Host computer 10 ... Cache device 11 ... Disk device 12, 14 ... Interface circuit 13 ... Cache control unit 15 ... Cache memory

Claims (2)

[Claims] 1. A cache memory means for temporarily storing data read from a recording medium in response to a read request from a host computer; and a writing position on the recording medium of data requested to be read from the host computer, Based on an instruction from the data read position setting means for reading an area which is traced back by a predetermined size from the write position, and the data of the traced area is read together with the data requested to be read. A cache memory device comprising: retrospective data reading means for storing in the cache memory means. 2. The data read position setting means, based on the write position of the data requested to be read from the host computer on the recording medium, in addition to the area traced back by a predetermined size from the write position, An area that is a predetermined size ahead of the writing position is to be read, and further, based on an instruction from the data read position setting means, the read-requested data and the data of the traced area are added to the preceding area. 2. The cache memory device according to claim 1, further comprising prefetch data reading means for reading the data of the above and storing it in the cache memory means.