JPH09121101A - High frequency switch - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow the small-sized high frequency switch with a small number of components to be applied to a detected diversity type portable telephone set. SOLUTION: A high frequency switch circuit 2 of a high frequency switch 1 has a distributed constant line 5a connected between an antenna port ANT1 and a reception circuit port R×1 and a 1st diode 8a connected between a connecting point A and a ground potential point, a high frequency switch circuit 3 has a distributed constant line 5b connected between an antenna port ANT2 and a reception circuit port R×2 and a 2nd diode 8b connected between a connecting point B and a ground potential point, and a high frequency switch circuit 4 has a 3rd diode 13a connected between an antenna port ANT1 and a transmission circuit port Tx and a 4th diode 13b connected between an antenna port ANT2 and the transmission circuit port Tx. The opening/closing or the switching among the ports is conducted by making the 1st to 4th diodes conductive/nonconductive.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency switch for switching a signal path in a high frequency circuit such as a mobile phone, and more particularly to a high frequency switch having five ports and utilizing a diode and a distributed constant line. Regarding

[0002]

2. Description of the Related Art Some portable telephones use a post-detection diversity method in order to reduce the influence of quality deterioration of received waves due to fading. The post-detection diversity method is a method in which a plurality of antennas are switched and received by a receiving circuit. When the influence of fading of a received wave from one antenna becomes large, the other antenna is switched to receive. This reduces the influence of fading by switching the antenna.
As such a post-detection diversity type antenna changeover switch, for example, a switch circuit shown in FIG. 4 has been conventionally used.

The switch circuit 51 shown in FIG. 4 has a structure in which switches 52 to 54 having three ports are connected. The switch 52 has a first port P21, a second port P22, and a third port P23. Similarly, switch 5
3, 54 are first to third ports P31, P32, P3.
3, P41, P42 and P43. Switch 52
The receiving unit Rx1 is connected to the first port P21 of the above, and the antenna ANT1 is connected to the second port P22 thereof. Then, the second port P22 is configured to be switched to the first port P21 or the third port P23, and the third port P23 is connected to the first port P41 of the switch 54.

In the switch 53, the second port P32 is
It is configured to be switched to the first port P31 or the third port P33. Then, the first port P31 is connected to the reception unit Rx2, the second port P32 is connected to the antenna ANT2, and the third port P3 is connected.
33 is connected to the third port P43 of the switch 54.

In the switch 54, the second port P42 is
It is configured to be switched to the first port P41 or the third port P43. Then, the first port P41 is connected to the third port P23 of the switch 52, the second port P42 is connected to the transmitter Tx,
The third port P43 is the third port P3 of the switch 53.
Connected to 3.

By this switch circuit 51, between the antenna ANT1 and the receiving circuit Rx1 or the antenna A
Two antennas are selected by switching the receiving circuit between NT2 and the receiving circuit Rx2 and switching the connection between the two antennas ANT1 and ANT2 and the transmitting circuit Tx.

By the way, the 3-port type switch 52,
Generally, pin diode switches or GaAs semiconductor switches are known as 53 and 54.

[0008]

However, in the conventional switch circuit using the pin diode switch, it is difficult to reduce the size because many discrete parts are used. Further, it is necessary to route the choke coil and the strip line on the substrate, and it is difficult to make the device compact from this point of view.

On the other hand, in a conventional switch circuit using a GaAs semiconductor switch, a negative power source is required and the number of pins is increased, so that it is difficult to miniaturize the switch circuit.

Further, there is a problem that the cost is increased because a matching circuit needs to be designed and three switches are required.

An object of the present invention is to solve the above problems, and it is an object of the present invention to provide a high frequency switch that can be used in a diversity type mobile phone after detection.

[0012]

In order to solve the above-mentioned problems, the present invention has first to fifth ports.
High frequency switch circuit for opening and closing the connection between the port and the third port, a second high frequency switch circuit for opening and closing the connection between the second port and the fourth port, and a third port And a fifth port, and a fourth high frequency switch circuit for switching connections between the fourth port and the fifth port, wherein the first high frequency switch circuit is the first high frequency switch circuit. A first distributed constant line connected between a first port and a third port, and a connection point between the first port and the first distributed constant line and a reference potential And a first diode connected to a connection point between the first diode and the reference potential.
Control voltage terminal, and a second distributed constant line connected between the connection point between the third port and the first distributed constant line and the reference potential. The second high frequency switch circuit includes a third distributed constant line connected between the second port and the fourth port, and a connection between the second port and the third distributed constant line. A second diode connected between the point and the reference potential;
A second control voltage terminal connected to a connection point between the diode of the above and the reference potential, the fourth port and the third
Of distributed constant lines and a fourth distributed constant line connected between the reference potential and the second distributed constant line of the first high-frequency switch circuit. One end and a third control voltage terminal connected to a common connection point to which one end of the fourth distributed constant line of the second high-frequency switch circuit is connected, respectively;
The high frequency switch circuit of the third port and the fifth port.
A third diode and a fourth diode, which are connected in opposite directions to the fifth port, between the fourth port and the fourth port, and between the fourth port and the fifth port; A fifth distributed constant line connected between the anode of the diode and the reference potential; a sixth distributed constant line connected between the anode of the fourth diode and the reference potential; A fifth control voltage terminal connected to a connection point between the distributed constant line 5 and the reference potential, and a fifth control voltage terminal connected to a connection point between the sixth distributed constant line and the reference potential. And a seventh distributed constant line connected between the cathode of the third diode and the reference potential, and between the cathode of the fourth diode and the reference potential. An eighth distributed constant line; and the seventh
Control voltage terminal connected to a connection point between the distributed constant line and the reference potential, and a seventh control voltage connected to a connection point between the eighth distributed constant line and the reference potential And a voltage terminal.

At least one of the first to seventh control voltage terminals is connected to each of the connection points via a first resistor.

Further, at least one of the first to fifth ports is connected to the reference potential via a first capacitor.

Further, a second resistor connected in parallel to at least one of the first to fourth diodes is provided.

Further, a ninth distributed constant line and a second capacitor connected in parallel to at least one of the first to fourth diodes and connected in series with each other are provided. To do.

Thus, according to the high frequency switch of the present invention, the first and second high frequency switch circuits include the first distributed constant line between the first port and the third port and the second distributed constant line.
The third distributed constant line is connected between the port and the fourth port. The cathode of the first diode is connected between the first port and the first distributed constant line,
The diode anode is connected to a reference potential. The cathode of the second diode is connected between the second port and the third distributed constant line, and the anode of the second diode is connected to the reference potential. Furthermore, the third high-frequency switch circuit includes the fifth port and the fifth port, which are opposite to each other with respect to the fifth port, between the third port and the fifth port and between the fourth port and the fifth port. The diode is connected.

Therefore, when a predetermined control voltage is applied to the first to seventh control voltage terminals so that the first to fourth diodes are turned on or off, the third and third control voltage terminals are controlled. State in which 5 ports are connected (first connection state), state in which 4th and 5th ports are connected (second connection state), between 1st port and 3rd port, and 2nd port It is possible to realize a state in which the third port and the fourth port are simultaneously connected (third connection state).

Further, fifth and sixth distributed constant lines are connected between the third port and the third diode and between the fourth port and the fourth diode, and the other end is connected to the reference potential. Connected. Also, the fifth port and the third and fourth
The seventh and eighth distributed constant lines are connected to the diode and the other end is connected to the reference potential. This prevents the high frequency signal from leaking from the high frequency transmission line between the ports to the reference potential side.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of a high frequency switch according to the present invention. This high-frequency switch is a 5-port high-frequency switch having five ports for switching connection between two antennas, two receiving circuits, and one transmitting circuit.

In the high frequency switch 1, a first high frequency switch circuit 2 is arranged between a first receiving circuit port Rx1 as the first port P1 and a first antenna port ANT1 as the third port P3. The second high-frequency switch circuit 3 is arranged between the second receiving circuit port Rx2 serving as the 2-port P2 and the second antenna port ANT2 serving as the fourth port P4, and further, the first antenna port A
It has a circuit configuration in which the third high-frequency switch circuit 4 is arranged between the NT1 and the second antenna port ANT2 and the transmission circuit port Tx as the fifth port P5. The high frequency switch 1 is configured on one chip, for example.

In the first high-frequency switch circuit 2, the first distributed constant line 5a is connected between the first antenna port ANT1 and the first receiving circuit port Rx1. First
One end of the distributed constant line 5a is connected to the first receiving circuit port Rx1 via the capacitor 6a, and the other end of the first distributed constant line 5a is connected to the first antenna port ANT1 via the capacitor 7a. Has been done.

Further, a series circuit of the first diode 8a and the capacitor 9a is connected between the connection point A of the first distributed constant line 5a and the capacitor 6a and the reference potential, that is, the ground potential. Diode 8a and capacitor 9a
The first control voltage terminal V1 is connected to the connection point C of 1 through the first resistor 10. Then, one end of the second distributed constant line 11a is connected to the connection point E between the first distributed constant line 5a and the capacitor 7a.

In the second high frequency switch circuit 3, the third distributed constant line 5b is connected between the second antenna port ANT2 and the second receiver circuit port Rx2. Third
One end of the distributed constant line 5b is connected to the second receiving circuit port Rx2 via the capacitor 6b, and the other end of the third distributed constant line 5b is connected to the second antenna port ANT2 via the capacitor 7b. Has been done.

Further, a series circuit of the second diode 8b and the capacitor 9b is connected between the connection point B of the third distributed constant line 5b and the capacitor 6b and the ground potential.
The second control voltage terminal V2 is connected to the connection point D between the diode 8b and the capacitor 9b via the first resistor 10. Then, one end of the fourth distributed constant line 11b is connected to a connection point F between the third distributed constant line 5b and the capacitor 7b.

Further, the second and fourth distributed constant lines 11
The other ends of a and 11b are respectively connected to the common connection point G, and the third connection voltage terminal V3 is connected to the common connection point G via the first resistor 10 and the common connection point G and the ground potential. A capacitor 12 is connected between the and.

On the other hand, in the third high-frequency switch circuit 4, the third diode 13a is provided between the first antenna port ANT1 and the transmission circuit port Tx, and the second antenna port ANT2 and the transmission circuit port Tx are provided. The fourth diode 13b is connected between the two.

Here, the anode of the third diode 13a is connected to the first antenna port ANT1 via the capacitor 14a, and the cathode of the third diode 13a is connected to the transmitter circuit port Tx via the capacitor 15a.
It is connected to the. The anode of the fourth diode 13b is connected to the second antenna port ANT2 via the capacitor 14b, and the cathode of the fourth diode 13b is connected to the transmission circuit port Tx via the capacitor 15b. .

Further, between the connection point H between the third diode 13a and the capacitor 14a and the ground potential, a series circuit of the fifth distributed constant line 16a and the capacitor 17a is connected, and the fifth distribution Constant line 16a and capacitor 1
The fourth control voltage terminal V4 is connected to the connection point L of 7a via the first resistor 10. Further, a series circuit of the sixth distributed constant line 16b and the capacitor 17b is connected between the connection point I between the fourth diode 13b and the capacitor 14b and the ground potential, and the sixth distributed constant line 1 is connected.
At the connection point M between 6b and the capacitor 17b, the first resistor 1
The fifth control voltage terminal V5 is connected via 0.

Further, between the connection point J between the third diode 13a and the capacitor 15a and the ground potential, a series circuit of the seventh distributed constant line 18a and the capacitor 19a is connected, and the seventh distribution. Constant line 18a and capacitor 1
The sixth control voltage terminal V6 is connected to the connection point N of 9a via the first resistor 10. Further, a series circuit of the eighth distributed constant line 18b and the capacitor 19b is connected between the connection point K between the fourth diode 13b and the capacitor 15b and the ground potential, and the eighth distributed constant line 1 is connected.
At the connection point O between 8b and the capacitor 19b, the first resistor 1
The seventh control voltage terminal V7 is connected via 0.

At this time, the first to eighth distributed constant lines 5
a, 11a, 5b, 11b, 16a, 16b, 18a,
18b is a stripline having a length of λ / 4 or less, a microstripline, where λ is the wavelength of the high-frequency signal flowing through the first to third high-frequency switch circuits 2-4.
It is composed of coplanar guidelines. The first to eighth distributed constant lines 5a, 11a, 5b, 11b,
Although 16a, 16b, 18a, and 18b are so-called λ / 4 lines, they are actually affected by the inductance of the strip line and the stray capacitance.
It is configured to have the following lengths.

High frequency switch 1 constructed as described above
The operation will be described with reference to the control operation explanatory diagram shown in Table 1. In Table 1, [V1 to V7] is a control voltage applied to each control voltage terminal V1 to V7 (+ is a positive voltage,
0 indicates a ground voltage), [ANT1-Tx] indicates an open / closed state (◯ indicates a connected state, x indicates an open state) between the first antenna port ANT1 and the transmission circuit port Tx,
[ANT2-Tx] is the port ANT for the second antenna
2 indicates the open / closed state between the transmission circuit port Tx and the transmission circuit port Tx (o is connected, x is open), and [Rx1-ANT1] is the first
Receiver circuit port Rx1 and first antenna port A
The open / closed state with the NT1 (○ is connected, × is open), and [Rx2-ANT2] is the open / closed state between the second receiver circuit port Rx2 and the second antenna port ANT2. (○ indicates connection, × indicates open).

[0034]

[Table 1]

(1) In the case of only the transmission state from the first antenna (first connection state) First, in the third high-frequency switch circuit 4, a positive power source is applied to the fourth and seventh control voltage terminals V4 and V7. A voltage is applied, and further, a ground potential, that is, 0 [V] is applied to the fifth and sixth control voltage terminals V5 and V6. As a result, a forward bias is applied to the third diode 13a,
The diode is turned on, a reverse bias is applied to the fourth diode 13b, and the diode is turned off.

Therefore, the first antenna port ANT1
And a transmission circuit port Tx are formed with a high-frequency signal transmission line, and a high-frequency signal transmission line is not formed between the second antenna port ANT2 and the transmission circuit port Tx. Looking at the fifth to eighth distributed constant lines 16a, 16b, 18a, 18b from the connection points H to K, the impedance is infinite, so that the high-frequency signal for transmission has a connection point H to K. There is no transmission from K to the ground side.

Further, in this mode, the first and second receiving circuit ports Rx1 and Rx2 are not connected to the first and second antenna ports ANT1 and ANT2.
Therefore, the first and second high-frequency switch circuits 2 and 3 are both set in a state in which the transmission path of the high-frequency signal is closed. That is, the first and second high frequency switch circuits 2, 3
Then, a positive power supply voltage is applied to the third control voltage terminal V3, and a ground potential is further applied to the first and second control voltage terminals V1 and V2, so that the first and second diodes 8a and 8a
b is set to the on state.

(2) In the case of only the transmission state from the second antenna (second connection state) In this case, the operations of the first and second high frequency switch circuits 2 and 3 are the same as those in the above-mentioned first connection state. Since it is similar to the case, only the operation of the third high-frequency switch circuit 4 will be described.

That is, the fifth and sixth control voltage terminals V
A positive power supply voltage is applied to V5 and V6, and 0 [V] is applied to the fourth and seventh control voltage terminals V4 and V7. As a result, a forward bias is applied to the fourth diode 13b to turn it on, and a reverse bias is applied to the third diode 13a to turn it off.

Therefore, the second antenna port ANT2
And a transmission circuit port Tx are formed with a high-frequency signal transmission line, and a high-frequency signal transmission line is not formed between the first antenna port ANT1 and the transmission circuit port Tx.

(3) In case of reception by the first and second antennas (third connection state) First, in the first and second high frequency switch circuits 2 and 3, the first and second control voltage terminals V1 , V2, a positive power supply voltage is applied, and further, 0 is applied to the third control voltage terminal V3.
[V] is applied. As a result, reverse bias is applied to the first and second diodes 8a and 8b, and they are simultaneously turned off.

In the third high frequency switch circuit 4, a positive power supply voltage is applied to the sixth and seventh control voltage terminals V6 and V7, and further the fourth and fifth control voltage terminals V are applied.
0 [V] is applied to 4 and V5. As a result, reverse bias is applied to the third and fourth diodes 13a and 13b, and at the same time, they are turned off.

Therefore, the first antenna port ANT1
And the first receiving circuit port Rx1 and between the second antenna port ANT2 and the second receiving circuit port Rx2.
At the same time, a transmission line for high-frequency signals is formed between and.

As described above, according to the high frequency switch 1 of this embodiment, at least three terminals of the voltages applied to the first to seventh control voltage terminals V1 to V7 can be set to the ground potential. It is sufficient to supply one kind of voltage, for example, a positive or negative power supply voltage. Therefore, it is possible to simplify the voltage supply wiring pattern, and thereby the printed circuit board on which the high frequency switch 1 is mounted can be downsized.

In the first to third connection states, the first and third distributed constant lines 5a and 5b and the third and fourth diodes 1 are provided between the pair of connected ports.
Either one of 3a and 13b is present. That is, in the first connection state, the third and fifth ports P3, P5
If a high-frequency signal is passed between them, this high-frequency signal is
Since the current flows only in the diode 13a, the insertion loss can be reduced.

Further, the second and fourth to eighth distributed constant lines 11a, 11b, 16a, 16b, 18a and 18b are
The control current is applied to the first to fourth diodes 8a, 8b, 13
a current path for flowing to a and 13b,
Since the impedance on the distributed constant line side viewed from the connection points E, F, H, I, J, and K is increased, the insertion loss and the reflection loss can be reduced.

The first to third high frequency switch circuits 2 are also provided.
Since 4 to 4 are built in, for example, one chip, one high-frequency switch can cover switching at three locations, and the number of parts can be reduced. Therefore, it is possible to reduce the size and cost of the high frequency switch.

Further, the first to third control voltage terminals V1 to V1
The power supply voltage applied to V3 controls the opening and closing of the first and second high-frequency switch circuits 2 and 3, so that the first port P
It is possible to connect the first port 3 and the third port P3 and the second port P2 and the fourth port P4 at the same time.

The positive power supply voltage may be changed to the ground potential, and the negative power supply voltage may be added to the ground potential. In that case, in the first connection state, the ground potential, that is, 0 [V] is applied to the third, fourth, and seventh control voltage terminals V3, V4, and V7, and the first, second, and A negative power supply voltage may be applied to the fifth and sixth control voltage terminals V1, V2, V5 and V6. The same applies when the second and third connection states are realized.

Further, the first to fourth diodes 8a, 8
The connection direction of b, 13a, and 13b is not limited to the embodiment shown in FIG. 1, and the connection may be opposite to that shown in FIG. That is, the first to fourth diodes 8a,
8b, 13a, 13b anodes are connection points C, D, J,
On the K side, the first to fourth diodes 8a, 8b, 13a,
First to fourth diodes 8a, 8b, 13a, 13b so that the cathode of 13b is on the connection points A, B, H, I side.
May be connected. In this case, since the polarities of the first and second diodes are opposite to those of the embodiment shown in FIG. 1, the positive power supply voltage and the ground potential shown in Table 1 are changed to the ground potential and the positive potential, respectively. It suffices to select the power supply voltage of.

Further, the first resistor 10 has connection points C, D, G, L from the first to seventh control voltage terminals V1 to V7.
Since it is provided to adjust the values of the first to seventh control voltages applied to the high frequency switch 1 via M, N and O, it can be omitted as necessary. Is a direct connection point C, D, G, L, M, N, O
~ Connected to the seventh control voltage terminals V1 to V7.

Further, all the capacitors fulfill the function of bias cutting or power supply coupling, but they may be omitted if necessary.

Further, in the above embodiment, the case where the first control voltage terminal V1 and the second control voltage terminal V2 are separated has been described, but they may be combined into one control voltage terminal.

In the above embodiment, the case where the third control voltage terminal V3 is combined into one control voltage terminal has been described, but it may be separated into a plurality of control voltage terminals.

Next, a preferred modification of the high frequency switch 1 will be described. As shown by a broken line in FIG. 1, preferably, a first capacitor 20 may be connected between the connection points A, B, E, F, H, I, J, and K, respectively, and the reference potential. . In this case, the characteristic impedance can be corrected by selecting the capacitance of the first capacitor 20, and thereby the insertion loss and reflection loss of the high frequency switch 1 can be effectively reduced. In addition, the second and fourth to eighth distributed constant lines 11a and 11b,
The lengths of 16a, 16b, 18a, and 18b can be shortened, whereby the high frequency switch 1 can be downsized.

It should be noted that all the first capacitors 20 do not necessarily have to be used, and may be connected only to the necessary parts as needed.

Next, a more preferable modification applicable to the high frequency switch of the above embodiment will be described with reference to FIGS. In the modifications shown in FIGS. 2 and 3, each circuit element described below is connected to an arbitrary diode among the first to fourth diodes 8a, 8b, 13a, 13b. 2 and 3, the first to fourth diodes 8a, 8b, 13
A portion provided in the first diode 8a will be described on behalf of a and 13b.

As shown in FIG. 2, in the first modification, the second resistor 21 is connected in parallel with the first diode 8a. When in the off state, the first diode 8a functions as a capacitor in terms of direct current. Therefore, in the off state, the accumulated charge flows at the same time when the first diode 8a is turned on, but in the configuration shown in FIG. 2, the accumulated charge is discharged to the second resistor 21 and the first charge is discharged. The switching operation of the diode 8a from the off state to the on state is smoothed.

Further, in the modification shown in FIG. 3, the ninth distributed constant line 22 and the second capacitor 23 connected in series with each other are connected in parallel to the first diode 8a. In this configuration, the parallel resonance circuit is configured by the capacitance of the first diode 8a in the off state and the inductance of the ninth distributed constant line 22. Therefore,
By adjusting the inductance of the ninth distributed constant line 22 so that the resonance frequency of the parallel resonance circuit matches the frequency of the transmitted high frequency signal, the impedance of the first diode 8a in the off state is increased. You can As a result, the isolation characteristic of the first diode 8a in the off state can be improved.
The second capacitor 23 is connected to the ninth distributed constant line 2
2 is provided to prevent the direct current from bypassing.

The ninth distributed constant line 22 is composed of a strip line, a micro strip line, a coplanar guide line, etc., and its length and impedance are such that the resonance frequency of the parallel resonance circuit matches the frequency of the high frequency signal. To be chosen.

[0061]

According to the high frequency switch of the first aspect, among the voltages applied to the first to seventh control voltage terminals, at least three terminals can be set to the ground potential, so that one kind of voltage, for example, A positive or negative power supply voltage may be supplied. Therefore, it is possible to simplify the voltage supply wiring pattern, and thereby the printed circuit board on which the high frequency switch is mounted can be downsized.

The first port is provided between the pair of connected ports.
And a third distributed constant line, and any one of the third and fourth diodes. Therefore, the high frequency signal is transmitted to the first and third distributed constant lines and the third and fourth distributed constant lines.
Since it will flow to any one of the diodes,
Insertion loss can be reduced.

Further, the first to eighth distributed constant lines form a current path for flowing the control current to the first to fourth diodes, and the impedance on the distributed constant line side seen from each connection point is set. Since it is increased, it is possible to reduce insertion loss and reflection loss.

Since the first to third high-frequency switch circuits are built in one chip, they are
One high-frequency switch can be used for switching between locations, and the number of parts can be reduced. Therefore, it is possible to reduce the size and cost of the high frequency switch.

Further, in order to control the opening and closing of the first and second high-frequency switch circuits with the power supply voltage applied to the first to third control voltage terminals, between the first port and the third port, Also, it becomes possible to connect the second port and the fourth port at the same time.

According to the high frequency switch of the second aspect, the first
The values of the first to seventh control voltages and control currents can be easily adjusted by the resistance value of the resistor.

According to the high frequency switch of the third aspect, the characteristic impedance can be corrected by selecting the capacitance of the capacitor, whereby the insertion loss and the reflection loss can be effectively reduced. In addition, it is possible to shorten the length of the first to eighth distributed constant lines,
As a result, the high frequency switch can be downsized.

According to the high frequency switch of the fourth aspect, the charges accumulated in the electrostatic capacitance when the diode is in the off state are discharged to the resistor at the same time when the diode is in the on state. Therefore, the switching operation from the off state to the on state of the diode can be facilitated. In addition, it is possible to stabilize the reverse bias of the diode when it is off.

According to the high frequency switch of the fifth aspect, the parallel resonant circuit is constituted by the capacitance in the off state of the diode and the inductance of the ninth distributed constant line. Therefore, by configuring the resonance frequency of this parallel resonance circuit to match the frequency of the high-frequency signal transmitted to the high-frequency switch, the impedance in the off state of the diode can be increased, and as a result, the isolation characteristics can be improved. Can be increased. In addition, the second capacitor can prevent direct-current bypass to the circuit portion including the ninth distributed constant line.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of a high frequency switch according to the present invention.

FIG. 2 is a circuit diagram for explaining a preferable modified example of the high frequency switch.

FIG. 3 is a circuit diagram for explaining another example of a preferable modification example of the high frequency switch.

FIG. 4 is a schematic configuration diagram for explaining a conventional high frequency switch circuit.

[Explanation of symbols]

 1 high frequency switch 2 1st high frequency switch circuit 3 2nd high frequency switch circuit 4 3rd high frequency switch circuit 5a 1st distributed constant line 5b 3rd distributed constant line 8a 1st diode 8b 2nd diode 10th 1 resistance 11a 2nd distributed constant line 11b 4th distributed constant line 13a 3rd diode 13b 4th diode 16a 5th distributed constant line 16b 6th distributed constant line 18a 7th distributed constant line 18b 8 distributed constant line 20 1st capacitor 21 2nd resistance 22 9th distributed constant line 23 2nd capacitor P1-P5 1st-5th ports V1-V7 1st-7th control voltage terminals

Claims (5)

[Claims] 1. A first high-frequency switch circuit having first to fifth ports for opening and closing a connection between the first port and the third port, and a second port and a fourth port. A second high-frequency switch circuit for opening and closing the connection between the third port and the fifth port, and a third high-frequency switch circuit for switching the connection between the third port and the fifth port and between the fourth port and the fifth port. A high frequency switch, wherein the first high frequency switch circuit includes a first distributed constant line connected between the first port and a third port, the first port and the first port. A first diode connected between a connection point with the distributed constant line and a reference potential, and a first control voltage connected with a connection point between the first diode and the reference potential A terminal and a connection between the third port and the first distributed constant line And a second distributed constant line connected between the second high-frequency switch circuit and the reference potential, and the second high-frequency switch circuit is connected between the second port and the fourth port. Distributed constant line, a second diode connected between a connection point between the second port and the third distributed constant line and a reference potential, the second diode and the reference. A second control voltage terminal connected to a connection point between the potential and a second control voltage terminal connected between the connection point between the fourth port and the third distributed constant line and the reference potential. 4 distributed constant lines, and one end of the second distributed constant line of the first high-frequency switch circuit and the fourth end of the second high-frequency switch circuit.
And a third control voltage terminal connected to a common connection point to which one end of each of the distributed constant lines is connected, wherein the third high-frequency switch circuit includes the third port and the fifth port. Between the third port and the fourth port and between the fourth port and the fifth port, the third and fourth diodes connected in opposite directions to the fifth port, and the third diode. A fifth distributed constant line connected between the anode and the reference potential, a sixth distributed constant line connected between the anode of the fourth diode and the reference potential, and the fifth distributed constant line. A fourth control voltage terminal connected to a connection point between the distributed constant line and the reference potential, and a fifth control connected to a connection point between the sixth distributed constant line and the reference potential. A voltage terminal, a cathode of the third diode and the base A seventh distributed constant line connected to the quasi-potential, and an eighth distributed constant line connected to the cathode of the fourth diode and the reference potential;
A sixth control voltage terminal connected to a connection point between the seventh distributed constant line and the reference potential, and a sixth control voltage terminal connected to a connection point between the eighth distributed constant line and the reference potential. 7. A high-frequency switch, comprising: 7 control voltage terminals. 2. The high frequency switch according to claim 1, wherein at least one of the first to seventh control voltage terminals is connected to each of the connection points via a first resistor. 3. The method according to claim 1, wherein at least one of the first to fifth ports is connected to the reference potential via a first capacitor.
The high frequency switch described in any one of 1. 4. The high frequency switch according to claim 1, further comprising a second resistor connected in parallel to at least one of the first to fourth diodes. 5. A ninth distributed constant line and a second capacitor which are connected in parallel to at least one of the first to fourth diodes and which are connected in series with each other. The high frequency switch according to any one of claims 1 to 4.