JPH09120082A - Active matrix type liquid crystal display device - Google Patents

Active matrix type liquid crystal display device

Info

Publication number
JPH09120082A
JPH09120082A JP27606795A JP27606795A JPH09120082A JP H09120082 A JPH09120082 A JP H09120082A JP 27606795 A JP27606795 A JP 27606795A JP 27606795 A JP27606795 A JP 27606795A JP H09120082 A JPH09120082 A JP H09120082A
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal display
active matrix
type liquid
display pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27606795A
Other languages
Japanese (ja)
Inventor
Katsuhiko Inada
克彦 稲田
Yoshiharu Izuki
義治 伊月
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP27606795A priority Critical patent/JPH09120082A/en
Publication of JPH09120082A publication Critical patent/JPH09120082A/en
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a sufficient contact without lowering opening rate by forming the contact parts between source electrodes and display pixel electrodes by utilizing the outer peripheral parts of the display pixel electrodes. SOLUTION: Scanning lines 50 and signal lines 51 continuous across the respective pixels are arrayed in a matrix form and thin-film transistors(TFTs) 52 are formed in the crossing point parts thereof. These TFTs 52 are constituted of gate electrodes integral with the scanning lines 50 and source electrodes 7 and drain electrodes 8 formed to face each other via gate insulating films and semiconductor layers thereon. In this case, the junctures of the source electrodes 7 and the display pixel electrodes 9 are so formed as to enclose the display pixel electrodes 9 along the three sides of the display pixel electrodes 3 and have the parts along the longitudinal direction of the channels of the TFTs 52 and the parts 10 extending to both sides of the display pixel electrodes 9 along the transverse direction of the channels. Further, the junctures 10 are so disposed as to be superposed on storage capacitance electrodes 3.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】TECHNICAL FIELD OF THE INVENTION

【0002】[0002]

【従来の技術】以下に、薄膜トランジスタ(Thin Film
Transistor:以下TFTと略称する)をスイッチ素子と
して表示画素電極アレイを構成したアクティブマトリク
ス型液晶表示装置を例にあげて、従来の技術を説明す
る。
2. Description of the Related Art Thin film transistors (Thin Film) are described below.
A conventional technique will be described by taking as an example an active matrix type liquid crystal display device in which a display pixel electrode array is configured by using a transistor (hereinafter abbreviated as TFT) as a switch element.

【0003】アクティブマトリクス型液晶表示装置の基
本構成は、表示画素電極アレイの形成されたアレイ電極
と対向電極の形成された対向基板との間隙に液晶物質を
封入してなる。図5は、アレイ基板の一画素の概略平面
図を示す。アレイ基板上には、TFT52及びTFT5
2のソース電極7に接続された透明な表示画素電極9が
マトリクス状に形成され、さらに行方向に配列された各
TFTのゲートに共通に接続された走査線50、及び列
方向に配列された各TFTのドレイン電極8に共通に接
続された信号線51、表示画素電極9に絶縁層を介して
相対して配置され、蓄積容量を構成する蓄積容量線3等
が、必要に応じて形成されている。
The basic structure of an active matrix type liquid crystal display device is that a liquid crystal substance is sealed in a gap between an array electrode on which a display pixel electrode array is formed and a counter substrate on which a counter electrode is formed. FIG. 5 shows a schematic plan view of one pixel of the array substrate. The TFT 52 and the TFT 5 are provided on the array substrate.
The transparent display pixel electrodes 9 connected to the two source electrodes 7 are formed in a matrix, and further, the scanning lines 50 commonly connected to the gates of the respective TFTs arranged in the row direction, and the scanning lines 50 arranged in the column direction. A signal line 51 commonly connected to the drain electrode 8 of each TFT, a storage capacitor line 3 and the like which are arranged opposite to the display pixel electrode 9 via an insulating layer and constitute a storage capacitor are formed as necessary. ing.

【0004】ところで、アクティブマトリクス型液晶表
示装置においては、低消費電力化や表面輝度の向上が求
められており、光を透過する面積比をあらわす開口率を
高くすることが重要な技術課題となっている。開口率を
高くするためには、一画素の透明な画素電極の占める面
積をできるだけ大きくし、遮光膜である走査線、信号
線、蓄積容量線などの配線、あるいはTFTの占める面
積をできるだけ小さくすることが必要である。具体的に
は、配線幅はできるだけ細く、TFTのサイズはできる
だけ小さくすることが開口率の向上につながる。
By the way, in the active matrix type liquid crystal display device, lower power consumption and improvement of surface brightness are required, and it is an important technical subject to raise the aperture ratio which represents the area ratio of transmitting light. ing. In order to increase the aperture ratio, the area occupied by the transparent pixel electrode of one pixel is made as large as possible, and the area occupied by the scanning line, the signal line, the storage capacitor line or the like, which is a light shielding film, or the TFT is made as small as possible. It is necessary. Specifically, making the wiring width as narrow as possible and the TFT size as small as possible leads to an improvement in the aperture ratio.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、走査
線、信号線などの配線幅を細くすると、断線確率が増
し、歩留まりの低下が問題となる。また、蓄積容量線を
細くすると、所望の容量値が得られなくなり、画素電極
電位の変動や、クロストークが増加するおそれがある。
またTFTのサイズを小さくすると、画素を駆動する能
力が不足して、コントラスト比の低下などがおこるおそ
れがある。本発明は、このような技術的背景に鑑み、製
造歩留まりの低下や、画質の劣化を引き起こすことな
く、開口率を向上させることを目的とする。
However, if the wiring width of the scanning line, the signal line, etc. is reduced, the probability of disconnection increases and the yield decreases. Further, if the storage capacitance line is made thin, a desired capacitance value cannot be obtained, and there is a possibility that fluctuations in pixel electrode potential and crosstalk will increase.
Further, when the size of the TFT is reduced, the ability to drive the pixel is insufficient, and the contrast ratio may be lowered. In view of such technical background, it is an object of the present invention to improve the aperture ratio without lowering the manufacturing yield or deteriorating the image quality.

【0006】[0006]

【課題を解決するための手段】本発明では、TFTのソ
ース電極と表示画素電極との接続部を、表示画素電極の
隣接する2辺の輪郭線に沿った形状とする。これによ
り、ソース電極と表示画素電極とのコンタクトに必要な
面積を確保することができる。そして表示画素電極の外
周部は、隣接画素との間での光漏れをなくすために遮光
されており、この領域を利用してコンタクト領域を形成
することができるため、開口率を向上させることが可能
となる。
According to the present invention, the connecting portion between the source electrode of the TFT and the display pixel electrode is formed along the contour line of two adjacent sides of the display pixel electrode. Thereby, the area required for contacting the source electrode and the display pixel electrode can be secured. The outer peripheral portion of the display pixel electrode is shielded in order to eliminate light leakage between adjacent pixels, and a contact region can be formed by utilizing this region, so that the aperture ratio can be improved. It will be possible.

【0007】[0007]

【発明の実施の形態】以下に図面を参照してこの発明の
実施形態であるアクティブマトリクス型液晶表示装置を
説明する。図1は、この実施例によって作製されるアレ
イ基板の一画素の概略平面図を示し、図2は図1の線A
Aに沿った断面図を示す。即ち、各画素にわたって連続
して走査線50及び信号線51がマトリクス状に配列さ
れ、その交点部分にはTFT52が形成されている。T
FT52は、走査線50と一体のゲート電極2及びその
上にゲート絶縁膜4、半導体層5を介して対向するよう
に形成された遮光性金属からなるソース電極7及びドレ
イン電極8によって構成されている。尚、このソース電
極7及びドレイン電極8と半導体層5の層間には、不純
物のドープされた半導体層からなるオーミック層6が形
成されている。そしてこのソース電極7は表示画素電極
9に接続され、一方ドレイン電極8は信号線51と一体
的に形成されている。また、表示画素電極9の直下部に
は、ゲート絶縁膜4を介して対向するように、蓄積容量
電極3が形成されている。
DETAILED DESCRIPTION OF THE INVENTION An active matrix type liquid crystal display device according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic plan view of one pixel of an array substrate manufactured according to this embodiment, and FIG. 2 is a line A of FIG.
A sectional view along A is shown. That is, the scanning lines 50 and the signal lines 51 are continuously arranged in a matrix over each pixel, and the TFTs 52 are formed at the intersections thereof. T
The FT 52 is composed of a gate electrode 2 integrated with the scanning line 50, and a source electrode 7 and a drain electrode 8 made of a light-shielding metal formed on the gate electrode 2 so as to face each other with a gate insulating film 4 and a semiconductor layer 5 therebetween. There is. An ohmic layer 6 made of an impurity-doped semiconductor layer is formed between the source electrode 7 and the drain electrode 8 and the semiconductor layer 5. The source electrode 7 is connected to the display pixel electrode 9, while the drain electrode 8 is formed integrally with the signal line 51. Further, a storage capacitor electrode 3 is formed immediately below the display pixel electrode 9 so as to face it with the gate insulating film 4 interposed therebetween.

【0008】ソース電極7と表示画素電極9との接続部
は、図示するように、表示画素電極の3辺に沿って表示
画素電極9を取り囲むように形成されており、TFT5
2のチャネル長方向に沿った部分と、チャネル幅方向に
沿って表示画素電極9の両サイドに延在する部分10と
を有する。この接続部分10は、蓄積容量電極3と重畳
するように設けられている。
The connecting portion between the source electrode 7 and the display pixel electrode 9 is formed so as to surround the display pixel electrode 9 along the three sides of the display pixel electrode as shown in the figure, and the TFT 5
2 has a portion along the channel length direction and a portion 10 extending on both sides of the display pixel electrode 9 along the channel width direction. The connecting portion 10 is provided so as to overlap the storage capacitor electrode 3.

【0009】次に、このアレイ基板の作製工程を説明す
る。ガラスなどの光透過性の絶縁基板1上にTa膜をス
パッタリング法を用いて堆積し、次いでPEP法を用い
て所望の形状にパターニングし、行方向に連続する走査
線50及び図示しない外部回路との接続のための接続端
子、蓄積容量電極3を形成した。次いで酸化シリコン
膜、アモルファスシリコン膜、n+アモルファスシリコ
ン膜を順次CVD法により積層し、これらの半導体層を
所望の形状にパターニングし、さらにITO膜を成膜
後、所望の形状にパターニングして、表示画素電極9を
形成した。この後、Al膜をスパッタリング法により堆
積し、PEP法によりソース電極7、ドレイン電極8及
びこれと一体の信号線51を形成した。
Next, a manufacturing process of this array substrate will be described. A Ta film is deposited on a light-transmissive insulating substrate 1 such as glass by using a sputtering method, and then is patterned into a desired shape by using a PEP method, and scanning lines 50 continuous in the row direction and an external circuit (not shown) are formed. A storage capacitor electrode 3 was formed as a connection terminal for the connection. Then, a silicon oxide film, an amorphous silicon film, and an n + amorphous silicon film are sequentially laminated by a CVD method, these semiconductor layers are patterned into a desired shape, and further, an ITO film is formed and then patterned into a desired shape to display The pixel electrode 9 was formed. Then, an Al film was deposited by the sputtering method, and the source electrode 7, the drain electrode 8 and the signal line 51 integrated with the source electrode 7 were formed by the PEP method.

【0010】このようにして作製されたアレイ基板を、
図2に示す対向基板21と組み合わせて封着し、その間
隙に液晶物質を注入し、アクティブマトリクス型液晶表
示装置を作製した。なお、同図に示すように、対向基板
21の内表面には、ITOなどの透明電極からなる対向
電極22が全面に形成されており、さらに図示しない
が、アレイ基板20と対向基板21の液晶と接する部分
には配向膜が必要に応じて形成される。また対向基板2
2の表示画素電極の間隙に対抗する領域には遮光層が形
成され、さらに表示画素電極に対抗する領域にR,G,
Bのカラーフィルタ層を形成しても良い。
The array substrate thus manufactured is
The active substrate type liquid crystal display device was manufactured by combining and sealing with the counter substrate 21 shown in FIG. 2 and injecting a liquid crystal substance into the gap. As shown in the figure, the counter electrode 22 made of a transparent electrode such as ITO is formed on the entire inner surface of the counter substrate 21, and although not shown, the liquid crystal of the array substrate 20 and the counter substrate 21 is formed. An alignment film is formed in a portion in contact with the film as needed. The opposite substrate 2
A light shielding layer is formed in a region facing the gap between the two display pixel electrodes, and R, G, and
The B color filter layer may be formed.

【0011】この実施例においては、ソース電極と表示
画素電極とのコンタクト部が、蓄積容量電極3によって
遮光された領域を利用して形成される。このため、有効
画素面積を広げることが可能となり、開口率を向上させ
ることができる。
In this embodiment, the contact portion between the source electrode and the display pixel electrode is formed by utilizing the region shielded by the storage capacitor electrode 3. Therefore, it is possible to increase the effective pixel area and improve the aperture ratio.

【0012】さらにこの実施例を変形させることができ
る。例えば、図示するようにTFTのチャネル幅方向に
平行に画素電極9の両サイドにコンタクト部を形成し、
かつこのコンタクト部においてソース電極が表示画素電
極9の両サイドに若干はみだす構造としておけば、画素
電極9とソース電極7それぞれの形成工程でTFTのチ
ャネル長方向に沿って位置ずれが生じた場合でも、コン
タクト部の面積は両サイドのコンタクト部の面積の総和
として一定とすることができる。このとき、ソース電極
の外周が蓄積容量電極3の外周におさまるような形状と
しておけば、開口率が低下しない。
Further, this embodiment can be modified. For example, as shown in the drawing, contact portions are formed on both sides of the pixel electrode 9 parallel to the channel width direction of the TFT,
In addition, if the source electrode is slightly protruded on both sides of the display pixel electrode 9 in this contact portion, even if a displacement occurs along the channel length direction of the TFT in the process of forming the pixel electrode 9 and the source electrode 7, respectively. The area of the contact portion can be made constant as the sum of the areas of the contact portions on both sides. At this time, if the shape of the outer periphery of the source electrode fits into the outer periphery of the storage capacitor electrode 3, the aperture ratio does not decrease.

【0013】また、図4に示すように、対向基板側に遮
光層30(図中点線で示す)にコンタクト部を重畳させ
てもよい。この構造により、上記実施例と同様、開口率
を向上させることが可能となる。
Further, as shown in FIG. 4, a contact portion may be superposed on the light shielding layer 30 (shown by a dotted line in the drawing) on the counter substrate side. With this structure, it is possible to improve the aperture ratio as in the above embodiment.

【0014】[0014]

【発明の効果】この発明によれば、表示画素電極の外周
部を利用してソース電極と表示画素電極とのコンタクト
部を形成するため、開口率を低下させることなく、十分
なコンタクトを得ることが可能となる。
According to the present invention, since the contact portion between the source electrode and the display pixel electrode is formed by utilizing the outer peripheral portion of the display pixel electrode, sufficient contact can be obtained without reducing the aperture ratio. Is possible.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の一実施例における、アクティブマト
リクス型液晶表示装置の一画素の概略平面図を示す。
FIG. 1 is a schematic plan view of one pixel of an active matrix liquid crystal display device according to an embodiment of the present invention.

【図2】図1の線AA’に沿った断面図を示す。2 shows a cross-sectional view along the line AA 'in FIG.

【図3】図1の線BB’に沿った断面図を示す。FIG. 3 shows a cross-sectional view taken along the line BB ′ of FIG.

【図4】この発明の別の実施例における、アクティブマ
トリクス型液晶表示装置の一画素の概略平面図を示す。
FIG. 4 is a schematic plan view of one pixel of an active matrix type liquid crystal display device according to another embodiment of the present invention.

【図5】従来のアクティブマトリクス型液晶表示装置の
一画素の概略平面図を示す。
FIG. 5 is a schematic plan view of one pixel of a conventional active matrix type liquid crystal display device.

【符号の説明】[Explanation of symbols]

3…蓄積容量電極 7…ソース電極 9…表示画素電極 30…遮光層 52…TFT 3 ... Storage capacitor electrode 7 ... Source electrode 9 ... Display pixel electrode 30 ... Light shielding layer 52 ... TFT

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 ドレイン電極、ソース電極及びゲート電
極を有してなる薄膜トランジスタ及び前記ソース電極に
接続された透明画素電極を有する第一の基板と、対向電
極の形成された第二の基板との間に液晶層を挟持してな
るアクティブマトリクス型液晶表示装置において、 前記ソース電極は、前記透明画素電極との接続部で、該
透明画素電極の隣接する2つ以上の辺の輪郭線に沿った
形状を有することを特徴とするアクティブマトリクス型
液晶表示装置。
1. A first substrate having a thin film transistor having a drain electrode, a source electrode and a gate electrode and a transparent pixel electrode connected to the source electrode, and a second substrate having a counter electrode formed thereon. In an active matrix type liquid crystal display device having a liquid crystal layer sandwiched therebetween, the source electrode is a connection portion with the transparent pixel electrode and extends along the contour line of two or more adjacent sides of the transparent pixel electrode. An active matrix type liquid crystal display device characterized by having a shape.
【請求項2】 前記接続部は、前記透明画素電極を挟ん
で相対する位置に設けられていることを特徴とする請求
項1記載のアクティブマトリクス型液晶表示装置。
2. The active matrix type liquid crystal display device according to claim 1, wherein the connection portions are provided at positions facing each other with the transparent pixel electrode interposed therebetween.
【請求項3】 前記接続部は、前記薄膜トランジスタの
チャネル長さ方向に対し平行な方向に沿って延在する部
分とチャネル幅方向に対し平行な方向に沿って延在する
部分とを有することを特徴とする請求項1記載のアクテ
ィブマトリクス型液晶表示装置。
3. The connection portion has a portion extending along a direction parallel to the channel length direction of the thin film transistor and a portion extending along a direction parallel to the channel width direction. The active matrix type liquid crystal display device according to claim 1.
【請求項4】 前記ソース電極は遮光性金属からなるこ
とを特徴とする請求項1記載のアクティブマトリクス型
液晶表示装置。
4. The active matrix type liquid crystal display device according to claim 1, wherein the source electrode is made of a light shielding metal.
【請求項5】 前記延在部分の少なくとも一方は、第一
の基板または第二の基板上に設けられた遮光層と重畳さ
れていることを特徴とする請求項3記載のアクティブマ
トリクス型液晶表示装置。
5. The active matrix type liquid crystal display according to claim 3, wherein at least one of the extending portions is overlapped with a light shielding layer provided on the first substrate or the second substrate. apparatus.
JP27606795A 1995-10-25 1995-10-25 Active matrix type liquid crystal display device Pending JPH09120082A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27606795A JPH09120082A (en) 1995-10-25 1995-10-25 Active matrix type liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27606795A JPH09120082A (en) 1995-10-25 1995-10-25 Active matrix type liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH09120082A true JPH09120082A (en) 1997-05-06

Family

ID=17564348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27606795A Pending JPH09120082A (en) 1995-10-25 1995-10-25 Active matrix type liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH09120082A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100361467B1 (en) * 2000-02-24 2002-11-21 엘지.필립스 엘시디 주식회사 Thin Film Transistor Substrate of Liquid Crystal Display
WO2006054386A1 (en) * 2004-11-17 2006-05-26 Sharp Kabushiki Kaisha Active matrix substrate and display
US7777821B2 (en) 2008-09-12 2010-08-17 Epson Imaging Devices Corporation Liquid crystal display device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100361467B1 (en) * 2000-02-24 2002-11-21 엘지.필립스 엘시디 주식회사 Thin Film Transistor Substrate of Liquid Crystal Display
WO2006054386A1 (en) * 2004-11-17 2006-05-26 Sharp Kabushiki Kaisha Active matrix substrate and display
JPWO2006054386A1 (en) * 2004-11-17 2008-05-29 シャープ株式会社 Active matrix substrate and display device
US7812893B2 (en) 2004-11-17 2010-10-12 Sharp Kabushiki Kaisha Active matrix substrate where a portion of the storage capacitor wiring or the scanning signal line overlaps with the drain lead-out wiring connected to the drain electrode of a thin film transistor and display device having such an active matrix substrate
JP4693781B2 (en) * 2004-11-17 2011-06-01 シャープ株式会社 Active matrix substrate and display device
US7777821B2 (en) 2008-09-12 2010-08-17 Epson Imaging Devices Corporation Liquid crystal display device

Similar Documents

Publication Publication Date Title
US6088072A (en) Liquid crystal display having a bus line formed of two metal layers and method of manufacturing the same
JP3401589B2 (en) TFT array substrate and liquid crystal display
US7009206B2 (en) Thin film transistor array panel and liquid crystal display including the panel
US5459595A (en) Active matrix liquid crystal display
JP3433779B2 (en) Active matrix substrate and manufacturing method thereof
KR100426980B1 (en) Electro-optical device, method for fabricating the same, and electronic apparatus
JP3941032B2 (en) Thin film transistor liquid crystal display element having vertical thin film transistor
KR100374435B1 (en) Liquid crystal display device and method of manufacturing the same
JP4402197B2 (en) Active matrix display device
US7656467B2 (en) Liquid crystal display and fabricating method thereof
US6781658B1 (en) Reflection type liquid crystal display device having a high aperture ratio
JPH1031235A (en) Liquid crystal display device
JPH07128685A (en) Liquid crystal display device
JPH10228035A (en) Liquid crystal display device and its manufacture
JPH09218424A (en) Liquid crystal display element of thin-film transistors and its production
JP3792749B2 (en) Liquid crystal display
JP3657702B2 (en) Liquid crystal display
US20040135939A1 (en) Liquid crystal display device with light shielding structure and method for forming the same
JP3127619B2 (en) Active matrix substrate
JPH0815711A (en) Active matrix substrate
JPH08160454A (en) Liquid crystal display device
JPH0258030A (en) Liquid crystal display device
JPH09120082A (en) Active matrix type liquid crystal display device
JP2000122096A (en) Reflective liquid crystal display device and its manufacture
JPH10268356A (en) Liquid crystal display device