JPH09102912A - Defective picture element detector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely detect the defective picture element of a fine picture element CCD, which moves, appears or disappear while using a camera. SOLUTION: An image signal from the CCD is passed through an A/D converter 200 and a 1/n divider 201 and integrated (n) times for each field by an adder 202 and a field memory 203, and the integrated signal is compared with a threshold value ref by a comparator circuit 208. When the signal exceeds the ref, it is defined as the defective picture element, its number is detected by a counter 209 and its position is detected by an (n) counter 205 and vertical and horizontal counters 206 and 207 and stored in vertical and horizontal counters 210 and 211. Corresponding to the number of defective picture elements, the value of ref is changed and corresponding to the position of defective picture elements, the image signal is interpolated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a defective pixel detecting device for detecting defective pixels of an image pickup device used in a video camera or the like.

[0002]

2. Description of the Related Art CCD image pickup devices are becoming more and more miniaturized year by year due to the reduction in image size and the like, so that the ratio of defective pixels to all pixels is also increasing. In the past, regarding defective pixels on such a screen, a ROM or the like indicating the defective position was added at the time of factory shipment of CCD in a one-to-one manner, and at the time of imaging based on the position of the defective pixel written in the ROM. We have been dealing with it by sequentially compensating.

[0003]

However, in the recent miniaturized CCD, a pixel defect could not be recognized at the time of factory shipment, but a phenomenon such that a defect gradually occurs due to subsequent use occurs. There is. In addition, defective pixels may behave differently from the conventional ones, such as moving in the screen with time and generating / disappearing. Generally, the signal level of such a defective pixel is
It is as small as several percent of 100% of the image signal and is not noticeable in normal photographing, but when photographing a dark screen, it is recognized as a white dot fixed to human eyes. In the past, there has been no effective detection method for pixel defects that move, occur / disappear with time as described above, and have a level of several percent.

Therefore, an object of the present invention is to provide a defective pixel detecting device which can surely detect defective pixels of an image pickup device.

[0005]

According to the present invention, an integrating means for integrating an image signal obtained from an image pickup device a predetermined number of times in a predetermined period, and an image signal integrated by the integrating means are compared with a predetermined threshold value. And a comparison means for doing so.

[0006]

In the present invention, a low level portion due to a defective pixel in the signal is detected by comparing a signal obtained by integrating the image signal obtained from the image pickup device a predetermined number of times within a predetermined period with a predetermined threshold, The defective pixel can be specified by this detection.

[0007]

FIG. 1 is a block diagram showing a first embodiment of the present invention. In the figure, 101 is a diaphragm for adjusting the light amount at the time of imaging, 102 is a CCD, 103 is a signal processing circuit for processing an image signal obtained from the CCD 102 into a final video signal, and 104 is interpolation of defective pixels. A correction circuit 105 for performing the above, a detection circuit for detecting the position of the defective pixel from the image signal from the CCD 102, a control circuit for controlling the detection circuit 105, and 107 and 108 respectively. Detection circuit 10
A switch for switching whether the memory circuit in 5 is used for the detection operation or the special effect.

Next, the operation will be described. The optical image that has passed through the diaphragm 101 is converted into an electrical image signal by the CCD 102. This image signal is subjected to various kinds of processing by the signal processing circuit 103, and then output as a video signal through the correction circuit 104 and the switch 108. When detecting a defective pixel, the control circuit 106 closes the diaphragm 101 and sends the detection circuit 105 the number of times n of image integration and a threshold ref for determining a defect. The detection circuit 105 is the CCD 102 obtained through the switch 107 a specified number of times n.
Number of defective pixels detected after integrating the image signal from
EFCnt is sent to the control circuit 106. When the control circuit 106 determines that the number of defective pixels is appropriate, it receives the vertical / horizontal position of each defective pixel from the detection circuit 105 and sends it to the correction circuit 104. After the detection operation is completed, the switches 107 and 108 are switched at a necessary time to give a special effect to the image signal using the memory circuit in the detection circuit 105.

FIG. 2 shows an example of the structure of the detection circuit 105. In FIG. 2, reference numeral 200 is an A / D converter for digitizing an image signal, and 201 is an input value 1 / n.
A divider for converting to, an adder for 202, a field memory for 203, a gate circuit for controlling a write clock at 205, an n counter for outputting each timing of memory write, comparison, and comparison end based on the input n. , 206 and 207 are vertical and horizontal counters for counting vertical and horizontal positions, respectively, and 208 is an input threshold value re
f is compared with the integrated image signal avDATA,
A comparison circuit for detecting defective pixels, 209 is a defective pixel counter for counting the number of detected defective pixels, 210, 211
Is a vertical / horizontal defect position memory for sequentially storing vertical and horizontal positions of detected defective pixels, 212 and 213 are switchers for selecting and extracting the contents of the vertical and horizontal defect position memories, respectively, and 214 is It is a D / A converter that converts a digital signal into an analog image signal.

Next, the operation will be described. First, the control circuit 106 sets n and ref. Further, the control pulse avEN is output so as to perform n times of integration set by the n counter 205. This signal is applied to the gate circuit 20.
In step 4, the write pulse of the field memory 203 is controlled to allow writing in the field only a predetermined n times.
The image signal obtained from the CCD 102 of FIG. 1 is converted into digital image data by the A / D converter 200, and is then reduced to 1 / n set by the divider 201. The signal is integrated with the data in the field memory 203 by the addition circuit 202. The vertical and horizontal counters 206 and 207 count up in synchronization with the vertical synchronizing signal V and the horizontal synchronizing signal H, respectively, and continue to output the address of the field memory 203 and the value indicating the position of the defective pixel.

When the integration of the predetermined n fields is completed, the n counter 205 outputs a comparison permission pulse cmpEN. The integrated image data avD read out from the field memory 203 by the comparison circuit 208 by cmpEN.
The comparison operation between ATA and ref is started, and when a value exceeding ref is detected from avDATA, write permission is issued to the defective pixel counter 209 and the vertical and horizontal defect position memories 210 and 211. Defective pixel counter 209
Counts the number of defective pixels and outputs the value in response to a request from the control circuit 106. Vertical and horizontal defect position memory 21
0 and 211 store the values of the vertical and horizontal counters 206 and 207 when there is a defective pixel, and the control circuit 106
The value is output according to the request of. Switch 212,
213 selects the values of the vertical and horizontal defect position memories 210 and 211 according to the sel signal designated by the control circuit 106,
It has a role to pass to the control circuit 106. The defective pixel signal of the image signal can be interpolated by the correction circuit 104 based on the positions of the defective pixels stored in the vertical and horizontal defect position memories 210 and 211.

Finally, the n counter 205 outputs a detection end pulse detEND when the integration and comparison for one screen are completed.
Is sent to the control circuit 106 to end one sequence of the detecting operation. Further, the image signal converted by the A / D converter 200 becomes an analog signal by the D / A converter 214 after passing through the field memory 203 as image data, and the control of the write / read clock to the field memory 203 at that time. It is possible to give a special effect.

FIG. 3 shows a state of each control pulse avEN, cmpEN, detEND with respect to the vertical synchronizing signal V of FIG. As can be seen from the figure, the avEN signal is enabled to integrate for a predetermined n fields, and is c for comparison from the end of integration to one field.
The mpEN signal is enabled and then detEND is enabled at the end of the comparison. In addition, even /
The odd fields may be integrated separately.

FIG. 4 shows a second embodiment of the present invention. The present embodiment is suitable for a video camera that digitally performs signal processing of the video camera. In FIG. 4, 401 is a diaphragm for adjusting the amount of light at the time of image pickup, 402 is a CCD, 403 is a signal processing circuit for processing an image signal obtained from the CCD 402 into a final video signal, and 404 is a defective pixel. A correction circuit that performs interpolation,
Reference numeral 405 denotes a central portion of this embodiment, which is a CCD 40
2, a detection circuit for detecting the position of the defective pixel from the image signal from 2, a control circuit 406 for controlling the detection circuit 405, 4
Reference numerals 07 and 408 are switches for switching whether the storage circuit in the detection circuit 405 is used for the detection operation or the special effect, and 409 is A for digitizing an image signal.
An A / D converter 410 is a D / A converter that converts digital image data into an analog signal.

Next, the operation will be described. The light image that has passed through the diaphragm 401 is converted into an electric image signal by the CCD 402. The signal is subjected to various kinds of processing in the signal processing circuit 403 digitized by the A / D converter 409, and then passes through the correction circuit 404 and the switch 408 to the D / A converter 4
At 10, it is converted back to an analog signal and output as a video signal. When detecting a defective pixel, the control circuit 406 closes the aperture 401 and sends the detection circuit 405 the number of times n of image integration and a threshold ref for determining a defect. The detection circuit 405 integrates the data obtained by digitizing the image signal from the CCD 402 obtained through the switch 407 by the A / D converter 409 a specified number of times n, and then sends the detected number of defective pixels DEFCnt to the control circuit 406. .
If the control circuit 406 determines that the number of defective pixels is proper, it receives the vertical / horizontal position of each defective pixel from the detection circuit 405 and sends it to the correction circuit 404. After the detection operation is completed, switch 407, 4 at the required time.
By switching 08, the storage circuit in the detection circuit 405 is used to add a special effect to the image signal.

FIG. 5 shows a configuration example of the detection circuit 405. In FIG. 5, 501 is a divider for converting the input value to 1 / n, 502 is an adder, 503 is a field memory, 504 is a gate circuit for controlling the write clock, and 505 is based on the input n. An n counter for outputting each timing of memory writing, comparison, and comparison end, 506 and 507 are vertical and horizontal counters for counting vertical and horizontal positions, respectively, and 508 is an input threshold value r
ef is a comparison circuit for detecting defective pixels by comparing the integrated image signal avDATA, 509 is a defective pixel counter for counting the number of detected defective pixels, 510, 5
Reference numeral 11 denotes a vertical / horizontal defect position memory 512, 513 for sequentially storing vertical and horizontal positions of the detected defective pixel.
Are selectors for selecting and extracting the contents of the vertical and horizontal defect position memories, respectively.

Next, the operation will be described. First, the control circuit 406 sets n and ref. Further, the control pulse avEN is output so as to perform n times of integration set by the n counter 505. This signal is the gate circuit 5
At 04, the write pulse of the field memory 503 is controlled to permit writing only in the field for a predetermined n times.
The image signal obtained from the CCD 402 in FIG. 5 passes through the A / D converter 409 and the switch 407 and is divided by 1 / n set by the divider 501. The signal is integrated with the data in the field memory 503 by the addition circuit 502. Vertical and horizontal counters 506, 5
07 counts up in synchronization with the vertical synchronizing signal V and the horizontal synchronizing signal H, respectively, and continues to output the address of the field memory and the value indicating the position of the defective pixel.

When the integration of the predetermined n fields is completed, the n counter 505 outputs the comparison permission pulse cmpEN. When the comparator circuit 508 starts its operation by cmpEN and a value exceeding the set threshold value ref in the integrated image data avDATA is detected, the defective pixel counter 509 and the vertical and horizontal defect position memories 510 and 511 are written. Issue permission. Defective pixel counter 509
Counts the number of defective pixels and outputs the value in response to a request from the control circuit 406. Vertical and horizontal defect position memory 51
Reference numerals 0 and 511 store the values of the vertical and horizontal counters 506 and 507 when there is a defective pixel, and the control circuit 406
The value is output according to the request of. Switch 512,
513 selects the values of the vertical and horizontal defect position memories 510 and 511 according to the sel signal designated by the control circuit 406,
It has a role of passing to the control circuit 406.

Finally, the n counter 505 outputs a detection end pulse detEND when the integration and comparison for one screen are completed.
Is sent to the control circuit 406 to end one sequence of the detecting operation. Further, the input image data is output via the field memory 503. A special effect can be given by controlling the write / read clock to the field memory 503 at that time.

FIG. 6 is a flow chart showing the operation of the control circuits 106 and 406 at the time of the detection operation in FIGS. When the detection is started, the control circuits 106 and 406 first issue an instruction to close the aperture, and thereafter, the number of integration times n and the threshold value ref of defective pixel detection are set in the detection circuits 105 and 405, and wait for the detection end pulse defEND. The end of detection is detected. When the detection operation is completed, the values of the defective pixel counters 209 and 509 are read. Defective pixel counter 20
If the values of 9 and 509 are larger than a certain value, it is considered that the threshold value ref for defective pixel detection is too low, so the threshold value ref is changed and the detection operation is performed again. If the number of defective pixels reaches an appropriate value, the vertical and horizontal defect position memory 21
The vertical and horizontal positions of the defective pixel are taken in by 0, 211, 510 and 511, and the diaphragm is opened to end the detection operation.

[0021]

As described above, according to the present invention, it is possible to reliably detect a defective pixel that has occurred after the manufacturing of the image pickup device, especially a defective pixel that has a small signal level that is generated / erased / moved over time. . Therefore, it becomes possible to automatically detect / correct defective pixels when a video camera using an image pickup device is used.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration example of a detection circuit according to the first embodiment.

FIG. 3 is a timing chart showing the operation of the detection circuit.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration example of a detection circuit according to a second embodiment.

FIG. 6 is a flowchart showing the operation of the control circuit in the first and second embodiments.

[Explanation of symbols]

 101, 401 Aperture 102, 402 CCD 105, 405 Detection circuit 106, 406 Control circuit 201, 501 Divider 202, 502 Adder 203, 503 Field memory 204, 504 Gate circuit 205, 505 n counter 206, 506 Vertical counter 207, 507 horizontal counter 208, 308 comparison circuit 209, 509 defective pixel counter 210, 510 vertical defect position memory 211, 511 horizontal defect position memory

Claims (7)

[Claims] 1. A defective pixel comprising an integrating means for integrating an image signal obtained from an image pickup device a predetermined number of times in a predetermined period, and a comparing means for comparing the image signal integrated by the integrating means with a predetermined threshold value. Detection device. 2. The defective pixel detection device according to claim 1, wherein the integration means integrates the image signal obtained from the image pickup device separately for each of even / odd fields a predetermined number of times. 3. The defective pixel detecting apparatus according to claim 1, wherein the comparing means outputs a defective pixel detection signal when the integrated image signal exceeds the threshold value. 4. The defective pixel detecting device according to claim 3, further comprising position detecting means for detecting the position of the defective pixel based on the detection signal. 5. The defective pixel detection device according to claim 3, further comprising changing means for detecting the number of the defective pixels based on the detection signal and changing the threshold value according to the detected number. 6. The defective pixel detection device according to claim 1, further comprising a blocking means for blocking light incident on the image pickup device before the integrating means performs integration. 7. The integration means has a storage means for performing integration, and the storage means is used to give a special effect to an image signal obtained from the image pickup device except when a defective pixel is detected. The defective pixel detection device according to claim 1.