JPH09102762A - Line resistance measurement circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the unstable variance caused to the decision result when the resistance value is approximate to the boundary of every range for a line resistance measurement circuit which measures the resistance of a line that is set via a subscriber circuit of an exchange and then decides one of plural ranges where the resistance value is included. SOLUTION: The circuit includes a resistance detection circuit 1 which measures the resistance value of the line connected to a subscriber circuit of an exchange, a decision circuit 2 which outputs a decision signal to show a range where the measurement result of resistance value is included among those ranges set by dividing an entire range where the resistance value may possibly be included, and a storage circuit 3 which stores the decision signal in an off-hook state. Then the decision threshold which sets plural ranges is switched based on the present decision signal and the preceding decision signal that is stored in the circuit 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line resistance measuring circuit for measuring a loop resistance which is a sum of a line resistance of a subscriber line and a resistance of a terminal device.

[0002]

2. Description of the Related Art A subscriber circuit of an exchange is connected to a terminal device through a subscriber line. Conventionally, the transfer gain when the subscriber circuit transmits / receives a signal to / from the terminal device is:
It was fixed regardless of the line length of the subscriber line. Therefore, when the subscriber circuit transmits / receives a signal to / from a nearby terminal device, the signal level is too high. On the contrary, when transmitting / receiving a signal to / from a terminal device located far away, There is a problem that the signal level may be attenuated and become too low, resulting in variation in communication quality.

Therefore, the line length of the subscriber line is estimated by some means, the transmission loss in the line portion is estimated based on the estimated line length, and the amount of the transmission loss is compensated by the subscriber circuit to make the communication quality uniform, And, the technology of making improvements has been studied.

As a simple means for estimating the line length, the loop resistance, which is the sum of the line resistance of the subscriber line and the resistance of the terminal device, is measured and the loop resistance is set to, for example,
It is classified into three stages of small, and if the loop resistance is small, it is a short distance,
There is a method of estimating the distance on the subscriber line from the subscriber circuit to the terminal device, that is, the line length of the subscriber line, such as medium distance for medium and long distance for large.

FIG. 6 is a circuit diagram showing a conventional line resistance measuring circuit for carrying out this method. In FIG. 6, R
X represents a loop resistance which is the sum of the line resistance of the subscriber line and the resistance of the terminal device. The resistance detection circuit 1 is a circuit that measures the loop resistance RX, and includes a differential amplifier 11 and resistances R1 and R2. Differential amplifier 1
1, the non-inverting input terminal is connected to the power supply VCC through the resistor R1, and the inverting input terminal is grounded through the resistor R2. Then, when a certain terminal device goes off-hook and a loop is formed between the terminal device and the subscriber circuit via the subscriber line, as shown in the figure, the loop resistance R
Both ends of X are connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier.

In this state, the voltage across the loop resistor RX (that is, the line voltage of the subscriber line in the subscriber circuit) is amplified by the differential amplifier 1 to form the loop resistor RX.
The voltage VOUT proportional to the magnitude of is output.

The determination circuit 2 includes comparators 21 and 2
The output voltage VOUT of the resistance detection circuit 1 is compared with each of the two kinds of threshold voltages VTH1 and VTH2 by these comparators. Then, the comparators 21 and 22 output determination signals (digital signals) D1 and D2 indicating the magnitude of the loop resistance RX.

Here, VCC> 0, VTH1> VTH2
Power supply voltage VCC and threshold voltage VTH1,
If VTH2 is selected, the determination signals D1 and D shown in FIG.
2 is obtained. That is, in a region where the loop resistance RX is high and the voltage VOUT is higher than VTH1, D1 = 1 and D2 = 1 are output as the determination signals, and the loop resistance RX
Is low and the voltage VOUT is lower than VTH2, D1 = 0 and D2 = 0 are output as the determination signals, and VTH1>VOUT> VTH2 is satisfied in the intermediate region, so that the determination signals D1 = 0 and D2 = 1 is output.

As described above, the determination signals D1 and D2 reflect whether the loop resistance RX is in the high resistance region, the medium resistance region, or the low resistance region. Therefore, the determination signals D1 and D2 are based on the logic levels of the determination signals D1 and D2. By controlling various characteristics of the subscriber circuit (for example, reception gain and transmission gain), it is possible to make communication quality uniform.

[0010]

By the way, in the above-mentioned conventional line resistance measuring circuit, when the loop resistance RX has a resistance value near the boundary between high resistance and medium resistance or near the boundary between medium resistance and low resistance, The output voltage VOUT of the resistance detection circuit 1 becomes a voltage value near the determination threshold VTH or VTH2. In such a state, if noise or a signal propagates through the subscriber line and reaches the resistance detection circuit 1, or if environmental fluctuations (temperature, voltage, etc.) occur, the output voltage VOUT of the resistance detection circuit 1 is changed. The determination threshold value VTH1 (or VTH2) changes across, and the values of the determination signals D1 and D2 change. If such a change occurs, various characteristics controlled by the determination signals D1 and D2 will change, and there is a problem that the characteristics of the subscriber circuit viewed from the terminal device become unstable.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a stable line resistance measuring circuit in which the occurrence of unstable operation as described above is prevented.

[0012]

The invention according to claim 1 is
A resistance detection circuit for measuring a resistance value of a line connected to a subscriber circuit of an exchange, and a determination indicating a range to which the resistance value measurement result belongs among a plurality of ranges obtained by dividing the entire range of the resistance value. A determination circuit that outputs a signal; and a storage circuit that stores the determination signal, wherein the determination circuit
A gist of a line resistance measuring circuit is characterized in that a judgment threshold value that defines the plurality of ranges is switched based on a current judgment signal and a judgment signal stored in the storage circuit.

According to a second aspect of the present invention, there is provided means for relaxing a sudden change in the judgment signal and outputting a final judgment signal, wherein the range corresponds to the judgment signal before the change and the range after the change. 1 between the range corresponding to the judgment signal
When the above range is sandwiched, the judgment signal before change,
The line resistance measuring circuit according to claim 1, further comprising: an interpolating unit that sequentially outputs the determination signal corresponding to the sandwiched range and the changed determination signal as a final determination signal. .

[0014]

DETAILED DESCRIPTION OF THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of a line resistance measuring circuit that is an embodiment of the present invention. This line resistance measuring circuit includes a resistance detecting circuit 1, a judging circuit 2 and a memory circuit 3.
It is constituted by. Here, the resistance detection circuit 1 is
It is a circuit that detects a loop resistance that is the sum of the resistances of the line 5 and the terminal device 6, and supplies a signal X representing the detected resistance value to the determination circuit 2. The determination circuit 2 has a plurality of different determination thresholds (VTH1>VTH2>...> VTHn), determines which region the signal X is in, and outputs a determination signal indicating the determination result Y. In addition, the determination circuit 2 stores the determination result Y in the storage circuit 3 and also stores the determination result Y in the storage circuit 3.
The judgment threshold value is reset by referring to the past judgment value Z stored in. The operation of the decision circuit 2 outputting the decision signal and the operation of writing the decision result in the memory circuit 3 are as follows: the terminal device connected to the subscriber line is in an off-hook state and the loop resistance is connected to the resistance detection circuit 1. It will be performed at the judgment timing immediately after it becomes.

FIG. 2 shows a specific circuit configuration example of the above embodiment. The line resistance measuring circuit shown in FIG. 2 also divides the total range of the loop resistance into two ranges by the two determination threshold values as in the case shown in FIG. Determine whether it belongs.

However, in the decision circuit 2 in the present embodiment, the decision threshold is VTH1 of VTH1A or VTH1B (VTH1A <VTH1 <VTH1B).
Either of the values is selected and used. Similarly, as VTH2, VTH2A or VTH2B (VTH2A <VTH2 <
One of two values of VTH2B) is selected and used. Which judgment threshold value is selected is determined based on the judgment result each time the judgment is performed, as shown in FIG. That is, when the result of the determination that the resistance is high is obtained, VTH1A and VTH2A having low voltage levels are adopted as the determination thresholds VTH1 and VTH2, and the range of the signal X determined to be the high resistance is set wide. It Further, when the result of the determination that the resistance is medium resistance is obtained, the determination thresholds VTH1 and VTH2 are set to VT having a high voltage level.
H1B and VTH2A with low voltage level are adopted,
The range of the signal X that is determined to be medium resistance is set to be wide. When the result of the determination that the resistance is low is obtained, VTH1B and VTH2B having high voltage levels are adopted as the determination thresholds VTH1 and VTH2, and the range of the signal X determined to be the low resistance is set wide. It

FIG. 4 shows an operation example of each of the conventional line resistance measuring circuit and the line resistance measuring circuit according to the present embodiment.
In the conventional line resistance measuring circuit, the judgment threshold is VTH.
Since it is only 1 and VTH2, even if the loop resistance value slightly changes as shown in FIG. 4, the determination result changes near the threshold value. On the other hand, in the present embodiment, since the determination threshold is controlled based on the previous determination result, there is an advantage that the determination result is the same as the previous result even if the loop resistance value slightly changes.

The determination result Y itself may be stored in the storage circuit 3 as described above, but the specific storage method is not limited to this. For example, the determination result Y is calculated and the next time. It may be processed and stored so that it can be determined.

FIG. 5 shows a circuit configuration example of another embodiment of the present invention.
Shown in In this embodiment, the differential amplifier 2 in the decision circuit 2 is
An interpolating circuit 20 for reducing abrupt changes in the determination signals obtained from these differential amplifiers is added to the subsequent stages of 1 and 22.

Here, the interpolation circuit 20 will be described.
First, the output signal D1 ′ of the differential amplifier 21 is input to the flip-flop 23 by the clock C generated at each determination timing, and the output signal of the flip-flop 23 is shifted to the flip-flop 24. Similarly, the output signal D2 ′ of the differential amplifier 22 is
The flip-flops 25 and 26 are sequentially shifted.
It is sequentially shifted.

In the EXNOR circuit 27, as the signals D1 'and D2', the signal (1,1) corresponding to high resistance or the signal (0,0) corresponding to low resistance is flip-flop 23.
If it is written in the memory cells 25 and 25, the signal "1" is output. Further, the EXNOR circuit 28 outputs a signal "1" when a signal (1,1) corresponding to high resistance or a signal (0,0) corresponding to low resistance is written in the flip-flops 24 and 26. Then, the EXOR circuit 28
Outputs the signal "1" when the output signals of the flip-flops 25 and 26 are different, that is, when the signal D2 'changes before and after the clock C is generated.

The AND circuit 33 includes an EXNOR circuit 27,
The logical product of the output signals of the EXNOR circuit 28 and the EXOR circuit 29 is output. Since the behavior of each of these output signals is as described above, the output signal of the AND circuit 30 is such that the signals D1 ′ and D2 ′ correspond to high resistance (1,1) to low resistance (0, It becomes "1" only when it changes to 0) or vice versa.

On the other hand, the output signals D1 'and D2' of the differential amplifier 21 are supplied to the selection circuit 33 via the delay circuits 31 and 32, respectively.

When there is no abrupt change in the measurement result of the loop resistance and the output signal of the AND circuit 30 is "0", the selection circuit 33 outputs the signals D1 'and D2' as they are as the final decision signal. Output as D1 and D2.
Further, when the measurement result of the loop resistance changes abruptly from low resistance to high resistance, the output signal of the AND circuit 30 becomes "1". Therefore, in this case, the selection circuit 33
As the determination signals D1 and D2, (0,0) corresponding to low resistance is output, and then the output signal of the AND circuit 30 becomes "1" to correspond to middle resistance (0,1).
Is selected and output, and then the high resistance is supported (1,
1) will be output. Conversely, the same applies when the measurement result of the loop resistance suddenly changes from high resistance to low resistance.

As a result of such an operation, it is possible to prevent a large erroneous setting due to a temporary large noise, fluctuation of terminal resistance, or the like.

[0026]

As described above, according to the present invention,
Since the judgment threshold for judging the resistance measurement result is reset according to the judgment result, it is possible to prevent the judgment result from fluctuating due to a slight change in the state of the loop, and to make the communication quality uniform and improved. It becomes possible (Claim 1).
Further, since the function for suppressing the current judgment so as not to be greatly separated from the previous judgment result is provided, there is an advantage that a large erroneous setting due to a temporary excessive noise can be prevented (claim 2).

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a specific circuit example of the same embodiment.

FIG. 3 is a diagram illustrating a method of controlling a determination threshold value according to the same embodiment.

FIG. 4 is a diagram showing an operation of the embodiment in comparison with a conventional technique.

FIG. 5 is a diagram showing a specific circuit example according to a second embodiment of the present invention.

FIG. 6 is a diagram showing a conventional line resistance measuring circuit.

FIG. 7 is a diagram showing an operation of the line resistance measuring circuit.

[Explanation of symbols]

 1 Resistance detection circuit 2 Judgment circuit 3 Storage circuit

Claims (2)

[Claims] 1. A resistance detection circuit for measuring a resistance value of a line connected to a subscriber circuit of an exchange; and a resistance value measurement result among a plurality of ranges obtained by dividing an entire range of the resistance value. A determination circuit that outputs a determination signal indicating a range to which the signal belongs, and a storage circuit that stores the determination signal, wherein the determination circuit is based on the current determination signal and the determination signal stored in the storage circuit. A line resistance measuring circuit, characterized in that a judgment threshold value that defines the plurality of ranges is switched. 2. A means for reducing a sudden change of the judgment signal and outputting a final judgment signal, the range corresponding to the judgment signal before the change and the range corresponding to the judgment signal after the change. If one or more range is sandwiched between and, the interpolation signal that sequentially outputs the determination signal before change, the determination signal corresponding to the sandwiched range and the determination signal after change as the final determination signal The line resistance measuring circuit according to claim 1, further comprising means.