JP3532633B2 - Optical receiver - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital optical receiver, and more particularly to a burst mode optical receiver for stably receiving burst-shaped optical signals having different powers.

[0002]

2. Description of the Related Art In recent years, optical fiber transmission technology capable of high-speed transmission is about to be introduced into subscriber networks in order to meet the increasing demand for broadband services centered on images.
In order to introduce the optical fiber transmission technology into the subscriber network, it is essential not only to make the transmission device on the subscriber side economical, but also to make the station side device and the optical fiber line economical. The optical subscriber transmission method devised from such a demand is a PDS (Passive).
Double Star) transmission method. In the PDS transmission system, a subscriber and a station are connected to an optical branch circuit by an optical fiber, data transmitted from the subscriber to the station is transmitted by a burst-like optical signal called a cell, and each cell is connected by the optical branch circuit. After being time-division multiplexed so that they do not overlap, they are received by the station device. The burst optical signal received by the station device has a level difference of about 30 dB due to variations in insertion loss of the optical fiber and the optical branch circuit between each subscriber and the station. Therefore, the AGC function is required for the optical receiver device of the station. However, since it is necessary to set the gain for each burst received, this AG
High speed is required for the C function.

As a conventional burst light receiving device of this type, for example, the Institute of Electronics, Information and Communication Engineers Technical Report Vol. 93
No. 329 p. p. 55-60 "bidirectional optical transmission module for optical subscriber system".
FIG. 11 is a diagram showing the configuration of the conventional burst optical receiving device shown in the above document. In the figure, 1 is a light receiving element, 2 is a parallel feedback type amplifier, 3 is a feedback resistor, 4 is an inverting amplifier, 1
Reference numeral 2 is a variable gain amplifier, 13 is a peak detector, 14 is a comparator, and 15 is an automatic threshold value setting circuit (hereinafter, abbreviated as ATC circuit). The operation will be described. The burst-shaped optical signal input to the receiver is converted into a current signal by the light receiving element 1, and further converted into a voltage signal by the parallel feedback amplifier 2. The parallel feedback type amplifier 2 is generally used as a low noise front end of an optical receiver, and is characterized by having a low noise characteristic and a wide dynamic range, and as will be described later, in the received light power range of 20 to 25 dB. Can be secured.

The voltage signal output from the parallel feedback type amplifier 2 is input to the variable gain amplifier 12 and amplified. The amplitude of the output is detected by the peak detector 13, and when the amplitude is smaller than the specified value. Performs a so-called AGC amplification that raises the gain of the parallel feedback amplifier 2 and lowers the gain of the parallel feedback amplifier 2 when its amplitude is larger than a specified value. Due to the effect of negative feedback, a constant signal within a control error range is obtained. A signal voltage having an amplitude is input to the comparator 14. Generally, in a negative feedback loop including the variable gain amplifier 12 and the peak detector 13, the input signal amplitude range, that is, the dynamic range in which the control error is a fixed value or less, is proportional to the response speed. A control error of 2 dB, a dynamic range of 40 dB (electrical level), and a response speed of about 10 ns are generally possible. Therefore, the received power range 20
When an arbitrary burst optical signal within dB (optical level) is received, it becomes a voltage signal having a constant amplitude within 10 ns from the burst head and is input to the positive phase terminal of the comparator 14. A threshold value that responds to and follows the signal input at high speed is input to the negative phase input terminal of the comparator 14 from the ATC circuit 15, and the burst signal interval or the mark ratio in the burst signal (the ratio of 1 in all bits) Is hardly affected by the bias fluctuation of the input signal generated by the fluctuation of
Stable data reproduction is possible. The reset signal in the figure is given from the system external to the receiver during the burst pause period, which discharges the charged capacitor inside the peak detector 13 so that the next burst signal can be received. Set amplifier 12 to maximum gain.

As described above, as long as the parallel feedback amplifier 2 outputs a low distortion signal sufficient for data reproduction,
The conventional burst mode optical receiver shown in FIG. 11 operates well. However, there is a limit to the maximum input signal power of the parallel feedback amplifier 2. FIG. 12 shows a parallel feedback amplifier 2
It is a figure which shows an example of a detailed structure. In the figure, 41 and 46 are field effect transistors, 42, 45, 47 and 49 are resistors, 43 and 49 are capacitors, and 44 is a bipolar transistor. The active element connected to the light receiving element is required to have characteristics such as low input capacitance, high mutual conductance and low gate current, and the field effect transistor 41 is used. The field effect transistor 41 is self-biased with a resistor 42, and a capacitor 43 is added to increase the gain at the signal frequency. The gate of the field effect transistor 41 is fixed to the potential of the power source 50 by the feedback resistor 3 and the bias resistor 49. The biport transistor 44 is cascade-connected to the field effect transistor 41, and reduces the mirror capacitance generated in the resistor 45 as a load to widen the band. Field effect transistor 46
Is the source follower for the buffer. 13 is the same as FIG.
3 is a diagram showing input / output characteristics of the parallel feedback amplifier 2 shown in FIG. Here, the parallel feedback type amplifier 2 of FIG.
It is designed for it / s, and the feedback resistor 3 has a received light power of -33 at which a code error rate of 10 kOhm and 10-9 can be obtained.
dBm. As can be seen from FIG. 13, received light power -1
It operates linearly up to 3 dBm. However, when it is higher than that, saturation occurs, and when it is -10 dBm or higher, code distortion occurs rapidly. Therefore, the reception dynamic range of the parallel feedback amplifier 2 of FIG. 12 is 23 dB, and the reception dynamic range of 30 dB required for the optical receiver of the subscriber system cannot be obtained.

The cause will be described below. The gate potential of the field effect transistor 41, which was almost fixed to the potential of the power supply 50 at the time of inputting a small signal, increased by the voltage drop of the feedback resistor 3 and the bias resistor 49 due to the increase of the received light power, and the drain
Source-to-source current increases. As a result, the drain-source voltage decreases, the transconductance and the drain-source resistance decrease, and the gain of the inverting amplifier 4 decreases.
Since the band of the parallel feedback amplifier 2 is proportional to the gain of the inverting amplifier 4, the band is rapidly reduced at the received light power of -10 dBm or more, which causes a large code distortion.

[0007]

Since the conventional optical amplifier is constructed as described above, the range of electric output from the light receiving element is large, and the output of the amplifier following the light receiving element is saturated and a large code distortion occurs. However, there is a problem that a large dynamic range cannot be obtained. In addition, since a so-called hysteresis comparator is used for data detection, there is a problem that a gentle level fluctuation occurs and accurate detection cannot be performed. Furthermore, there is a problem that data identification may be erroneous for the same reason.

The present invention has been made to solve the above problems, and an object of the present invention is to obtain an optical receiving apparatus which correctly reproduces data over a wide dynamic range of an input signal.

[0009]

An optical receiving apparatus according to the present invention includes a light receiving element for converting a light receiving signal into an electric output, and the light receiving element .
Amplify the electrical output of the optical element to obtain a signal for data identification
In an optical receiving device equipped with an amplifier,
Monitor the current or detect the amplifier output above
Burst signal included in the above received light signal at each reset.
The level at the beginning of the
Bell detection circuit and the input side of the amplifier
The impedance that is a parallel load with the width detector is the level detector.
For each of the above levels detected by
Select the impedance so that
A variable impedance circuit for holding the burst input is provided.

In the above structure, the level detection circuit delays the signal to be detected from the signal to be detected.
The signal is subtracted to obtain a 3-level ternary signal, and the ternary value is
Compare the upper value of the signal with the upper reference voltage and
Detects level by comparing lower value of signal with lower reference signal
I decided to do it.

[0011]

[0012]

In addition, in the basic structure, the variable impedance circuit is composed of a resistor and a switching element as impedance , and the switching element detects the level.
Resistors and switching elements that are turned on and off by the output of the circuit
It is configured to have a plurality of pairs with the child.

Further, in addition to the basic configuration, a first comparator as an identification / reproduction circuit for reproducing and outputting data, which receives a data identification signal after ternary conversion and has a comparison reference of a positive value of the data identification signal, A second comparator having a negative comparison criterion,
An identification and reproduction circuit, which is constituted by flip-flops which are set by the outputs of the first and second comparators and reproduces data, is added.

In the identification / reproduction circuit, the comparison reference values of the first and second comparators are switched and set according to the detection level of the level detection circuit.

Further, in addition to the basic configuration, a voltage source equal to the input terminal voltage of the above amplifier when there is no signal is connected to the other end of the variable impedance circuit with respect to the end on the amplifier side.

[0017]

In the optical receiver according to the present invention, the level of the first specified portion of the received light signal is measured at a plurality of division levels,
Accordingly, different shunt impedances are selected and held, and thereafter, during the burst input, the impedances are constant, so that the signal level is constant and output for data identification.

In the optical receiving device according to the present invention, the received light signal is AC-converted and the levels of the first prescribed portion thereof are measured at a plurality of levels, the shunt impedance value of the received light signal is determined corresponding to the measured levels, and thereafter burst input is performed. Inside, the impedance is constant, so the signal level is constant and the data is output for data identification.

[0019]

[0020]

The shunt impedance is determined by the combined value of the resistors controlled by the switching elements driven at the detection level.

Further, an AC-converted signal is input as a data identification signal, the first and second comparators set and reset the flip-flop, and the reproduced data is obtained as the output of the flip-flop.

Further, the comparison reference values of the first and second comparators are switched at the level of the received light signal, and the set and reset levels of the flip-flop are changed.

Further, the voltage across the variable impedance when there is no signal becomes equal, and the detection end voltage when there is no signal is correctly set to zero.

[0025]

【Example】

Example 1. The basic idea of the present invention is to lower the load impedance on the input side according to the input signal level, sequentially switch the apparent input signal level to lower it to reduce saturation, and ternaryize the circuit configuration to detect the level. Will be explained. FIG. 1 is a block diagram showing the basic configuration of an optical receiving apparatus that is an embodiment of the present invention. In the figure, 5 is a level detection circuit, 6 is a variable impedance circuit, 7 is a power supply, and 8 is an identification reproduction circuit. As its details, 81 is a comparator,
Reference numerals 82 and 83 are resistors, and 84 is a capacitor. The same parts as those in the conventional example are designated by the same reference numerals.

The operation will be described. Level detection circuit 5
Detects the output amplitude of the parallel feedback amplifier 2. At this time, n regions Si (i = 1 to 1) where n is a natural number in the order of increasing power in the optical signal power range received by the light receiving element.
An intensity range Si to which the optical signal power of the received burst head when divided into n) belongs is obtained. The variable impedance circuit 6 is connected to the input section of the parallel feedback amplifier 2 in parallel with the light receiving element 1 in terms of AC, and is provided for shunting the signal current of the light receiving element 1. . As for the connection relationship, the impedance between the power supply 7 and the parallel feedback amplifier 2 is set to the impedance of Ri (i = 1 to n) in descending order. When it is determined that the range to which the optical signal power of the burst head portion received by the level detection circuit 5 belongs is Si, the variable impedance circuit 6 is controlled to set the impedance to Ri. Thus, for a high optical level reception burst, a larger amount of signal current is shunted to the variable impedance circuit 6 side, and as a result, the signal current input to the parallel feedback amplifier 2 is reduced, and the code due to saturation is encoded. It is possible to prevent distortion. The output of the parallel feedback type amplifier 2 is input to the identification and reproduction circuit 8. The discriminating / reproducing circuit 8 is composed of a comparator 81 to which positive feedback is applied by resistors 82 and 83, and the threshold value input to the positive phase input terminal follows the input signal at a following speed that can be achieved by the capacitor 84 and the resistor 83. As a result, stable data reproduction can be achieved without being substantially affected by the bias fluctuation of the input signal generated by the fluctuation of the burst signal interval or the mark ratio (the ratio of 1 in all bits) in the burst signal.

Example 2. An example of a detailed circuit of the level detection circuit for performing accurate level detection by eliminating the influence of the conventional Sag by converting the input signal into three values of positive, negative, and middle will be described. Figure 2
FIG. 2 is a diagram showing a detailed configuration of an optical receiving device that is an embodiment according to the present invention. In the figure, 51 is a bipolar conversion circuit, 56
Is a carrier detection circuit, 52, 54 and 57 are comparators, 5
3, 54 and 58 are S / R flip-flops, 59 is mono-multi, 70 and 71 are level conversion circuits, 72 and 73 are transistors, and 74 and 75 are resistors. The bipolar conversion circuit 51 is a circuit that subtracts the data obtained by delaying the two signals input from the parallel feedback amplifier 2 by 1 bit from the original data. That is, for example, "1, 0, 1, 1, 0,
0-, 1, 0 "input, 1-bit delay"-, 1,
"0,1,1,0,0,1" is generated and output after subtraction "
1, -1, 1, 0, -1, 0, 1, -1 "are obtained. In this way, it is converted into a ternary signal of an upper level (1), a middle level (0) and a lower level (-1). Since the potential of the middle level is constant regardless of the amplitude, the amplitude of the signal input to the bipolar conversion circuit 51 can be easily detected by detecting the amplitude of the middle level and the upper level or the middle level and the lower level. it can.

Next, the operation of this configuration will be described. Comparators 52 and 54 having threshold values V1 and V2 having a constant potential difference with respect to the middle level detect that the amplitude of the signal input to the bipolar conversion circuit 51 is V1 and V2 or more, respectively. By doing so, it is detected that the received burst signal power exceeds a certain value on the plus side. In the following, it is assumed that V1 <V2. That is, the comparator 52 detects a light reception level lower than that of the comparator 54. The carrier detection circuit 56 outputs a latch signal so that the level detection operation holds the outputs of the comparators 52 and 54 after a predetermined time has elapsed after the start of burst reception. This is because both the comparators 52 and 54 detect only the initial signal of the burst reception of the parallel feedback type amplifier 2 and remove the influence of signal disturbance due to noise or the like thereafter.

The operation of the carrier detection circuit 56 will be described. It has a threshold value closer to the middle level than the comparators 52 and 54. That is, the signal is surely detected. Therefore, the pulse train which becomes "HIGH" at the head of the burst signal having the power equal to or higher than the specified light receiving level lower than the predetermined light receiving level to be detected by the comparators 52 and 54 is S / R.
The burst signal is sent to the flip-flop 58, and the S / R flip-flop 58 becomes "HIGH" at the head of the burst signal and holds the "HIGH" state until the reset signal is input. On the other hand, the monomulti 59 outputs to the comparators 52 and 54 a latch signal that falls after a fixed time from the rising point of the S / R flip-flop 58. That is, a pulse is output for a fixed time from the beginning of the burst. Mono Multi 59
The fall time of the gate signal is set within the preamble period that does not include the information at the beginning of the burst, and prevents the data in the burst from being lost by the level detection operation and the gain switching operation that follows. Comparators 52, 5
The pulses output from 4 make the outputs of the S / R flip-flops 53 and 55 "HIGH", and this state is held until a reset signal is input, and given to the variable impedance circuit 6. The above is the detailed operation of level detection. That is, when the head portion of the burst reception after the reset is detected, the level is detected with the maximum gain, and the subsequent impedance value is designated according to the detected level.

Example 3. In this embodiment, an example of a variable impedance circuit will be described. FIG. 2 shows a detailed configuration diagram of the variable impedance circuit according to the present embodiment. In the figure, the variable impedance circuit 6 is a level conversion circuit 70, 71,
It is composed of transistors 72 and 73 and resistors 74 and 75. Level conversion circuits 70 and 71 and a transistor 72,
73 operates as a switch circuit. That is, the "LO input from the S / R flip-flops 53 and 55 is input.
The signal levels of W ”and“ HIGH ”pass through the level conversion circuits (drive circuits) 70 and 71 to the transistor 72,
The collector-emitter resistance of 73 is the feedback resistance 3 respectively.
Is input to the bases of the transistors 72 and 73 so as to switch so as to have a value sufficiently higher than that of the resistors or a value sufficiently lower than that of the resistors 74 and 75. That is, in this operation, as the light receiving level is increased, the impedance between the anode of the light receiving element 1 and the power supply 7 is a sufficiently high value (the resistance 7
It is understood that the level detection circuit 5 controls the impedances to have three impedances of infinite resistance (4, 75 in series), a resistance 74, and a parallel resistance of the resistance 74 and the resistance 75.

FIG. 3 is a graph showing the relationship between the output amplitude of the parallel feedback type amplifier of this embodiment and the received light power. In the figure, 100 is a characteristic when the level detection circuit 5 is not operated, and 101 is a characteristic when the level detection circuit 5 is provided. The configuration of the parallel feedback type amplifier is the same as that of the eleventh one used in the description of the conventional example, and the characteristic 100 when the level detection circuit 5 is not provided.
Is the same as the characteristic of FIG. The level detection circuit 5 is
Since the level is detected at 22.5 dBm and -12 dBm and the impedance of the variable impedance circuit 6 is switched, the gain of the receiver is the received light power of -33 to -22.5 dB.
Maximum at m, -22.5 dBm to -12 dBm intermediate,-
The minimum is 12 dBm or more. With this, -33-
The parallel feedback amplifier 2 can operate linearly in a wide range of 2.5 dBm, and a signal without code distortion can be input to the identification and reproduction circuit 8. The identification / reproduction circuit 8 has a comparator 81 to which positive feedback is applied by resistors 82 and 83.
The threshold value input to the positive-phase input terminal follows the input signal at a tracking speed that is defined by the capacitor 84 and the resistor 83. As a result, stable data reproduction can be achieved without being substantially affected by the bias fluctuation of the input signal generated by the fluctuation of the burst signal interval or the mark ratio (the ratio of 1 in all bits) in the burst signal.

Example 4. The level detection circuit may be in another position in order to realize the gist of the present invention. FIG. 4 is a diagram showing another configuration of the optical receiver according to the embodiment of the present invention. The level detecting circuit 5 in the figure is connected to the cathode side of the light receiving element, and detects the level of the received burst signal at the burst head by monitoring the current of the light receiving element 1. For gain control, the same operation as in the first embodiment is performed.

FIG. 5 is a diagram showing the detailed structure of the optical receiving apparatus of this embodiment. In the figure, 64 and 65 are transistors forming a current mirror circuit, and 66a is a resistor as a current-voltage conversion circuit. The same parts as those in Embodiments 1 to 3 are designated by the same reference numerals. The operation of this configuration is as follows. The same current as the current flowing through the light receiving element 1 is output to the resistor 66 by the current mirror circuit composed of the transistors 64 and 65. The current output from the transistor 65 is converted into a voltage signal by the resistor 66, and the amplitude is detected by the comparators 52 and 54. Other circuits of level detection circuit 5, variable impedance circuit 6, identification reproduction circuit 8
The operation of is the same as that of the first embodiment.

FIG. 6 is a diagram showing the detailed structure of an optical receiving apparatus according to another embodiment of the present invention. In the figure, 66 is a parallel feedback type amplifier as a current-voltage conversion circuit. The same parts as those in Examples 1 to 3 are designated by the same reference numerals.
The current flowing through the light receiving element 1 is input from the cathode to the current mirror circuit composed of the transistors 64 and 65, and is output to the parallel feedback amplifier 66. The current output from the transistor 65 is converted into a voltage signal by the parallel feedback amplifier 66, and the amplitude is detected by the comparators 52 and 54.
Since the parallel feedback type amplifier 66 has a voltage conversion function and a high input impedance, the level detection operation is possible even at a high speed operation. Other level detection circuit 5
The circuit, the variable impedance circuit 6, and the identification reproduction circuit 8 operate in the same manner as in the first embodiment.

Example 5. FIG. 7 is a diagram showing the detailed structure of an optical receiving apparatus according to still another embodiment of the present invention. In the figure, 66 is a parallel feedback type amplifier as a current-voltage conversion circuit. The same parts as those in Examples 1 to 4 are designated by the same reference numerals. In this example, the current flowing through the light receiving element 1 is directly input from the cathode to the parallel feedback amplifier 66. The parallel feedback type amplifier 66 has a current-voltage conversion function,
Moreover, since the input impedance is high, high continuous operation is possible. The other operations of the level detection circuit 5, the variable impedance circuit 6, and the identification reproduction circuit 8 are the same as those in the first embodiment.

Example 6. In this embodiment, a part related to improvement of the identification and reproduction circuit for reproducing data will be described. FIG. 8 is a diagram showing a detailed configuration of the optical receiving apparatus according to the embodiment of the present invention. In the figure, the identification reproduction circuit 8 is composed of 85 and 10 comparators and 11 S / R flip-flops. The same parts as those in Examples 1 to 5 are designated by the same reference numerals.

Next, the operation of the above configuration will be described. Comparator 8
A ternary signal is input from the bipolar conversion circuit 51 in the level detection circuit 5 to the signals 5 and 10. Bipolar conversion circuit 5
The ternary signal output from 1 is the bipolar conversion circuit 51.
A positive pulse (upper level) when the binary signal input to is changed from "0" to "1", a negative pulse (lower level) when it changes from "1" to "0", and a data transition. When there is no signal, the signal becomes a constant level. That is, AC conversion can be performed without the gradual level change called Sag in the related art. A comparator 85 having a threshold above the mid level detects the above positive pulse, and a comparator 10 having a threshold below the mid level detects the above negative pulse. A set of R flip-flops 11,
It is inputted to the reset terminal and the binary data is reproduced. By reproducing binary data with the output signal of the bipolar conversion circuit 51, the automatic threshold tracking function becomes unnecessary,
Moreover, since there is no Sag, accurate data can be reproduced in a short time. In the above example, the case where the bipolar conversion circuit 51 built in the level detection circuit 5 is used has been described.
The same effect can be obtained even if the system described in the second embodiment is adopted as the level detection circuit 5 and a separately installed bipolar conversion circuit is used.

Example 7. FIG. 9 is a diagram showing the configuration of another embodiment of the identification reproduction circuit. In the figure, 16 is a threshold switching circuit. The same parts as those in Examples 1 to 6 are designated by the same reference numerals. The operation of the above configuration is as follows. Based on the result of the determination by the level detection circuit 5, the comparators 85 and 10 have two different threshold values Vth1 depending on which level Si (i = 1 to n) the received light level of the received burst belongs to. , Vth2 is the threshold switching circuit 1
Switching input from 6. For example, in the input / output characteristics of the parallel feedback amplifier 2 shown in FIG.
-22.5 dBm range (S1), -22.5 dBm-
-12 dBm range (S2), -12 dBm or more (S2)
3), the minimum output amplitude of the parallel feedback amplifier 2 is different,
It becomes larger in the order of S1, S2, and S3. Therefore, Vth1,
It is advantageous in terms of S / N to set the absolute value of Vth2 in the order of S1, S2, and S3, and a lower code error rate can be obtained. In the threshold switching circuit 16, the light receiving level range Si
Optimal threshold values Vth1 and Vt corresponding to (i = 1 to n)
If h2 is programmed in advance, the optimum receiving ability can be obtained. In the above example, the case where the bipolar conversion circuit 51 built in the level detection circuit 5 is used has been described. However, the method described in the second embodiment is adopted as the level detection circuit 5, and a separately installed bipolar conversion circuit is used. However, the same effect can be obtained.

Example 8. In this embodiment, an example in which the level detection accuracy is further enhanced will be described. That is, the other end of the impedance circuit is set to the same potential as the light receiving element end so that voltage detection is started with the detection end voltage of the light receiving element being 0 when there is no signal. FIG. 10 is a diagram showing the configuration of the optical receiving apparatus according to the embodiment of the present invention. In the figure, reference numeral 92 is a second parallel feedback amplifier, which has the same circuit configuration as that of the first parallel feedback amplifier 2. 93 is a voltage follower. The same parts as those in Examples 1 to 6 are designated by the same reference numerals.

The operation of this configuration is as follows. The input terminal of the second parallel feedback amplifier 92 is connected to the power supply terminal of the variable impedance circuit 6 through the voltage follower 93, and the bias voltage of the input terminal of the parallel feedback amplifier 2 at the time of no signal input is supplied. There is. Since the impedance of the variable impedance circuit 6 changes from a state sufficiently higher than that of the feedback resistor 3 to a parallel resistance value of the resistors 74 and 75, the bias voltage of the input portion of the parallel feedback amplifier 2 is almost equal to the potential of the power source 50. It changes to the potential of the power supply 7. Therefore, if the variable impedance circuit is controlled when there is no signal, the bias voltage of the input part of the parallel feedback type amplifier 2 fluctuates and is amplified in the same manner as a signal, and there is a possibility that the level detection circuit 5 malfunctions when there is a signal. However, this phenomenon is due to power supply 7
The potential of is not the fixed voltage of the low impedance but the output of the parallel feedback amplifier 92 shown in the figure, so that the potential can be made equal to the potential of the parallel feedback amplifier 2 at the time of no signal input, and the above-mentioned problem can be prevented. This is also effective for temperature fluctuations and voltage fluctuations.

[0041]

As described above, according to the present invention, since the variable impedance circuit, the amplifier, and the level detector for controlling the variable impedance value are provided, correct data can be obtained even for an input having a wide dynamic range. effective.

Furthermore, since the level detector is a bipolar conversion circuit for obtaining a three-valued output and a plurality of level detectors are provided, there is an effect that the level can be switched in a short time.

[0043]

[0044]

Furthermore, since the variable impedance circuit is selectively switched between the resistance circuits, there is an effect that the circuit design is easy.

Furthermore, the discrimination / reproduction circuit is provided with the first comparator for positive value and the second comparator for negative value for the data discrimination signal which is made ternary by adding the signals whose inputs are delayed and inverted. Therefore, there is an effect that correct data can be reproduced and identified in a short time.

Furthermore, in the identification / reproduction circuit, the comparison reference is switched depending on the level of the input signal, so that the data identification can be reproduced more correctly.

Furthermore, since the voltage across the variable impedance circuit is set to 0 when there is no signal, there is an effect that the level detection error can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a detailed configuration of an optical receiving device according to a second embodiment.

FIG. 3 is a diagram showing a relationship between output amplitude and received light power of a parallel feedback amplifier according to a third embodiment.

FIG. 4 is a block diagram showing a basic configuration of an optical receiving device according to a fourth embodiment.

FIG. 5 is a diagram illustrating a detailed configuration of an optical receiving device according to a fourth embodiment.

FIG. 6 is a diagram showing still another detailed configuration of the fourth embodiment.

FIG. 7 is a diagram illustrating a detailed configuration of an optical receiving device according to a fifth embodiment.

FIG. 8 is a diagram illustrating a detailed configuration of an optical receiving device according to a sixth embodiment.

FIG. 9 is a diagram illustrating a detailed configuration of an optical receiving device according to a seventh embodiment.

FIG. 10 is a diagram showing a detailed configuration of an optical receiving device of an eighth embodiment.

FIG. 11 is a diagram showing a configuration of a conventional burst optical receiver.

FIG. 12 is a diagram showing a configuration of a parallel feedback type amplifier in a conventional example.

FIG. 13 is a diagram showing input / output characteristics of a parallel feedback type amplifier in a conventional example.

[Explanation of symbols]

1 light receiving element, 2 parallel feedback type amplifier, 3 feedback resistor,
4 inverting amplifier, 5 level detection circuit, 6 variable impedance circuit, 7 power supply, 8 identification reproduction circuit, 10 comparator, 11 S / R flip-flop, 16 threshold switching circuit, 51 bipolar conversion circuit, 52, 54, 57
Comparator, 53, 55, 58 S / R flip-flop,
56 carrier detection circuit, 59 mono-multi, 66 current-voltage conversion circuit (parallel feedback type amplifier), 70, 71 level conversion circuit, 72, 73 switch (transistor),
74, 75 resistance, 85 comparator, 92 parallel feedback amplifier.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁷ Identification code FI H04B 10/06 10/14 (72) Inventor Kuniaki Motoshima 5-1-1, Ofuna, Kamakura-shi Mitsubishi Electric Corporation (72) Masamichi Nogami 5-1-1, Ofuna, Kamakura-shi, Mitsubishi Electric Co., Ltd., Communication Systems Research Laboratory (72) Inventor Tadashi Kitayama 5-1-1, Ofuna, Kamakura-shi, Information Systems Research Center, Mitsubishi Electric Corporation (56) References JP-A 61-161008 (JP, A) JP-A 4-309025 (JP, A) JP-A 2-15748 (JP, A) JP-A 1-32775 (JP, A) Kai 62-193307 (JP, A) Actual Kaihei 4-96149 (JP, U) Actual Kaihei 5-31393 (JP, U) (58) Fields investigated (Int.Cl. ⁷ , DB name) H03F 3 / 08 H03F 1/08 H03G 3/20 H03G 3/30 H04B 10/04

Claims (6)

(57) [Claims] 1. A light receiving element for converting a light receiving signal into an electric output.
For amplifying the electric output of the light receiving element to identify the data.
In an optical receiver including an amplifier for obtaining a signal, the current of the light receiving element is monitored or the amplifier is
Output is detected and included in the above received light signal at each reset.
The level of the first part of burst reception is
Connected to the amplifier input side , the level detection circuit for detecting the
The impedance that is
It becomes each impedance corresponding to several levels
Select the impedance so that during the burst input,
Features a variable impedance circuit to hold
Optical receiving device according to. 2. A level detection circuit is provided for detecting a signal to be detected.
The signal obtained by delaying the signal to be detected is subtracted to obtain 3 levels.
The three-valued signal of the
Compare with the reference voltage and refer to the lower value of the above three-valued signal
The optical receiving apparatus according to claim 1, wherein the level is detected by comparing with a signal . 3. The variable impedance circuit is an impeder.
Constituted by a resistor and a switching element as Nsu, and the
The switching element is turned on / off by the output of the level detection circuit
Multiple sets of resistors and switching elements are provided.
Optical receiving device according to claim 1, wherein the configuration and the. 4. A discriminating and reproducing circuit for reproducing and outputting data, wherein a signal for discriminating data after ternary conversion is inputted, a first comparator having a reference for comparing positive values of the data discriminating signal, and a negative comparator 3. An identification / reproduction circuit comprising a second comparator having a comparison reference and a flip-flop for reproducing data by setting the outputs of the first and second comparators. Optical receiver. 5. The optical receiving apparatus according to claim 4, wherein in the identification / reproduction circuit, the comparison reference values of the first and second comparators are switched and set according to the detection level of the level detection circuit. 6. The optical receiver according to claim 1 , wherein the variable impedance circuit has a voltage source equal to an input terminal of the amplifier when there is no signal, connected to the other end of the variable impedance circuit.