JPH0894999A - Active matrix type liquid crystal display device - Google Patents

Abstract

PURPOSE: To make it possible to rapidly charge the charges meeting the potential of data signals to pixel capacitors and to rapidly execute rewriting to pixels. CONSTITUTION: A liquid crystal element 10 is provided with plural TFTs 17 respective corresponding to the respective data lines 13 thereof. The gate electrodes G' of the respective TFTs 17 are connected to a control element 18 and the source electrodes S' are connected to a prescribed potential terminal 19 connected to the prescribed electric charge reference potential VL. The drain electrodes D' are connected respectively to the respective data lines 14 and a charge control section 32 for supplying the signals to turn the TFTs 17 on in the initial period of the selection period of the respective address lines 13 is connected to the control terminal 18.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display device using an active matrix type liquid crystal element having a thin film transistor as an active element.

[0002]

2. Description of the Related Art Conventionally, an active matrix type liquid crystal display device using an active matrix type liquid crystal element having a thin film transistor as an active element has an address for supplying a gate signal to the active matrix type liquid crystal element and each address line of the liquid crystal element. It is composed of a driver and a data driver for supplying a data signal to each data line of the liquid crystal element.

The above-mentioned active matrix type liquid crystal element has a plurality of pixel electrodes arranged in a matrix in a row direction and a column direction on one of a pair of transparent substrates facing each other across a liquid crystal layer, and each of these pixel electrodes. To each of the pixel electrode rows, a plurality of address lines wired along one side of each pixel electrode row, and each pixel electrode column along one side thereof. Providing a plurality of wired data lines,
The other substrate is provided with a counter electrode facing each of the pixel electrodes.In this active matrix type liquid crystal element, generally, liquid crystal molecules are twist-aligned between the two substrates, and the outer surfaces of the two substrates are respectively arranged. A twisted nematic type with a polarizing plate is used.

In this active matrix liquid crystal display device, a gate signal is sequentially supplied from an address driver to each address line of the liquid crystal element, and a data signal corresponding to image data is supplied to each data line from a data driver at the timing. When a gate signal is supplied to an address line, each active element (thin film transistor) in the row corresponding to the address line is turned on by the application of the gate signal, and each pixel electrode in that row is driven. A voltage corresponding to the potential of the data signal supplied to each data line from the data driver is applied between the counter electrode and the counter electrode, and the charge is a capacitance formed by the pixel electrode, the counter electrode, and the liquid crystal layer between them. (Hereinafter, referred to as pixel capacitance) is charged, and the pixel is in a writing state.

When the address line selection period (gate signal supply period) elapses and the gate signal supply to the address line is cut off, each active element in the row corresponding to the address line is turned off. In this state, the electric charge charged in the pixel capacitor is held until the next selection period, and the pixel is held in the written state.

When the non-selection period of the address line elapses and the next selection period starts, and the gate signal is supplied to this address line again, each active element in the row corresponding to this address line is turned on. At the same time, the electric charge according to the potential of the data signal supplied in this selection period is charged in the pixel capacitor to put the pixel in a new writing state, and the writing state is held until the next selection period. The following is a repetition of the above operation, and each pixel in the row is rewritten every selection period of each address line.

[0007]

By the way, the charge of each pixel capacitance of the liquid crystal element in the above active matrix liquid crystal display device is held by the potential of the data signal supplied from the data driver and the pixel capacitance. Corresponding to the difference from the pixel electrode potential based on the amount of charge that is present, positive charge when the data signal potential is higher than the pixel electrode potential (injection of charge from the data driver to the pixel capacitance)
When the potential of the data signal is lower than the potential of the pixel electrode, negative charge, that is, discharge (absorption of charge from the pixel capacitance to the data driver) is performed.

However, since the conventional active matrix liquid crystal display device charges the pixel capacitance with the data driver, the negative charge takes time. This is because the impedance seen from the data signal output side of the data driver is high.

In the conventional active matrix liquid crystal display device, the writing time to the pixels in each row, that is, the length of the selection period of each address line is set with reference to the time required to charge and discharge the pixel capacitance. However, since the time required for discharging is long as described above, the selection period of each address line must be set to a certain length,
Therefore, the drive duty of the liquid crystal element cannot be increased.

According to the present invention, an active matrix liquid crystal capable of time division driving with high duty capable of rapidly charging a pixel capacitance with electric charges according to the potential of a data signal to rewrite a pixel in a short time. It is intended to provide a display device.

[0011]

According to the present invention, an active matrix type liquid crystal element having a thin film transistor as an active element, an address driver for supplying a gate signal to each address line of the liquid crystal element, and each data line of the liquid crystal element. In the active matrix liquid crystal display device including a data driver for supplying a data signal to a substrate, among the pair of substrates of the liquid crystal element, the substrate on which the pixel electrode, the active element, the address line and the data line are provided, A plurality of thin film transistors corresponding to the data lines are provided, the gate electrodes of these thin film transistors are connected to the control terminal, and one of the source and drain electrodes is connected to a predetermined potential terminal connected to a predetermined potential, and the source and drain electrodes If the other is connected to each of the data lines, Moni, to the control terminal, is characterized in that it has connecting means for supplying a signal for turning on the TFT early in the selection period of each address line.

In the present invention, it is desirable that the predetermined potential is set near the lowest potential of the potentials of the data signal. In addition, one each of the predetermined potential terminal and the control terminal may be used. In that case, the gate electrode of each thin film transistor may be commonly connected to the control terminal, and one of the source and drain electrodes may be commonly connected to the predetermined potential terminal. Good.

[0013]

In the active matrix liquid crystal display device of the present invention, by turning on each thin film transistor connected to each data line at the beginning of the selection period of each address line, the row corresponding to the selected address line is turned on. Each pixel electrode is temporarily connected to a predetermined potential via the address line and the thin film transistor, and a charge corresponding to the difference between the pixel electrode potential and the predetermined potential between the pixel capacitance of the row and the predetermined potential is applied. By carrying out transfer, the amount of electric charge held in the pixel capacitor is made a predetermined amount of electric charge corresponding to the predetermined electric potential, and then the amount of electric charge held in the pixel capacitor and the data driver are supplied to the pixel capacitor. A charge having a difference from the charge amount according to the potential of the data signal is charged, and the pixel capacitor holds the charge according to the data signal. Those were Unishi.

In this active-matrix liquid crystal display device, since charges are transferred between the pixel capacitance and a predetermined potential in the initial stage of the selection period through a low impedance circuit formed of thin film transistors, The time required to bring the amount of charge held in the capacitor to a predetermined amount is extremely short.

Further, in this active matrix liquid crystal display device, the amount of electric charge held in the pixel capacitor is once set to a predetermined amount of electric charge at the beginning of the selection period, and then the held electric charge amount and data are stored in this pixel capacitor. In order to charge a charge having a difference from the charge amount corresponding to the potential of the data signal supplied from the driver, if the predetermined potential is set near the lowest potential of the data signal, the pixel capacitance Since the charge to the pixel capacitance after making the retained charge amount to a predetermined charge amount is almost positive charge (charge injection from the data driver to the pixel capacitance), the charge corresponding to the data signal is applied to the pixel capacitance. The time required to hold the can be short.

Therefore, according to this active matrix liquid crystal display device, charges corresponding to the potential of the data signal can be quickly charged to the pixel capacitance and rewriting to the pixel can be performed in a short time. Time division drive is possible.

In addition, in this active matrix liquid crystal display device, a thin film transistor or the like which forms a circuit for making the amount of charge held in the pixel capacitance to a predetermined amount in the initial period of the selection period is provided with the pixel electrode of the pair of substrates of the liquid crystal element. Since it is provided on the substrate on which the active element, the address line and the data line are provided, the thin film transistor and the like can be formed at the same time by using the process of forming the active element and the like on the substrate. The manufacturing cost of the device does not increase, and since the circuit is incorporated in the liquid crystal device, the structure of the liquid crystal display device does not become complicated.

Further, in the active matrix liquid crystal display device of the present invention, the predetermined potential terminal and the control terminal are each one, the gate electrode of each thin film transistor is commonly connected to the control terminal, and one of the source and drain electrodes is connected. If the common connection is made to the predetermined potential terminal, the supply means for supplying the predetermined potential and the signal for turning on the thin film transistor can be connected to the liquid crystal element at one location respectively, so that the configuration of the liquid crystal display device can be simplified.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing an equivalent circuit of the structure of the active matrix liquid crystal display device of this embodiment. This liquid crystal display device includes an active matrix liquid crystal element 10, an address driver 30 for driving the liquid crystal element 10, and The data driver 31 and the charge controller 32 are included.

First, the structure of the active matrix type liquid crystal element 10 will be described. The liquid crystal element 10 has a specific structure, which is not shown in the figure. A plurality of transparent pixel electrodes 11 arranged in a matrix in the row direction and the column direction, active elements 12 made of thin film transistors arranged corresponding to the respective pixel electrodes 11, and the pixel electrodes for each pixel electrode row. A plurality of address lines 13 wired along one side and a plurality of data lines 14 wired along one side for each pixel electrode column are provided.
The other substrate is provided with a transparent counter electrode 15 facing each pixel electrode. In this embodiment, liquid crystal molecules are twist-aligned between the two substrates, and a polarizing plate is provided on the outer surface of each substrate. It uses the arranged twisted nematic type.

The active element (thin film transistor) 12
Is a gate electrode formed on the substrate, a gate insulating film covering the gate electrode, an i-type semiconductor film made of a-Si (amorphous silicon) or the like formed on the gate insulating film, and the i A source electrode and a drain electrode provided on an n-type semiconductor film via an n-type semiconductor film made of, for example, a-Si doped with impurities. The n-type semiconductor film includes a source electrode and a drain electrode. Are separated from each other, that is, in the channel region of the i-type semiconductor film. In FIG. 1, G is the active element 12
Is a gate electrode, S is a source electrode, and D is a drain electrode.

The address line 13 is wired on the substrate, and the gate electrode G of the active element 12 is formed integrally with the address line 13. The gate insulating film of the active element 12 (a transparent film made of silicon nitride or the like) is provided on almost the entire surface of the substrate so as to cover the gate electrodes G and the address lines 13 of all the active elements 12, and each address line 13 is provided. The terminal portion 13a of
It is exposed by providing an opening in the gate insulating film.

Each pixel electrode 11 is formed on the gate insulating film so as to correspond to each active element 12, and the pixel electrode 11 has the source of each active element 12 at its edge. It is connected to the electrode S.

Further, the data line 14 is formed on an interlayer insulating film provided on the gate insulating film so as to correspond to the wiring regions of the data lines 14, respectively.
The data line 14 is connected to the drain electrode D of the active element 12 through a contact hole provided in the interlayer insulating film and the gate insulating film.

Further, among the pair of substrates of the liquid crystal element 10, the pixel electrode 11, the active element 12 and the address line 1 are provided.
A charge charge control circuit 16 is formed on a substrate (hereinafter referred to as an active element formation substrate) on which the liquid crystal 3 and the data line 14 are provided, while avoiding the display area of the liquid crystal element 10 (arrangement area of the pixel electrodes 11). There is.

The charge / charge control circuit 16 has each pixel capacitance of the selected row at the beginning of the selection period of each address line 13 (capacity composed of the pixel electrode 11, the counter electrode 15 and the liquid crystal layer between them). This is a circuit for setting the amount of charge held in CLC to a predetermined amount.
Is the data line terminal portion 14a of the active element forming substrate.
Is provided on the side opposite to the side where the are arranged.

In this embodiment, the liquid crystal filling area of the liquid crystal element 10 (the area surrounded by the frame-like sealing material that joins the pair of substrates) is made larger than the display area, and charges are stored in the liquid crystal filling area. The charge control circuit 16 is provided, and the region where the charge control circuit 16 is provided is masked by providing a light-shielding film on the substrate on the display surface side of the pair of substrates.

The charge / charge control circuit 16 is provided with a plurality of thin film transistors (hereinafter referred to as TFTs) 17 corresponding to the data lines 14 on the active element formation substrate, and the gate electrodes G of the respective TFTs 17. ′ Is connected to a control terminal 18 provided on the edge of the substrate, and one of the source and drain electrodes of each TFT 17, for example, the source electrode S ′ is connected to a predetermined potential terminal 19 provided on the edge of the substrate. Furthermore, each TFT1
The other of the source and drain electrodes of 7, such as a drain electrode D ', is connected to the end of each data line 14, respectively.

Also, in this embodiment, the control terminal 18 is
And one predetermined potential terminal 19 are provided for each TF
The gate electrode G'of T17 is commonly connected to one control terminal 18 via the gate wiring 20, and the source electrode S'of each TFT 17 is connected to one predetermined potential terminal 1 via the source wiring 21.
9 is commonly connected.

The TFT 17 has the same structure as the thin film transistor used for the active element 12, and
The gate electrode of the FT 17, the gate wiring 20, and the control terminal 18 are formed on the substrate by the same metal film as the gate electrode G of the active element 12 and the address line 13.

The gate insulating film of the TFT 17 is a film integrated with the gate insulating film of the active element 12, and TF
The i-type semiconductor film and the n-type semiconductor film of T17 and the source and drain electrodes S'and D'are formed of the same semiconductor film and metal film as those of the active element 12, respectively. The gate wiring 20 is covered with the gate insulating film, and the control terminal 18 is exposed by forming an opening in the gate insulating film.

Further, the above-mentioned interlayer insulating film provided corresponding to the wiring region of each data line 14 is also formed almost entirely in the formation region of the charge / charge control circuit 16, and each data region is formed. Line 1
Reference numeral 4 extends to a portion above each TFT 17 and is connected to the drain electrode D ′ of each TFT 17 through a contact hole formed in the interlayer insulating film and the gate insulating film.

The source wiring 21 and the predetermined potential terminal 19 are formed of the same metal film as the data line 14 on the interlayer insulating film.
Are connected to the source electrode S'of the TFT 17 through contact holes provided in the interlayer insulating film and the gate insulating film.

An address driver 30 for sequentially supplying a gate signal to each address line 13 is provided to the terminal portion 13a of each address line 13 of the liquid crystal element 10.
Is connected to the terminal portion 14a of each data line 14,
A data driver 31 for supplying a data signal having a potential corresponding to image data is connected to each of the data lines 14, and a charge control unit 32 is connected to a control terminal 18 of the charge / charge control circuit 16.

The address driver 30 sequentially selects the address lines 13 to select the address lines 1
3, a gate signal is sequentially supplied to the gate signal 3, and the potential of this gate signal is supplied to the address driver 30 after being generated by a power supply unit (not shown).

The data driver 31 supplies a data signal to each data line 14 in every selection period of all the address lines 13, and the potential of the data signal supplied to each data line 14 is also the power supply. And is supplied to the data driver 31.

On the other hand, the charge control section 32 supplies a signal (hereinafter referred to as a charge control signal) for turning on the TFT 17 of the charge charge control circuit 16 to the control terminal 18 at the beginning of the selection period of all the address lines 13. so,
The potential of the charge control signal is also generated by the power supply unit and supplied to the charge charge control unit 32.

Further, a potential to be supplied to the counter electrode 15 and a predetermined potential (hereinafter referred to as a charge charge reference potential) which is a reference for charge charge controlled by the charge charge control circuit 16 are set in the power supply section. Therefore, the counter electrode 15 of the liquid crystal element 10 is connected to the counter electrode potential of the power source unit, and the predetermined potential terminal 1 of the charge charge control circuit 16 is connected.
Reference numeral 9 is connected to the charge charge reference potential VL of the power source section.

The operation of the active matrix liquid crystal display device configured as described above will be described. In this liquid crystal display device, writing to each pixel of the liquid crystal element 10 is performed by the following method.

FIG. 2 shows the waveform of the gate signal supplied to the address line 13 of the first row of the liquid crystal element 10, the waveform of the charge control signal supplied to the control terminal 18 of the charge charge control circuit 16, and one data. The waveform of the data signal supplied to the line 14 and the change in the inter-electrode voltage (voltage between the pixel electrode 11 and the counter electrode 15) of one pixel in the first row are shown.

In FIG. 2, TF is one frame period and T
s is a selection period of each address line 13, an initial time t1 of the selection period Ts is a charge amount control time for making the amount of charge held in the pixel capacitance CLC a predetermined amount, and the remaining time t2 is a pixel period. The writing time is set to charge the capacitor CLC with electric charges according to the potential of the data signal.

The gate signal is supplied to the active element 1 during the selection period Ts of the address line 13 to which the gate signal is supplied.
2 is a signal which becomes a potential to turn on the active element 12
Is turned on by the gate signal only during the selection period Ts.

The charge control signal is applied to the TFT1 of the charge charge control circuit 16 at the beginning of the selection period Ts of all the address lines 13, that is, at the charge amount control time t1.
This is a signal which becomes a potential for turning on 7, and each TFT 17 of the charge charge control circuit 16 is turned on for the initial charge amount control time t1 every selection period Ts of each address line 13.

On the other hand, the data signal is a signal whose potential changes every selection period Ts of all the address lines 13 according to the image data at that time, and this data signal is
At the beginning of the selection period Ts of each address line 13, the charge charge reference potential VL is reached for the charge amount control time t1, and then the potential according to the image data is reached.

The waveform of the data signal shown in FIG.
This is a waveform when the polarity of the voltage applied between the pixel electrode 11 and the counter electrode 15 (the polarity with respect to the potential V0 supplied to the counter electrode 15) is inverted every frame TF.

The charge charge reference potential VL is
It is set near the lowest potential (potential of negative polarity and largest absolute value) of the potentials corresponding to the image data of the data signal.

In this liquid crystal display device, each active element 12 in the row corresponding to the selected address line 13 is turned on by the gate signal supplied to the address line 13 in each selection period Ts of each address line 13. And each pixel electrode 11 in that row is an active element 1
2 is electrically connected to the address line 13 via 2 and at the beginning of the selection period Ts, each TFT 17 of the charge / charge control circuit 16 is turned on by the charge control signal supplied from the charge control unit 32 for the charge amount control time t1. It becomes a state.

When each TFT 17 of the charge / charge control circuit 16 is turned on, each pixel electrode 11 of the row corresponding to the selected address line 13 is connected to the predetermined potential terminal via the address line 13 and the TFT 17. 19 is connected to the charge charge reference potential VL, and the pixel capacitor 11 and the charge charge reference potential VL are connected.
Between the pixel electrode 11 and the charge-charge reference potential VL, the charge is exchanged according to the potential difference.

In this case, the potential of the pixel electrode 11 is a potential based on the amount of charge (the amount of charge corresponding to the write state in the previous selection period) held in the pixel capacitance CLC, whereas the charge charge reference potential VL. Is set near the lowest potential of the potentials corresponding to the image data of the data signal, the charge transfer between the pixel capacitance 11 and the charge charge reference potential VL is performed from the pixel capacitance CLC. This is the absorption of electric charge into the electric potential VL, and by the transfer of this electric charge, the amount of electric charge retained in the pixel capacitance CLC is a predetermined electric charge amount according to the electric potential of the electric charge charge reference electric potential VL,
That is, the potential of the pixel electrode 11 is the charge charge reference potential VL.
Is equal to

At this time, the inter-electrode voltage between the pixel electrode 11 and the counter electrode 15 is, as shown in FIG. 2, the difference between the potential V0 of the counter electrode 15 and the charge charge reference potential VL, V0 −.
(VL).

The pixel electrode 11 is the active element 12
Is connected to the data driver 31 via the data line 14 during the selection period Ts in which is on, the TFT of the charge / charge control circuit 16 has a high impedance as seen from the data signal output side of the data driver 31.
While 17 is in the ON state, the charge is transferred to and from the pixel capacitor CLC with the charge charge reference potential VL.

When the initial charge amount control time t1 of the selection period Ts elapses, each T of the charge charge control circuit 16 is changed.
The FT 17 is turned off when the charge control signal from the charge control section 32 becomes the off potential, and the conduction state between the pixel electrode 11 and the charge charge reference potential VL is cut off.

The potential of the data signal supplied from the data driver 31 to each data line 14 is the charge charge reference potential VL during the initial charge amount control time t1 of the selection period Ts, but the remaining time thereafter. At t2,
Since the potential of the data signal becomes a potential corresponding to the image data, a voltage corresponding to the potential of the data signal is applied between the pixel electrode 11 and the counter electrode 15 during the remaining time t2.
And the amount of charge held in the pixel capacitor CLC (charge amount at the time when the charge amount control time t1 has elapsed).
And a charge amount of a difference between the charge amount according to the potential of the data signal supplied from the data driver 31 is charged, the charge corresponding to the data signal is held in the pixel capacitance CLC, and the pixel is newly written. become.

In this case, the amount of charge held in the pixel capacitor CLC becomes the amount of charge at which the electric potential of the pixel electrode 11 becomes equal to the electric charge charge reference potential VL by the transfer of electric charge with the above-mentioned electric charge charge reference potential VL. Since the charge charge reference potential VL is set near the lowest potential of the potentials corresponding to the image data of the data signal, the charge of the charge corresponding to the potential of the data signal to the pixel capacitance CLC is performed. Most of the charges are positive charges for injecting charges from the data driver 31 to the pixel capacitance CLC, and thus the charges are charged in a short time.

When the selection period Ts of the address line 13 has passed and the supply of the gate signal to the address line 13 is cut off, each active element 12 in the row corresponding to the address line 13 is turned off. Then, the charges charged in the pixel capacitance CLC are held until the next selection period Ts, and the pixel is kept in the written state.

The following is a repetition of the above-described operation. For each selection period Ts of each address line 13, the amount of charge held in each pixel capacitance CLC of that row is first the charge charge reference potential VL.
A predetermined charge amount corresponding to the electric potential of the data signal becomes, and then each pixel capacitance CLC is charged with an electric charge according to the electric potential of the data signal, and each pixel in the row is rewritten.

That is, in the liquid crystal display device, each data line 14 is set at the beginning of the selection period of each address line 13.
By turning on each TFT 17 of the charge charge control circuit 16 which is connected to the pixel electrode 11, each pixel electrode 11 of the row corresponding to the selected address line 13 is temporarily driven through the address line 13 and the TFT 17. By connecting to the charge charge reference potential VL, charge is transferred between the pixel capacitance CLC of the row and the charge charge reference potential VL in accordance with the potential difference between the pixel electrode 11 potential and the charge charge reference potential VL. , The pixel capacitance CLC
The amount of electric charge held in the pixel capacitor C is set to a predetermined amount according to the electric charge charge reference potential VL,
The LC is charged with a charge having a difference between the held charge amount and the charge amount according to the potential of the data signal supplied from the data driver 31, and the pixel capacitor CLC is made to hold the charge according to the data signal. It was done like this.

In this liquid crystal display device, the transfer of charges between the pixel capacitance CLC and the charge charge reference potential VL at the beginning of the selection period Ts is performed by the TFT 17
Since it is performed via the low-impedance charge charge control circuit 16 configured by, the time required to bring the amount of charge held in the pixel capacitance CLC to a predetermined amount is extremely short, and therefore the selection period The charge amount control time t1 secured at the beginning of Ts may be a very short time.

Further, in this liquid crystal display device, after the amount of electric charge held in the pixel capacitance CLC is set to a predetermined electric charge at the beginning of the selection period Ts, the pixel capacitance CLC is changed.
In order to charge the difference between the held charge amount and the charge amount corresponding to the potential of the data signal supplied from the data driver 31, the charge charge reference potential VL is set to the lowest potential of the data signal. If it is set in the vicinity, the charge of the pixel capacitance CLC after the held charge amount of the pixel capacitance CLC is set to a predetermined charge amount is almost positive (from the data driver 31 to the pixel capacitance CLC.
Since the charge is injected into the pixel capacitor CLC, the time required to hold the charge corresponding to the data signal in the pixel capacitor CLC may be short.

Therefore, according to the above liquid crystal display device,
Since the electric charge according to the potential of the data signal can be quickly charged to the pixel capacitor CLC to rewrite the pixel in a short time, it is possible to perform time division driving with high duty.

Moreover, the liquid crystal display device has the selection period T
In the initial stage of s, the TFT 17 and the like constituting the charge charge control circuit 16 for setting the amount of charge held in the pixel capacitance CLC to a predetermined amount are formed by the pixel electrode 11 of the pair of substrates of the liquid crystal element 10, the active element 12, the address line 13 and the data line 14 are provided on the substrate, the TFT 17 of the charge charge control circuit 16 and the like can be simultaneously formed by using the process of forming the active element 12 and the like on the substrate. Therefore, the manufacturing cost of the liquid crystal element 10 does not increase, and since the charge charge control circuit 16 is incorporated in the liquid crystal element 10, the structure of the liquid crystal display device does not become complicated.

Further, in the above liquid crystal display device, the charge charge control circuit 16 has one predetermined potential terminal 19 and one control terminal 18, and the gate electrode G'of each TFT 17 is commonly connected to the control terminal 18. ,Source,
Since one of the drain electrodes S'and D '(source electrode S'in the above embodiment) is commonly connected to the predetermined potential terminal 19, the charge charge reference signal VL and a charge control signal for turning on the TFT 17 are supplied. Since the controller 32 can be connected to the liquid crystal element 10 at each one location, the configuration of the liquid crystal display device can be simplified.

[0063]

In the active matrix liquid crystal display device of the present invention, the liquid crystal element is provided with a plurality of TFTs corresponding to the respective data lines, and the gate electrodes of these TFTs are connected to the control terminals to form the source and drain electrodes. One of them is connected to a predetermined potential terminal connected to a predetermined potential, the other of the source and drain electrodes is connected to each of the data lines, and the control terminal is connected to the TFT at the beginning of the selection period of each of the address lines. Since the means for supplying the signal for turning on is connected, the electric charge according to the potential of the data signal can be quickly charged to the pixel capacitance to rewrite the pixel in a short time. It is possible to drive in time division.

Moreover, in this active matrix liquid crystal display device, a TFT or the like which constitutes a circuit for setting the amount of charge held in the pixel capacitance to a predetermined amount at the beginning of the selection period is provided with the pixel electrode of the pair of substrates of the liquid crystal element. Since it is provided on the substrate on which the active element, the address line and the data line are provided, the TFT and the like can be simultaneously formed by utilizing the step of forming the active element and the like on the substrate,
Therefore, the manufacturing cost of the liquid crystal element does not increase, and since the circuit is incorporated in the liquid crystal element,
The configuration of the liquid crystal display device does not become complicated.

Further, in the active matrix liquid crystal display device of the present invention, each of the predetermined potential terminal and the control terminal is provided, the gate electrode of each thin film transistor is commonly connected to the control terminal, and one of the source and drain electrodes is connected. If the common connection is made to the predetermined potential terminal, the supply means for supplying the predetermined potential and the signal for turning on the thin film transistor can be connected to the liquid crystal element at one location respectively, so that the configuration of the liquid crystal display device can be simplified.

[Brief description of drawings]

FIG. 1 is a diagram showing an equivalent circuit configuration of an active matrix liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a waveform of a gate signal supplied to an address line of a first row of a liquid crystal element, a waveform of a charge control signal supplied to a control terminal of a charge charge control circuit, and a waveform of a data signal supplied to one data line. FIG. 6 is a diagram showing changes in the inter-electrode voltage of one pixel in the first row.

[Explanation of symbols]

 10 ... Liquid crystal element 11 ... Pixel electrode 12 ... Active element 13 ... Address line 14 ... Data line 15 ... Counter electrode CLC ... Pixel capacitance 16 ... Charge circuit 17 ... TFT 18 ... Control terminal 19 ... Predetermined potential terminal 30 ... Address driver 31 ... Data driver 32 ... Charge control unit

Claims (3)

[Claims] 1. An active matrix type liquid crystal element using a thin film transistor as an active element, an address driver for supplying a gate signal to each address line of the liquid crystal element, and a data driver for supplying a data signal to each data line of the liquid crystal element. An active matrix liquid crystal display device comprising: a pair of substrates of the liquid crystal element, the substrate having pixel electrodes, active elements, address lines and data lines respectively corresponding to the data lines. A plurality of thin film transistors are provided, a gate electrode of each thin film transistor is connected to a control terminal, one of a source electrode and a drain electrode is connected to a predetermined potential terminal connected to a predetermined potential, and the other of the source and drain electrodes is connected to each of the data terminals. While connected to each line, The serial control terminal, an active matrix liquid crystal display device characterized by means for supplying a signal for turning on the TFT early in the selection period of each address line is connected. 2. The active matrix liquid crystal display device according to claim 1, wherein the predetermined potential is set near the lowest potential of the potentials of the data signals. 3. A predetermined potential terminal and a control terminal are respectively provided, the gate electrode of each thin film transistor is commonly connected to the control terminal, and one of the source and drain electrodes is commonly connected to the predetermined potential terminal. The active matrix liquid crystal display device according to claim 1 or 2, wherein