JPH0883796A - Electroless plating bath used for forming wiring of semiconductor device and wiring forming method for the same - Google Patents

Abstract

PURPOSE: To eliminate the inclusion of metal impurities in a metal wiring layer even if the metal wiring layer of a semiconductor device is formed by using electroless plating bath. CONSTITUTION: Contact holes 13 and grooves 14 for wirings are formed on an insulating film 12 formed on a semiconductor substrate 11. Silver films 18 are formed in the holes 13 and the grooves 14 and on the film 12 by electroless plating bath containing silver nitrate containing silver ions, tartaric acid of reducer of the ions, ethylene diamine of complexing agent of the ions, and tetramethylammonium hydroxide metallic ions of pH adjustor. Thereafter, the film 18 on the film 12 is removed by a mechano-chemical polishing method, and buried wirings 19 are formed in the holes 13 and the grooves 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a novel electroless plating bath used for forming wiring of a semiconductor device and a method for forming wiring of a semiconductor device using the electroless plating bath.

[0002]

2. Description of the Related Art Conventionally, a sputtering method of aluminum, a CVD method of tungsten, or the like has been used for depositing a metal film to be wiring of a semiconductor device.

However, according to the sputtering method or the CVD method, sufficient coverage cannot be obtained, and a large amount of energy is applied to the metal compound to release the metal, or the corresponding metal compound is separated. However, since a metal is deposited on the surface of the semiconductor substrate, there is a problem that enormous cost is required and the process is complicated.

Therefore, as a method for solving these problems, recently, as shown in Japanese Patent Laid-Open No. 4-307736, deposition of a metal film by an electroless plating method has attracted attention.

As an electroless plating bath, "EL
ECTORLESS PLATING (1985)
Chapter 17 Electroless Pl
ating Of Silver N.A. In Koura ”, those having the following composition have been proposed.

Silver nitrate (silver ion source) 8.8X10 ^-3 mol / l Rochelle salt (reducing agent) 3.5X10 ^-2 mol / l ethylenediamine (complexing agent) 5.4X10 ^-2 mol / l 3,5-diiodotyrosine (Stabilizer) 4.0X10 ^-5 mol / l NaOH or KOH (pH adjuster) pH 10.0 Bath temperature 35 ° C

[0007]

However, the present inventors have found that when the metal wiring layer of a semiconductor device is formed using the electroless plating bath, the characteristics of the semiconductor device deteriorate.

Then, as a result of various studies, the above electroless plating bath was subjected to metal impurities such as Na and K (alkali metal,
It was found that alkaline earth metal and the like) are contained, and the metal impurities are contained in the plating film as the wiring metal and then diffused into the semiconductor device to deteriorate the characteristics of the semiconductor device.

The present inventors determined the amount of Na and the amount of K in the electroless silver plating bath described above by atomic emission spectrometry (ICP) to find that they were 7411 ppm and 6993 pp, respectively.
It showed a large value of m. In addition, the deposited silver plating film also contains Na and K. When the amount of Na and the amount of K in the silver film having a thickness of 0.5 μm deposited on the semiconductor substrate were measured, they were 842 ppm and 411pp
It was m. These values far exceed the allowable values of the metal impurities contained in the wiring metal of the semiconductor device, and thus it was not possible to use a silver film containing a large amount of metal impurities in the wiring of the semiconductor device.

In view of the above, it is an object of the present invention to prevent the metal wiring layer from containing almost any metal impurities even if the metal wiring layer of the semiconductor device is formed using an electroless plating bath.

[0011]

In the present invention, the metal impurities are contained in the metal wiring layer due to the metal contained in the reducing agent for the metal ions and the pH adjusting agent in the electroless plating bath. The present invention has been made based on this finding, and uses an electroless plating bath containing a metal ion reducing agent and a pH adjusting agent, which does not contain a metal in the chemical formula.

Specifically, the means for solving the problems according to the invention of claim 1 is to use an electroless plating bath used for forming wiring of a semiconductor device,
A metal material containing a metal ion, a reducing agent for the metal ion containing no metal in the chemical formula, a complexing agent for the metal ion containing no metal in the chemical formula, and a pH adjusting agent containing no metal in the chemical formula It is to be configured.

The invention of claim 2 limits the metal ions contained in the metal material of claim 1 to silver ions, copper ions, gold ions, nickel ions, cobalt ions or palladium ions.

Silver ion is from silver nitrate, copper ion is from copper sulfate, gold ion is from gold ammonium cyanide or gold chloride, nickel ion is from nickel sulfate or nickel chloride, cobalt ion is from cobalt sulfate or cobalt chloride, and palladium ion. Is supplied from palladium sulfate or palladium chloride, but the metal material is not limited to these.

According to the invention of claim 3, the metal ions contained in the metal material of claim 1 are limited to silver ions, copper ions, gold ions or palladium ions, and the reducing agent is tartaric acid or a metal in the chemical formula. It is limited to those containing at least one of tartaric acid salt, monosaccharide, disaccharide, polysaccharide, hydrazine, hydrazine derivative, aldehyde and polyhydric alcohol which are not contained.

Examples of the tartrate salt containing no metal in the chemical formula include ammonium tartrate, and examples of the monosaccharide include glucose, dextrose, glucolactone, glucopyranose, fructose, and a mixture thereof.
Examples of the disaccharide include saccharose, lactose, maltose or a mixture thereof, examples of the polysaccharide include alginic acid, cellulose, starch, glycogen, pullulan or a mixture thereof, and examples of the hydrazine derivative include hydrazine sulfate, hydrazine hydrochloride and hydrate. Examples thereof include hydrazine and a mixture thereof, examples of the aldehyde include formalin, glyoxal and a mixture thereof, and examples of the polyhydric alcohol include glycerin, but the reducing agent containing no metal in the chemical formula is not limited thereto.

According to the invention of claim 4, the metal ions contained in the metal material of claim 1 are limited to nickel ions or cobalt ions, and the reducing agent is hypophosphorous acid, or the following chemical compound containing no metal. It is limited to those containing at least one of phosphite, a borohydride compound containing no metal in the chemical formula, hydrazine and a hydrazine derivative.

Ammonium hypophosphite is mentioned as the hypophosphite containing no metal in the chemical formula, and borane, borazane, borazene, borazine, and borane derivatives are the borohydride compounds containing no metal in the chemical formula. , A derivative of borazane, a derivative of borazene, a derivative of borazine or a mixture thereof, and the like, the derivative of borane is diborane, methyldiborane or a mixture thereof, and the derivative of borazane is diborazine, diethylamine borazine, dimethylamine borazine, Examples include, but are not limited to, trimethylamine borazane or mixtures thereof.

According to the invention of claim 5, the metal ions contained in the metal material of claim 1 are limited to silver ions or copper ions, and the complexing agent is selected from ethylenediamine, ethylenediamine derivatives, ammonia and triethanolamine. To at least one of the above.

As the ethylenediamine derivative, N, N-bis (2-hydroxyethyl) ethylenediamine, N, N'-
Examples include, but are not limited to, bis (2-hydroxyethyl) ethylenediamine ethylenediamine, N, N, N ′, N′-tetrakis (2-hydroxyethyl) ethylenediamine, ethylenediaminetetraacetic acid, or mixtures thereof.

The invention of claim 6 limits the metal ions contained in the metal material of claim 1 to gold ions, nickel ions, cobalt ions or palladium ions, and
The complexing agent is limited to a compound containing a carboxylic acid group.

Examples of the compound containing a carboxylic acid group include citric acid, acetic acid, lactic acid, ortho-hydroxybenzoic acid, oxalic acid, malonic acid, succinic acid, malic acid, tartaric acid, ortho-phthalic acid, diglycolic acid and thioglycol. Acids, thiodiglycolic acid, glycine, methylglycine, dimethylglycine, anthranilic acid, picolinic acid, quinolinic acid or mixtures thereof are included, but are not limited to.

According to the invention of claim 7, the pH adjusting agent is limited to one containing at least one of ammonium salt, ammonia, nitric acid and boric acid.

Examples of ammonium salts include, but are not limited to, tetramethylammonium hydroxide, trimethylammonium hydroxide, choline, ammonium carbonate, and mixtures thereof.

According to the invention of claim 8, the metal material is silver nitrate,
Tartaric acid as reducing agent, ethylenediamine as complexing agent, pH
The modifier is limited to tetramethylammonium hydroxide.

The invention of claim 9 limits the metal material of claim 1 to one containing two or more kinds of metal ions.

Examples of metal ions to be combined include, but are not limited to, nickel ions and cobalt ions, nickel ions and tungsten ions, cobalt ions and tungsten ions, and the like. Tungsten ions are supplied from, for example, ammonium tungstate.

The invention of claim 10 is based on the structure of claim 1.
A pH buffer that does not contain a metal in the chemical formula that suppresses the pH decrease of the plating solution, a promoter that does not contain a metal in the chemical formula that suppresses a decrease in the plating rate, and a metal formula does not contain a metal in the chemical formula that prevents decomposition of the plating solution. The composition further includes at least one of a stabilizer and a surfactant containing no metal in the chemical formula for making the quality of the plated film dense.

The pH buffering agent may be a monocarboxylic acid, a dicarboxylic acid, an oxycarboxylic acid, an inorganic acid or a mixture thereof, and the promoter may be a dicarboxylic acid, an oxycarboxylic acid or a mixture thereof. It is not limited to these.

Examples of monocarboxylic acids include formic acid, acetic acid, propionic acid, butyric acid, valeric acid, acrylic acid, trimethylacetic acid, benzoic acid, chloroacetic acid and mixtures thereof, and dicarboxylic acids include oxalic acid and succinic acid. , Malonic acid, maleic acid, itaconic acid, paraphthalic acid or a mixture thereof, and the oxycarboxylic acid includes glycolic acid, lactic acid, salicylic acid, tartaric acid, citric acid or a mixture thereof, and the inorganic acid, Boric acid,
Examples include, but are not limited to, carbonic acid, sulfurous acid or mixtures thereof.

Stabilizers include, but are not limited to, sulfur compounds, nitrogen compounds, iodides or compounds thereof.

The sulfur compound may be thiourea, thiosulfate, diethyldithiocarbamate, rhodanine or a mixture thereof, and the nitrogen compound may be 2,2'-.
Dipyridyl, orthophenanthroline, 2,2'-biquinoline or a mixture thereof may be mentioned.
Examples include, but are not limited to, 3-iodotyrosine, 3,5-diiodotyrosine, or mixtures thereof.

Examples of the surface active agent include, but are not limited to, nonionic fluorine-based surface active agents.

According to the eleventh aspect of the present invention, there is provided a method for forming a wiring in a semiconductor device, comprising a first step of forming a recess in a contact region or a wiring region in a resist pattern or an insulating film formed on a semiconductor substrate. And a metal material containing a metal ion, a reducing agent for the metal ion containing no metal in the chemical formula, a complexing agent for the metal ion containing no metal in the chemical formula, and a pH adjusting agent containing no metal in the chemical formula And a second step of forming a buried metal layer in the recess by an electroless plating bath having

According to a twelfth aspect of the present invention, in the structure of the eleventh aspect, a resistor for reducing the contact resistance of the buried metal layer is formed at the bottom of the recess between the first step and the second step. The configuration further includes an intermediate layer forming step of sequentially forming a reduction layer, a barrier layer for preventing the reaction of the embedded metal layer, and a catalyst layer for promoting the reaction of the metal ions. The catalyst layer and the barrier layer may be the same layer. In this case, since the catalyst layer and the barrier layer can be used in common, the manufacturing process can be shortened. When the catalyst layer and the barrier layer are formed of the same layer, a palladium layer, a TiN layer containing palladium, Ti
An N layer, a W layer, a mixed layer thereof, or the like can be used, but is not limited thereto.

The thirteenth aspect of the invention limits the catalyst layer of the twelfth aspect to a Pd layer or a Ti layer.

The invention of claim 14 limits the barrier layer of claim 12 to a TiN layer, a TiW layer or a W layer.

The invention of claim 15 limits the resistance reducing layer of claim 12 to a Ti layer.

The invention of claim 16 is the invention of claim 11 or 12.
In the structure of, the intermediate layer forming step, the step of sequentially forming the resistance reducing layer, the barrier layer and the catalyst layer inside the recess and on the resist pattern or insulating film, and the resist pattern or insulating film Removing the resistance reducing layer, the barrier layer and the catalyst layer above by a chemical mechanical polishing method to form the resistance reducing layer, the barrier layer and the catalyst layer only on the bottom of the recess. The step (2) adds a configuration including a step of selectively forming the embedded metal layer on the catalyst layer formed only on the bottom of the recess.

The invention of claim 17 is the invention of claim 11 or 12.
In the above configuration, the second step includes a step of forming a metal layer entirely inside the recess and on the resist pattern or insulating film by the electroless plating bath, and on the resist pattern or insulating film. The step of forming the embedded metal layer in the recess by removing the metal layer of 2 is added.

In the eighteenth aspect of the invention, the second step is
A step of forming a metal layer entirely on the inside of the recess and on the insulating film by the electroless plating bath, and removing the metal layer on the insulating film by a chemical mechanical polishing method, And a step of forming the embedded metal layer whose surface is flush with the surface of the insulating film.

The invention of claim 19 is the invention of claim 11 or 12.
In the above configuration, prior to the first step, a lower-layer insulating film forming step of forming a lower-layer insulating film having a buried plug on the semiconductor substrate is further provided, and the first step includes
Forming the insulating film on the lower insulating film; forming a wiring region forming resist pattern having an opening at a portion corresponding to the embedded plug on the insulating film; The configuration including the step of forming the concave portion to be a wiring region in the insulating film by etching the insulating film using the forming resist pattern as a mask.

The invention of claim 20 is the invention of claim 11 or 12.
In the above configuration, prior to the first step, a lower-layer insulating film forming step of forming a lower-layer insulating film having a buried plug on the semiconductor substrate is further provided, and the first step includes
A configuration including a step of forming the resist pattern having the opening serving as the recess at a portion corresponding to the embedded plug is formed on the lower insulating film.

According to a twenty-first aspect of the invention, the metal ions of the electroless plating baths of the eleventh to twelfth aspects are replaced by silver ions, copper ions,
It is limited to gold ion, nickel ion, cobalt ion or palladium ion.

According to a twenty-second aspect of the invention, the metal ions of the electroless plating baths of the eleventh to twentieth aspects are replaced by silver ions, copper ions,
Limited to gold ions or palladium ions, the reducing agent of the electroless plating bath, tartaric acid, tartrate salts containing no metal in the chemical formula, monosaccharides, disaccharides, polysaccharides, hydrazine, hydrazine derivatives, aldehydes and polyhydric alcohols It is limited to those containing at least one of them.

The invention of claim 23 limits the metal ions of the electroless plating bath of claims 11 to 20 to nickel ions or cobalt ions, and the reducing agent of the electroless plating bath is hypophosphorous acid, in the chemical formula It is limited to those containing at least one of a metal-free hypophosphite, a metal-free borohydride compound in the chemical formula, hydrazine and a hydrazine derivative.

The invention of claim 24 limits the metal ions of the electroless plating bath of claims 11 to 20 to silver ions or copper ions, and the complexing agent of the electroless plating bath is ethylenediamine, ethylenediamine derivative, ammonia. And at least one of triethanolamine.

The invention of claim 25 limits the metal ions of the electroless plating bath of claims 11 to 20 to gold ions, nickel ions, cobalt ions or palladium ions,
The complexing agent of the electroless plating bath is limited to a compound containing a carboxylic acid group.

The invention of claim 26 limits the pH adjuster of the electroless plating bath of claims 11 to 20 to at least one of ammonium salt, ammonia, nitric acid and boric acid. It is a thing.

According to a twenty-seventh aspect of the invention, the metal material of the electroless plating bath according to the eleventh to twentieth aspects is silver nitrate, the reducing agent is tartaric acid, the complexing agent is ethylenediamine, and the pH adjusting agent is tetramethylammonium hydroxide. Each is limited.

The invention of claim 28 limits the metal material of the electroless plating bath of claims 11 to 20 to one containing two or more kinds of metal ions.

According to a twenty-ninth aspect of the invention, in the electroless plating bath of the eleventh to twentieth aspects, a pH buffer containing no metal in the chemical formula for suppressing the pH decrease of the plating solution, and a chemical formula for suppressing the decrease of the plating rate At least one of a metal-free accelerator, a stabilizer that does not contain a metal in the chemical formula that prevents decomposition of the plating solution, and a surfactant that does not contain a metal in the chemical formula that makes the film quality of the plating film dense. Is added.

[0053]

According to the constitution of claim 1, a reducing agent, a complexing agent and p
Since none of the H modifiers contains a metal in the chemical formula, almost no metal impurities are contained in the electroless plating bath.

The metal ions contained in the metal material according to the second aspect of the invention are excellently deposited as a metal by electroless plating.

The metal ions contained in the metal material according to the third aspect of the invention have a high redox potential and are easily deposited in the plating solution. In addition, silver ion in the constitution of claim 3,
Copper ion, gold ion or palladium ion reducing agent,
It has a high redox potential and contains no metal in the chemical formula.

The metal ion contained in the metal material according to the fourth aspect of the invention has a lower redox potential than silver ion, copper ion, gold ion, palladium ion and the like. On the other hand, the reducing agent of claim 4 also has a relatively low redox potential.

The complexing agent in the structure of claim 5 forms a silver ion or copper ion complex on the alkaline side.

The compound containing a carboxylic acid group as the complexing agent in the structure of claim 6 is a gold ion, a nickel ion,
Forms a complex with cobalt and palladium ions.

The pH adjusting agent according to the seventh aspect of the invention has a function equal to or higher than that of KOH and NaOH which have been conventionally used, and is water-soluble, and does not contain a metal in the chemical formula. Further, nitric acid and boric acid have a pH reducing action.

According to the structure of claim 8, silver nitrate, tartaric acid,
The electroless silver plating bath containing ethylenediamine and tetramethylammonium hydroxide contains no metal impurities, and the quality of the silver plating film formed, the adhesion of the silver plating film to the semiconductor substrate, and the contact on the semiconductor substrate. It is particularly good in terms of embedding a silver plating film in a hole or a wiring groove.

According to the structure of claim 9, an alloy plating film made of two or more kinds of metals can be formed, and the hardness of the alloy plating film is improved, which is preferable.

According to the eleventh aspect, similar to the first aspect, the electroless plating bath contains almost no metal impurities.

According to the twelfth aspect, since the resistance reducing layer is formed at the bottom of the recess, the contact resistance between the embedded metal layer and the semiconductor substrate is reduced. Further, since the barrier layer is formed on the resistance reducing layer, the metal forming the embedded metal layer does not diffuse into the element such as the transistor formed on the semiconductor substrate. Further, since the catalyst layer is formed on the barrier layer, the buried metal layer is well deposited even when the buried metal layer and the underlying layer are made of different materials.

According to the thirteenth aspect, since the Pd layer and the Ti layer are usually formed by vapor deposition or sputtering and are dense, the plating film deposited thereon is also dense. Also,
The Pd layer and the Ti layer are formed by heat treatment after forming the plating film.
Voids (voids) in the plated film and poor adhesion to the semiconductor substrate do not occur.

According to the structure of claim 16, the resistance reducing layer, the barrier layer and the catalyst layer on the resist pattern or the insulating film are removed by the chemical mechanical polishing method, and the resistance reducing layer, the barrier layer and the catalyst are formed only on the bottom of the recess. Since the layer remains, the buried metal layer can be selectively formed only on the bottom of the recess. In this case, the resistance reducing layer, the barrier layer and the catalyst layer are made of metal, but can be easily and surely removed because they are removed by the chemical mechanical polishing method.

According to the structure of claim 17, when a metal layer is formed entirely inside the recess and on the resist pattern or the insulating film and then the metal layer on the resist pattern or the insulating film is removed, the recess is filled. A metal layer can be formed.

According to the eighteenth aspect, when the metal film formed on the insulating film is removed by the chemical mechanical polishing method, the surface of the embedded metal layer and the surface of the insulating film are flush with each other. In this case, since the metal layer is removed by the chemical mechanical polishing method,
Can be easily and surely removed.

According to the nineteenth aspect, when the insulating film is etched using the wiring region forming resist pattern, which is formed on the insulating film and has an opening at a portion corresponding to the embedded plug of the lower insulating film, as a mask. , A wiring recess is formed in a portion corresponding to the embedded plug.

According to the structure of claim 20, after forming a resist pattern formed on the lower insulating film having a buried plug and having an opening serving as a recess in a portion corresponding to the buried plug, the buried metal layer is formed in the recess. Is formed, the embedded plug and the embedded wiring layer are connected.

[0070]

【Example】

(First Embodiment) The electroless plating bath according to the first embodiment of the present invention will be described below.

An electroless silver plating bath having the following composition was prepared. The amounts of Na and K in this electroless plating bath were determined by atomic emission spectrometry (ICP) to be 2 pp each.
m and 3 ppm, which were trace amounts. It is considered that these trace amounts of impurities were mixed in during the manufacturing process of each component.

* Electroless silver plating bath according to the first embodiment of the present invention Silver nitrate (silver ion source) 8.8X10 ^-3 mol / l tartaric acid (reducing agent) 5.3X10 ^-2 mol / l ethylenediamine (complexing agent) 5.4X10 ^-2 mol / l 15 wt% tetramethylammonium hydroxide aqueous solution (pH adjuster) 3,5-diiodotyrosine (stabilizer) 8.0X10 ^-5 mol / l pH 10.0 Bath temperature 35 ° C According to the first example 0.1% deposited on the substrate by the plating bath.
When the amount of Na and the amount of K in the 5 μm-thickness silver-plated film were measured, they were 0.2 ppm and 0.2 ppm, respectively. These values are far below the permissible values of the metal impurities contained in the wiring metal of the semiconductor device, and it has been confirmed that the silver film deposited using this plating bath can be used for the metal wiring of the semiconductor device.

FIG. 1 shows the results of measuring the redox potentials (N.H.E.) of silver nitrate + ethylenediamine and tartaric acid in the plating bath according to the first embodiment. As shown in FIG. 1, the potential difference in the vicinity of pH 9.8 at which the silver film is deposited is about 0.18 V, and each of the combination of the reducing agent and the complexing agent, the reducing agent and the complexing agent in the first example. It has been confirmed that the concentration and pH values are suitable for depositing a silver film on the substrate at an appropriate speed without depositing silver in the plating solution. Further, the tetramethylammonium hydroxide aqueous solution had no problem in adjusting the pH to around 9.8. Due to the effect of the stabilizer 3,5-diiodotyrosine, the pH of this plating bath remained almost unchanged even after about 8 hours from the start of plating, and the plating bath was decomposed due to the precipitation of silver oxide. There was no

(First Wiring Forming Method) The first wiring forming method of the semiconductor device using the plating bath according to the first embodiment will be described below with reference to FIGS.

First, as shown in FIG. 2A, a semiconductor substrate 11 on which semiconductor elements (not shown) are formed.
After depositing the insulating film 12 to a thickness of 0.7 μm on the
A contact hole (a region to be connected to the element) 13 and a wiring groove 14 are formed by a lithography / etching technique. Then, a Ti film 15 (25 nm) as a resistance reducing layer between the semiconductor substrate and the silver film, a TiN film 16 (100 nm) as a barrier layer, and a palladium film 17 (100 nm) as a catalyst layer for silver plating are sputtered. Deposited by the method.

Next, the semiconductor substrate 11 is immersed in the plating bath according to the first embodiment for 5 hours and then washed with water, as shown in FIG.
As shown in, the silver film 18 is formed. In this case, the thickness of the silver film 18 formed by the plating bath is about 0.22 μm. FIG. 3 shows the relationship between the plating time, the film thickness of the silver film, and the pH of the plating bath in the plating bath according to the first example. As is clear from FIG. 3, the pH remains almost unchanged (decrease of 0.06) until about 8 hours have passed, and the thickness of the silver film is saturated at 0.22 μm (5 hours). Therefore, a new plating bath having the same composition as described above is newly prepared, and the semiconductor substrate 1
The operation of immersing 1 for 2 hours is further repeated 4 times to completely fill the contact hole 13 and the wiring groove 14 with silver, so that as shown in FIG.
Are covered with a silver film 18.

Next, the silver film 18, the palladium film 17, the TiN film 16 and the Ti film 15 on the insulating film 12 are removed by chemical mechanical polishing (CMP), and the contact hole 13 is removed.
Also, by making the surface of the silver film 18 and the surface of the insulating film 12 embedded in the wiring groove 14 substantially flush with each other, as shown in FIG. 2C, the embedded wiring 19 made of a silver film is formed.
To form.

Since the embedded wiring 19 contained metal impurities such as Na and K in an amount less than the allowable value,
The characteristics of the semiconductor device were not adversely affected. Further, in the embedded wiring 19, due to the plating bath according to the first embodiment and the characteristics of the palladium film 17 as the catalyst layer, the denseness, the adhesion with the semiconductor substrate 11, the contact hole 13 and the wiring are formed. The groove 14 has improved burying characteristics, reduced contact resistance, and 400 to 500 ° C. for the semiconductor substrate 11 performed after the plating step in order to recover damage caused by etching to the semiconductor element performed up to the plating step. Even when the heating (annealing) was performed, no voids (voids) were generated in the embedded wiring 19 or a poor adhesion between the embedded wiring 19 and the semiconductor substrate 11 did not occur.

The heating of the semiconductor substrate 11 may be performed before the chemical mechanical polishing of the silver film 18 or the like.

Before the plating process, the surface of the palladium film 17 is subjected to BHF (hydrofluoric acid: ammonium fluoride = 1: 1).
The surface of the palladium film 17 may be cleaned by immersing in the solution of 20) and washing with water.

The concentration, pH, temperature, etc. of each component of the plating bath according to the first embodiment are not limited to those described above, silver is not deposited in the plating bath, and the plating bath may not be deposited on the semiconductor substrate. It is sufficient that the plating bath is stable until the silver film deposition reaction is completed. As a result of earnest study by the present inventors,
Tartaric acid and ethylenediamine are preferably about 3 to 10 times the molar concentration of silver nitrate, and 3,5-diiodotyrosine is preferably 1/300 to 1/30 of the molar concentration, and the pH is 9 to 12 It was found that the temperature and the temperature are preferably 20 to 50 ° C., respectively, but the present invention is not limited to these.

Further, in the above-described first wiring forming method, tungsten or the like may be embedded only in the contact hole 13 by CVD, and the silver film 18 may be embedded only in the wiring groove 14.

(Second Wiring Forming Method) A second wiring forming method of the semiconductor device using the plating bath according to the first embodiment will be described below with reference to FIGS. 4 (a) to 4 (c).

First, as shown in FIG. 4A, a semiconductor substrate 21 on which semiconductor elements (not shown) are formed.
After depositing an insulating film 22 with a thickness of 0.7 μm on the
A contact hole (a region to be connected to the element) 23 and a wiring groove 24 are formed by a lithography / etching technique. Then, a Ti film 25 (25 nm) as a resistance reduction layer between the semiconductor substrate and the silver film, a TiN film 26 (100 nm) as a barrier layer, and a palladium film 27 (100 nm) as a catalyst layer for silver plating are sputtered. Deposited by.

Next, as shown in FIG. 4B, the palladium film 27, the TiN film 26 and the Ti film 25 on the insulating film 22 are removed by chemical mechanical polishing (CMP).

Next, the semiconductor substrate 21 is immersed in the plating bath according to the first embodiment for 2 hours and then washed with water. After that, a plating bath having the same composition as described above is newly formed, and the operation of immersing the semiconductor substrate 21 for 2 hours is performed once more to completely embed silver in the contact hole 23 and the wiring groove 24. This process is repeated once more to completely bury silver only in the contact hole 23 and the wiring groove 24, thereby forming a buried wiring 28 made of a silver film as shown in FIG. 4C. In this case, since the silver plating grows only on the portion where the palladium film 27 that is the catalyst layer exists, the contact hole 23 and the wiring groove 24 are formed.
Can be embedded selectively.

Since the embedded wiring 29 contained metal impurities such as Na and K in an amount less than the allowable value,
The characteristics of the semiconductor device were not adversely affected. Also in this embedded wiring 28, due to the plating bath according to the first embodiment and the characteristics of the palladium film 27 which is the catalyst layer, the denseness, the adhesion with the semiconductor substrate 21, the contact hole 23 and the wiring The burying characteristics in the groove 24 are improved, the contact resistance is reduced, and 400 to 500 ° C. with respect to the semiconductor substrate 21 performed after the plating step in order to recover damage caused by etching to the semiconductor element performed up to the plating step. Even when the heating (annealing) was performed, no voids (voids) were generated in the embedded wiring 28, or a poor adhesion between the embedded wiring 28 and the semiconductor substrate 21 did not occur.

Before the plating process, the surface of the palladium film 27 is covered with BHF (hydrofluoric acid: ammonium fluoride = 1: 2).
The surface of the palladium film 27 may be cleaned by immersing in the solution of 0) and washing with water.

In the second wiring forming method described above, tungsten or the like may be embedded only in the contact hole 23 by CVD, and the embedded wiring 29 may be formed only in the wiring groove 24.

(Third Wiring Forming Method) Hereinafter, a third wiring forming method of the semiconductor device using the plating bath according to the first embodiment will be described with reference to FIGS.

First, as shown in FIG. 5A, a semiconductor substrate 31 on which semiconductor elements (not shown) are formed.
After depositing a first insulating film 32 on the above, a contact hole is formed by subjecting the first insulating film 32 to a lithographic etching technique. Then, a Ti film and a TiN film are deposited by sputtering, and then tungsten is deposited by CVD to form a tungsten plug 33 in the contact hole. Then, after depositing the second insulating film 34, a resist pattern 35 having an opening 35a in the wiring region is formed on the second insulating film 34 by a lithographic technique.

Next, using the resist pattern 35 as a mask, the second insulating film 34 is etched to form wiring grooves 36 in the second insulating film 34, as shown in FIG. 5B. To do. Then, a Ti film 37 (25 nm) as a resistance reducing layer between the semiconductor element and the silver film, a TiN film 38 (100 nm) as a barrier layer, and a palladium film 39 (100 nm) as a catalyst layer for silver plating are collimated respectively. -Deposit by sputtering.

Next, the resist pattern 35 is removed with a cleaning liquid. By doing so, the resist pattern 35
The upper Ti film 37, the TiN film 38, and the palladium film 39 are lifted off, and as shown in FIG.
7, the TiN film 38 and the palladium film 39 are grooves 3 for wiring.
It remains only inside 6.

Next, the semiconductor substrate 31 is immersed in the plating bath according to the first embodiment for 2 hours and then washed with water. After that, a plating bath having the same composition as the above is newly formed, and the operation of immersing the semiconductor substrate 31 for 2 hours is further performed twice,
By completely embedding silver in the wiring groove 36, as shown in FIG.
As shown in (e), the embedded wiring 40 made of a silver film is formed. In this case, since the silver plating grows only on the portion where the palladium film 39 that is the catalyst layer exists, selective embedding in the wiring groove 36 can be realized.

Since the embedded wiring 40 contained metal impurities such as Na and K in an amount less than the allowable value,
The characteristics of the semiconductor device were not adversely affected. Also in this embedded wiring 40, due to the plating bath according to the first embodiment and the characteristics of the palladium film 39 which is the catalyst layer, the denseness, the adhesion with the semiconductor substrate 31, and the wiring groove 36 are formed. The embedding characteristics have improved,
The contact resistance is reduced, and the semiconductor substrate 31 is formed after the plating step in order to recover the damage caused by the etching on the semiconductor element performed up to the plating step.
Even when heating (annealing) at 400 to 500 ° C. was performed, neither voids (voids) were formed in the embedded wiring 40 nor poor adhesion between the embedded wiring 40 and the semiconductor substrate 31 occurred.

Before the plating process, the surface of the palladium film 39 is covered with BHF (hydrofluoric acid: ammonium fluoride = 1: 2).
The surface of the palladium film 39 may be cleaned by immersing in the solution of 0) and washing with water.

(Fourth Wiring Forming Method) A fourth wiring forming method for a semiconductor device using the plating bath according to the first embodiment will be described below with reference to FIGS. 6 (a) to 6 (d).

First, as shown in FIG. 6A, a semiconductor substrate 41 on which semiconductor elements (not shown) are formed.
After depositing a first insulating film 42 on the above, a contact hole is formed by subjecting the first insulating film 42 to a lithographic etching technique. Then, a Ti film and a TiN film are deposited by sputtering, and then tungsten is deposited by CVD to form a tungsten plug 43 in the contact hole. Then, a resist pattern 44 having an opening 44a in the wiring region is formed on the first insulating film 42 by a lithographic technique.

Next, as shown in FIG. 6B, a Ti film 45 (25n) as a resistance reducing layer between the semiconductor substrate and the silver film is formed.
m), a TiN film 46 (100 nm) as a barrier layer,
Palladium film 47 (1 as a catalyst layer for silver plating)
00 nm) is deposited by collimator sputtering.

Next, the palladium film 47, the TiN film 46 and the Ti film 45 on the resist pattern 44 are removed by chemical mechanical polishing (CMP), and then the semiconductor substrate 41.
Is immersed in the plating bath according to the first embodiment for 2 hours and then washed with water. After that, a plating bath having the same composition as that described above is newly formed, and the operation of immersing the semiconductor substrate 41 for 2 hours is further performed twice, and the opening 44 of the resist pattern 44 is formed.
The metal wiring 40 is selectively formed on a (see FIG. 6C). In this case, since the silver plating grows only on the portion where the palladium film 47 that is the catalyst layer exists, the metal wiring 40 can be selectively formed only on the wiring region.

Next, the resist pattern 44 is removed by a cleaning liquid to leave the metal wiring 40 as shown in FIG. 6C, and then, as shown in FIG. 6D, an interlayer insulating film is formed. The second insulating film 48 is deposited on the entire surface.

In the first to fourth wiring forming methods, the same good wiring can be formed by using the electroless plating bath according to the second embodiment described below.

(Second Embodiment) The electroless plating bath according to the second embodiment of the present invention will be described below.

* Electroless copper plating bath according to the second embodiment of the present invention Copper sulfate (copper ion source) 6.0X10 ^-2 mol / l formaldehyde (reducing agent) 4.0X10 ^-1 mol / l ethylenediaminetetraacetic acid (complex Agent) 3.0X10 ^-1 mol / l 15wt% Tetramethylammonium hydroxide aqueous solution (pH adjuster) 8-Hydroxy-7-iodo-5-quinolinesulfonic acid (stabilizer) 2.0X10-4mol / l pH 12.8 Bath temperature 75 ° C. Copper deposition rate 3 μm / hour (Third Example) Hereinafter, an electroless plating bath according to a third example of the present invention will be described.

An electroless nickel plating bath having the following composition was prepared. When the amount of Na and the amount of K in this electroless plating bath were determined by atomic emission spectrometry (ICP), they were 4 ppm and 3 ppm, respectively, showing very small values. It is considered that these trace amounts of impurities were mixed in during the manufacturing process of each component.

* Electroless nickel plating bath according to the third embodiment of the present invention Nickel sulfate (nickel ion source) 8.0X10 ^-2 mol / l hypophosphorous acid (reducing agent) 2.3X10 ^-1 mol / l lactic acid ( Complexing agent) 3.0X10 ^-1 mol / l Propionic acid (pH buffering agent) 3.0X10 ^-2 mol / l 15% tetramethylammonium hydroxide aqueous solution (pH adjusting agent) Thiourea (stabilizing agent) 5.0X10 ^-6 mol / l pH 4.5 Bath temperature 90 ° C. 0.1% deposited on the substrate by the plating bath according to the third embodiment.
When the amount of Na and the amount of K in the nickel plating film having a thickness of 3 μm were measured, they were 0.2 ppm and 0.2 ppm, respectively. These values are far below the permissible values of the metal impurities contained in the wiring metal of the semiconductor device, and it has been confirmed that the nickel film deposited using this plating bath can be used for the wiring of the semiconductor device.

(Fifth Wiring Forming Method) Hereinafter, a fifth wiring forming method of a semiconductor device using the plating bath according to the third embodiment will be described with reference to FIGS.

First, as shown in FIG. 7A, a semiconductor substrate 51 on which semiconductor elements (not shown) are formed.
After depositing an insulating film 52 on the above, a contact hole is formed by subjecting the insulating film 52 to a lithographic etching technique. Then, a Ti film 53 (25 nm) as a resistance reducing layer between the semiconductor substrate and the nickel film, a TiN film 54 (100 nm) as a barrier layer, and a palladium film 55 (10 as a catalyst layer for nickel plating).
0 nm) is deposited over the entire surface by the sputtering method.

Next, as shown in FIG. 7B, the palladium film 55, the TiN film 54 and the Ti film 53 on the insulating film 52 are removed by chemical mechanical polishing (CMP).

Next, the semiconductor substrate 51 is immersed in the plating bath according to the third embodiment for 1 hour, washed with water, and the contact holes are completely filled with nickel, as shown in FIG. 7 (c). Then, a buried plug 56 made of a nickel film is formed. In this case, the nickel plating grows only in the portion where the palladium film 55, which is the catalyst layer, exists, so that selective embedding in the contact hole can be realized.

Next, after sequentially depositing a first metal layer made of a Ti film to be a resistance reducing layer and a TiN film to be a barrier layer, and a second metal film to be an aluminum wiring layer, these first and second The metal wiring 57 made of aluminum is formed on the embedded plug 56 by subjecting the second metal film to the photolithography / etching technique.

Since the buried plugs 56 contained metal impurities such as Na and K in amounts less than their permissible values, the characteristics of the semiconductor element were not adversely affected. Further, in this embedded plug 56, the plating bath according to the third embodiment and the palladium film 55 as the catalyst layer are used.
According to the characteristics described above, the denseness, the adhesion with the semiconductor substrate 51, and the burying characteristics in the contact hole are improved, the contact resistance is reduced, and the semiconductor element, which has been subjected to the plating process, is not damaged by etching. Heating (annealing) to the semiconductor substrate 51 at 400 to 500 ° C. after the plating step for recovery
Even if the step is performed, holes (voids) are formed in the embedded plug 56.
Did not occur, or the poor adhesion between the embedded plug 56 and the semiconductor substrate 51 did not occur.

Before the plating process, the surface of the palladium film 55 is covered with BHF (hydrofluoric acid: ammonium fluoride = 1: 2).
The surface of the palladium film 55 may be cleaned by immersing in the solution of 0) and washing with water.

The concentration, pH, temperature, etc. of each component of the plating bath according to the third embodiment are not limited to those described above, nickel is not deposited in the plating bath, and it is possible to transfer the nickel from the plating bath to the semiconductor substrate. It is sufficient that the plating bath is stable until the silver film deposition reaction is completed. As a result of diligent studies by the present inventors, hypophosphorous acid and lactic acid are about 2 to 10 times the molar concentration of nickel sulfate, and thiourea is 5 times the molar concentration.
A molar concentration of 1/0000 to 1 / 10,000 is preferable, pH is about 3.5 to 6 and temperature is 80 ° C to 10 ° C.
It has been found that about 0 ° C. is preferable, but the present invention is not limited thereto.

Further, the plating baths according to the first or second embodiment are used in the first to fourth wiring forming methods, and the plating bath according to the third embodiment is used in the fifth wiring forming method. However, the present invention is not limited to these.

Further, in the first to fifth wiring forming methods, since the embedded wiring or the embedded plug and the material of the underlying layer are different, the resistance reducing layer, the barrier layer and the catalyst layer are provided. Alternatively, when the embedded plug and the material of the underlying layer are the same, the resistance reducing layer, the barrier layer and the catalyst layer may not be provided.

[0117]

According to the electroless plating bath of the invention of claim 1, since the electroless plating bath contains almost no metal impurities, the amount of metal impurities in the metal layer formed by the electroless plating bath is small. Can be made equal to or less than the allowable value, so that the metal layer can be formed by the electroless plating bath without deteriorating the characteristics of the semiconductor device.

According to the electroless plating bath of the second aspect of the present invention, the metal ions contained in the metal material are favorably deposited as a metal by electroless plating, and therefore can be used as a metal wiring or a plug of a semiconductor device. it can. In particular,
Silver, copper, and gold are particularly suitable as a wiring metal because they have a lower specific resistance than aluminum which has been conventionally used as a wiring metal.

According to the electroless plating bath of the third aspect of the present invention, the metal ions contained in the metal material are easily deposited in the plating solution, so that the metal layer can be formed well, which is particularly preferable. . Further, a reducing agent of a silver ion, a copper ion, a gold ion or a palladium ion, which does not include a metal in the chemical formula, has a high redox potential and is suitable because it suppresses the precipitation of the metal ion appropriately.

According to the electroless plating bath of the invention of claim 4, the metal ion contained in the metal material has a lower redox potential than silver ion, copper ion, gold ion, palladium ion, etc. Since the redox potential is relatively low, the plating layer made of the metal ions can be efficiently deposited, and the reducing agent does not contain a metal in its chemical formula.

According to the electroless plating bath of the fifth aspect of the present invention, the complexing agent forms a complex of silver ions or copper ions on the alkaline side and promotes the deposition of metal in the alkaline plating bath, which is preferable.

According to the electroless plating bath of the invention of claim 6, the compound containing a carboxylic acid group forms a complex with gold ion, nickel ion, cobalt ion, and palladium ion, which is preferable.

According to the electroless plating bath of the seventh aspect of the present invention, the pH adjuster has a function equal to or higher than that of KOH or NaOH, is water-soluble, and contains no metal, which is preferable. Since nitric acid and boric acid have a pH reducing action, they are suitable for obtaining an electroless plating bath having a low pH.

According to the electroless plating bath of the invention of claim 8, no metal impurities are contained, the quality of the silver plating film to be formed, the adhesion of the silver plating film to the semiconductor substrate, and the semiconductor substrate. Since it is particularly good in embedding the silver plating film in the contact hole or the wiring groove, it is the most electroless plating bath for forming a metal layer made of the silver plating film on a semiconductor substrate. preferable. Further, ethylenediamine is preferable because it is easy to handle, and tetramethylammonium hydroxide is preferable because it has little odor.

According to the electroless plating bath of the invention of claim 9, an alloy plating film made of two or more kinds of metals can be formed, and the hardness of the alloy plating film is higher than that of a metal layer made of a single metal. Therefore, it is preferable.

According to the electroless plating bath of the tenth aspect of the invention, the effects possessed by the pH buffer, the accelerator, the stabilizer and the surfactant can be obtained respectively.

According to the semiconductor device manufacturing method of the eleventh aspect of the present invention, like the first aspect of the invention, it is possible to form the metal layer by the electroless plating bath without deteriorating the characteristics of the semiconductor device. Become.

According to the semiconductor device manufacturing method of the twelfth aspect of the present invention, the contact resistance between the embedded metal layer and the semiconductor substrate is reduced, and the metal forming the embedded metal layer is formed on the semiconductor substrate. Even if the embedded metal layer and the underlying layer are made of different materials without being diffused into the element, the embedded metal layer is well deposited.

According to the semiconductor device manufacturing method of the thirteenth aspect of the present invention, the plating film deposited on the Pd layer or the Ti layer becomes dense, and the plating film is formed during the heat treatment after the formation of the plating film. It is preferable because it does not cause voids (voids) in the inside and poor adhesion to the semiconductor substrate.

According to the semiconductor device manufacturing method of the sixteenth aspect of the present invention, since the buried metal layer can be selectively formed only on the bottom of the recess, the metal layer on the resist pattern or the insulating film is removed. Since the process is unnecessary,
The embedded metal layer can be formed efficiently.

According to the semiconductor device manufacturing method of the seventeenth aspect of the present invention, after the metal layer is entirely formed inside the recess and on the resist pattern or the insulating film, the metal layer is formed on the resist pattern or the insulating film. By removing the, the embedded metal layer can be reliably formed in the recess.

According to the semiconductor device manufacturing method of the eighteenth aspect of the invention, since the metal film formed on the insulating film is removed by the chemical mechanical polishing method, the metal film that cannot be removed by etching can also be removed. .

According to the method for manufacturing a semiconductor device in accordance with the nineteenth aspect of the present invention, the insulating film is etched by using the wiring region forming resist pattern having an opening at a portion corresponding to the embedded plug of the lower insulating film as a mask. Therefore, a recess for wiring can be formed in a portion corresponding to the embedded plug, and when the embedded metal layer is formed in the recess, the embedded wiring layer connected to the embedded plug can be reliably formed.

According to the method of manufacturing a semiconductor device in accordance with the twentieth aspect of the present invention, after forming a resist pattern having an opening serving as a recess at a portion corresponding to a buried plug, a buried metal layer is formed in the recess. The embedded wiring layer connected to the embedded plug can be reliably formed.

[Brief description of drawings]

FIG. 1 is a diagram showing oxidation-reduction potentials (NHE) of silver nitrate + ethylenediamine and tartaric acid in an electroless plating bath according to a first example of the present invention.

FIG. 2 is a cross-sectional view showing each step of a first wiring forming method of a semiconductor device using the electroless plating bath according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a relationship between a plating time, a film thickness of a silver film, and a pH of a plating bath when plating is performed by the electroless plating bath according to the first embodiment of the present invention.

FIG. 4 is a cross-sectional view showing each step of a second wiring forming method of a semiconductor device using the electroless plating bath according to the first embodiment of the present invention.

FIG. 5 is a cross-sectional view showing each step of a third wiring forming method for a semiconductor device using the electroless plating bath according to the first embodiment of the present invention.

FIG. 6 is a cross-sectional view showing each step of a fourth wiring forming method of a semiconductor device using the electroless plating bath according to the first example of the present invention.

FIG. 7 is a cross-sectional view showing each step of a fifth wiring forming method of a semiconductor device using an electroless plating bath according to a third embodiment of the invention.

[Explanation of symbols]

 11 Semiconductor Substrate 12 Insulating Film 13 Contact Hole 14 Wiring Groove 15 Ti Film 16 TiN Film 17 Palladium Film 18 Silver Film 19 Embedded Wiring 21 Semiconductor Substrate 22 Insulating Film 23 Contact Hole 24 Wiring Groove 25 Ti Film 26 TiN Film 27 Palladium film 28 Embedded wiring layer 31 Semiconductor substrate 32 First insulating film 33 Tungsten plug 34 Second insulating film 35 Resist pattern 35a Opening 36 Wiring groove 37 Ti film 38 TiN film 39 Palladium film 40 Embedded wiring 41 Semiconductor substrate 42 First Insulating Film 43 Tungsten Plug 44 Resist Pattern 44a Opening 45 Ti Film 46 TiN Film 47 Palladium Film 48 Second Insulating Film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Reference number within the agency FI Technical indication C23C 18/40 18/44 H01L 21/28 301 R (72) Inventor Shin Hashimoto Ichiyuki Takatsuki, Osaka Prefecture No. 1 in town Matsushita Electronics Industrial Co., Ltd.

Claims (29)

[Claims] 1. A metal material containing a metal ion, a reducing agent for the metal ion containing no metal in the chemical formula, a complexing agent for the metal ion containing no metal in the chemical formula, and a metal containing no metal in the chemical formula. An electroless plating bath used for forming wiring of a semiconductor device, which has a pH adjuster. 2. The electroless plating used for forming wiring of a semiconductor device according to claim 1, wherein the metal ions are silver ions, copper ions, gold ions, nickel ions, cobalt ions or palladium ions. bath. 3. The metal ion is a silver ion, a copper ion, a gold ion or a palladium ion, and the reducing agent is tartaric acid, a tartrate salt containing no metal in its chemical formula, a monosaccharide, a disaccharide, a polysaccharide, The electroless plating bath used for forming a wiring of a semiconductor device according to claim 1, containing at least one of hydrazine, a hydrazine derivative, an aldehyde, and a polyhydric alcohol. 4. The metal ion is nickel ion or cobalt ion, and the reducing agent is hypophosphorous acid, hypophosphite containing no metal in the chemical formula, or hydrogenation containing no metal in the chemical formula. The electroless plating bath used for forming wiring of a semiconductor device according to claim 1, containing at least one of a boron compound, hydrazine and a hydrazine derivative. 5. The metal ion is silver ion or copper ion, and the complexing agent contains at least one of ethylenediamine, ethylenediamine derivative, ammonia and triethanolamine. Claim 1
An electroless plating bath used for forming the wiring of the semiconductor device according to. 6. The semiconductor device according to claim 1, wherein the metal ions are gold ions, nickel ions, cobalt ions or palladium ions, and the complexing agent is a compound containing a carboxylic acid group. Electroless plating bath used for wiring formation. 7. The pH adjusting agent according to claim 1, wherein the pH adjusting agent contains at least one of ammonium salt, ammonia, nitric acid and boric acid. Electrolytic plating bath. 8. The metal material is silver nitrate, the reducing agent is tartaric acid, the complexing agent is ethylenediamine, and the pH adjusting agent is tetramethylammonium hydroxide. An electroless plating bath used for forming the wiring of the semiconductor device according to. 9. The electroless plating bath used for forming wiring of a semiconductor device according to claim 1, wherein the metal material contains two or more kinds of metal ions. 10. A pH buffer containing no metal in the chemical formula for suppressing the pH decrease of the plating solution, an accelerator containing no metal in the chemical formula for suppressing the decrease of the plating rate, and a chemical formula for preventing decomposition of the plating solution. 2. The semiconductor according to claim 1, further comprising at least one of a stabilizer containing no metal and a surfactant containing no metal in the chemical formula for making the film quality of the plating film dense. Electroless plating bath used to form wiring for equipment. 11. A first step of forming a recess in a contact region or a wiring region in a resist pattern or an insulating film formed on a semiconductor substrate, a metal material containing metal ions, and the metal not containing a metal in its chemical formula. Forming an embedded metal layer in the recess by an electroless plating bath having an ionic reducing agent, a complexing agent for the metal ion containing no metal in the chemical formula, and a pH adjusting agent containing no metal in the chemical formula; 2. A method for forming a wiring of a semiconductor device, which comprises the step 2). 12. A resistance reduction layer for reducing contact resistance of the buried metal layer at the bottom of the recess between the first step and the second step, and a reaction of the buried metal layer is prevented. The wiring forming method for a semiconductor device according to claim 11, further comprising an intermediate layer forming step of sequentially forming a barrier layer and a catalyst layer for promoting the reaction of the metal ions. 13. The wiring forming method for a semiconductor device according to claim 12, wherein the catalyst layer is a Pd layer or a Ti layer. 14. The method for forming a wiring of a semiconductor device according to claim 12, wherein the barrier layer is a TiN layer, a TiW layer or a W layer. 15. The wiring forming method for a semiconductor device according to claim 12, wherein the resistance reducing layer is a Ti layer. 16. The intermediate layer forming step comprises a step of sequentially forming the resistance reducing layer, a barrier layer and a catalyst layer inside the recess and on the resist pattern or insulating film,
By removing the resistance reducing layer on the resist pattern or the insulating film, the barrier layer and the catalyst layer by a chemical mechanical polishing method, the resistance reducing layer only on the bottom of the recess,
A step of forming a barrier layer and a catalyst layer, wherein the second step includes a step of selectively forming the embedded metal layer on the catalyst layer formed only on the bottom of the recess. 13. The method for forming a wiring of a semiconductor device according to claim 12, wherein the wiring is formed. 17. The second step comprises the step of forming a metal layer entirely on the inside of the recess and on the resist pattern or insulating film by the electroless plating bath, and the step of forming the resist pattern or insulating film. 13. The method for forming a wiring of a semiconductor device according to claim 11, further comprising the step of forming the embedded metal layer in the recess by removing the upper metal layer. 18. The second step is a step of forming a metal layer entirely on the inside of the recess and on the insulating film by the electroless plating bath, and chemically forming the metal layer on the insulating film. 13. The semiconductor device according to claim 11, further comprising: a step of removing by a mechanical polishing method to form the buried metal layer in the recess, the surface of which is flush with the surface of the insulating film. Wiring formation method. 19. Prior to said first step, the method further comprises a lower layer insulating film forming step of forming a lower layer insulating film having a buried plug on said semiconductor substrate, wherein said first step comprises forming said lower layer. A step of forming the insulating film on the insulating film; a step of forming a wiring region forming resist pattern having an opening at a portion corresponding to the embedded plug on the insulating film; 13. The semiconductor device according to claim 11, further comprising a step of forming the concave portion to be a wiring region in the insulating film by etching the insulating film using a resist pattern as a mask. Wiring formation method. 20. A lower layer insulating film forming step of forming a lower layer insulating film having a buried plug on the semiconductor substrate before the first step, further comprising: 13. The wiring forming method for a semiconductor device according to claim 11, further comprising the step of forming the resist pattern having an opening serving as the recess at a portion corresponding to the embedded plug on the insulating film. . 21. The metal ions of the electroless plating bath are
21. The method for forming a wiring of a semiconductor device according to claim 11, wherein the method is a silver ion, a copper ion, a gold ion, a nickel ion, a cobalt ion, or a palladium ion. 22. The metal ions of the electroless plating bath are
Silver ion, copper ion, gold ion or palladium ion, the reducing agent of the electroless plating bath, tartaric acid, tartrate salts containing no metal in the chemical formula, monosaccharides, disaccharides, polysaccharides, hydrazine, hydrazine derivatives, 21. The method for forming a wiring of a semiconductor device according to claim 11, further comprising at least one of aldehyde and polyhydric alcohol. 23. The metal ions of the electroless plating bath are
Nickel ion or cobalt ion, the reducing agent of the electroless plating bath is hypophosphorous acid, hypophosphite containing no metal in the chemical formula, borohydride compound containing no metal in the chemical formula, hydrazine and 21. The wiring forming method for a semiconductor device according to claim 11, further comprising at least one of hydrazine derivatives. 24. The metal ion of the electroless plating bath comprises:
A silver ion or a copper ion, and the complexing agent of the electroless plating bath contains at least one of ethylenediamine, an ethylenediamine derivative, ammonia and triethanolamine. 13. The wiring forming method for a semiconductor device according to claim 1. 25. The metal ions of the electroless plating bath are
The gold ion, the nickel ion, the cobalt ion or the palladium ion, and the complexing agent of the electroless plating bath is a compound containing a carboxylic acid group. Wiring forming method for semiconductor device. 26. The pH adjusting agent for the electroless plating bath,
21. The wiring forming method for a semiconductor device according to claim 11, further comprising at least one of ammonium salt, ammonia, nitric acid and boric acid. 27. The metal material of the electroless plating bath is silver nitrate, the reducing agent of the electroless plating bath is tartaric acid, the complexing agent of the electroless plating bath is ethylenediamine, and the electroless plating bath. 21. The wiring forming method for a semiconductor device according to claim 11, wherein the pH adjusting agent is tetramethylammonium hydroxide. 28. The wiring forming method for a semiconductor device according to claim 11, wherein the metal material of the electroless plating bath contains two or more kinds of metal ions. 29. The electroless plating bath contains p of a plating solution.
A pH buffer that does not contain a metal in the chemical formula that suppresses H reduction, a promoter that does not contain a metal in the chemical formula that suppresses a decrease in plating rate, a stabilizer that does not contain a metal in the chemical formula that prevents decomposition of the plating solution, And at least one of surfactants containing no metal in the chemical formula for making the film quality of the plating film denser.
21. The wiring forming method for a semiconductor device according to any one of 20.