JPH0883166A - Chaotic signal generator - Google Patents

Abstract

PURPOSE: To provide a chaos signal generator in which a primary mapping function is used and which has a long period, in a digital circuit. CONSTITUTION: An offset signal outputted from an offset counter 106 is subtracted from the output signal of a digital tent mapping means 100 by a subtractor 104. A signal after the subtraction is delayed by one clock by a delay element 102, and supplied to the input of the digital tent mapping means 100. A register 108 stores a first digital signal after the count of the offset counter 106. A comparator 110 compares a content stored in the register 108 with the output signal of the delay element 102, and supplies a coincidence signal to the offset counter 106 so as to count the offset counter when coincidence is obtained between them. In this way, an offset can be updated appropriately, and the period of the chaotic signal can be extended.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a chaotic signal generator. In particular, it relates to a chaotic signal generator that can obtain a chaotic signal with a long period even though it is configured using a digital circuit.

[0002]

2. Description of the Related Art A signal whose magnitude of a signal value that changes with time is unpredictable is called a chaotic signal, and a signal simulating these phenomena in order to elucidate or predict a catastrophic natural phenomenon that occurs in the natural world. Is useful as
It is expected to become an extremely important signal in the future.

Such an unpredictable chaotic signal is also used as a random signal in various industrial fields. For example, at the time of producing a pattern pattern to be applied to the surface of cloth, mount, etc., by adding the chaos signal to the basic pattern, the basic pattern is deformed in an unpredictable direction or in the same size. There is an advantage that a pattern free from a pattern can be easily obtained.

Such a chaotic signal is also used as a noise vector or a random vector signal used for testing computer systems.
These chaotic signals supply the random signals generated at the same time to the input of the computer.
Computer systems and other industrial equipment can be tested for their characteristics in a very short time.

Therefore, even in the future, such chaotic signals will be required in a wide range of fields.

Conventionally, one of the simplest methods for obtaining this kind of chaotic signal is to use a one-dimensional map. FIG. 27 is a graph for explaining the method based on this one-dimensional mapping. As shown in the graph of FIG. 27, the one-dimensional map used here has a function Xn + 1 =
It is 4Xn (1-Xn). In the graph of FIG. 27, the horizontal axis represents Xn and the vertical axis represents Xn + 1. And this n
Is an integer of 0 or more. That is, the initial value is X0,
In the graph of FIG. 27, an example of the change in the value when the initial value X0 is 0.1 is shown.

As shown in FIG. 27, the initial value X0
By applying the function 4Xn (1-Xn) to (= 0.1), X1 (= 0.35) is obtained. This X
If the same function is applied again to 1 (= 0.35), X2 can be obtained, but in FIG. 27, a straight line of Xn + 1 = Xn is also shown so as to be obtained graphically. . The straight line of Xn + 1 = Xn is Identity
Called y Line.

By using this Identity Line, it becomes visually easy to reapply the above function to X1 (= 0.35) described above.

That is, upward from the predetermined value Xn on the axis of Xn in FIG. 27 (that is, Xn +
Draw a line (parallel to the axis of 1) and the above function Xn + 1 = 4X
If a point intersecting with n (1-Xn) is obtained, Xn of that point
+1 coordinate corresponds to the function Xn + 1 = 4Xn (1
It is the result of applying -Xn).

Then, Xn + 1 thus obtained
As new Xn, and again the above function Xn + 1 = 4Xn
In order to apply (1-Xn), first, the intersection point (X
A line is drawn from n + 1 = 4Xn (1-Xn) above in the horizontal direction (that is, the value of Xn + 1 is kept constant), and a point intersecting with the above-mentioned Identity Line is obtained. Xn = X on this Identity Line
Since it is n + 1, the Xn coordinate of the obtained intersection is X
It becomes equal to n + 1. Therefore, the function X
(Xn in the vertical direction toward n + 1 = 4Xn (1-Xn)
By extending a line (parallel to the +1 axis), the intersection of this line and the function Xn + 1 = 4Xn (1-Xn) is obtained. Then, the Xn + 1 coordinate of this intersection becomes a point representing a new value.

Thus, the function Xn + 1 = 4Xn (1-
Xn) is iteratively applied to generate a sequence X
0, X1, X2, X3, ... Are obtained.

Now, the function Xn + 1 = 4Xn (1-Xn)
Can generally be written as Xn + 1 = aXn (1-Xn). Then, the behavior of this function has been conventionally investigated even when a value other than 4 is used as the value of a.

In FIG. 28, Xn + 1 = aXn (1-X
A graph showing the behavior of the sequence X0, X1, X2, X3, ... By this function when the parameter a of n) is changed is shown. In the graph shown in FIG. 28, the vertical axis represents the value of Xn (n = 0, 1, 2, 3, ...) And the horizontal axis represents the value of n. In this graph, a plurality of graphs when the value of the parameter a is changed are shown as X0 = 0.1, 0.5, as initial values for each parameter.
Shown for the case where 0.9 is given. For example, a
= 3.0, the values of Xn are about 0.6 and 0.7.
It will be understood that it vibrates between. Also, a = 2.
In the case of 5, the value of Xn becomes 0.
Converges to 6. When a = 1.5, 0.33
It converges to (= 1/3) and to 0 when a = 0.5.

Further, in FIG. 29, Xn in the case of a = 3.8
A graph of the value columns of is shown. As shown in FIG. 29, it appears that the values appear to be randomly appearing between approximately 0.2 and approximately 0.95.

Thus, the function Xn + 1 = aXn (1-
When the parameter a of (Xn) is changed, the sequence of Xn values converges to a constant value or continues to take a random value. FIG. 30 is a graph showing the relationship between the value of the parameter a and the possible value of Xn. The graph shown in FIG. 30 is called a cycle doubling bifurcation diagram. In this graph, the horizontal axis is the parameter a and the vertical axis is Xn.
A possible value of (n is assumed to be sufficiently large) is shown. As described above, when the parameter a is less than about 3, Xn converges to a constant value, but as a increases, the types of values that Xn can take increase. Figure 30
As shown in, when a becomes approximately 3 or more, Xn
The number of values that can be taken is two, and a is about 3.4.
If it is 5 or more, there are 4 types.

FIG. 31 shows a graph in which the parameter a of the cycle-doubled branch diagram shown in FIG. 30 is enlarged from 2.8 to 4.0. Also in this graph, the horizontal axis represents the parameter a and the vertical axis represents Xn. As shown in FIG. 31, when the parameter a exceeds approximately 3.565, the possible value of Xn further increases to eight. In addition, the parameter a of the cycle-doubled branch diagram shown in FIG.
An enlarged view between 3.54 and 3.64 is shown in FIG. As shown in FIG. 32, when the parameter a exceeds 3.57, the possible value of Xn further increases to 16. When a becomes 4, the values of Xn are distributed randomly from 0 to 1.

Thus, the function Xn + 1 = aXn (1-
Xn) can be used to obtain an apparently random chaotic signal especially when the parameter a is 4.

The same thing can be realized by using other functions. A chaotic signal can be created by simply using a triangular mountain-shaped function. For example, the following function is suitable.

Xn + 1 = k (Xn) (0 ≦ Xn <0.5) = k (−Xn + 1) (0.5 ≦ Xn ≦ 1.0) The parameter k in this function is between 0 and 2.0. FIG. 33 shows a cycle-doubled branch diagram when it is changed. The horizontal axis of the graph shown in FIG. 33 represents the parameter k.
And the vertical axis is the value of Xn. As shown in FIG. 33, when the parameter k becomes 2, an apparently random chaotic signal is obtained. Further, when such a triangular function is used, the above-mentioned function Xn + 1 = aXn (1
-Xn), it is known that the possible values of Xn are uniformly distributed between 0 and 1.

FIG. 34 is a graph showing the change in the value of Xn when the parameter k is 0.5. In the graph shown in FIG. 34, the horizontal axis represents n and the vertical axis represents the value of Xn. This graph shows changes in the value of Xn for three cases of the initial value X0 being 0.1, 0.5, and 0.9. The value of Xn converges to 0.0 after about X10.

FIG. 35 is a graph showing changes in the value of Xn when the parameter k is 1.00.
Also in the graph shown in FIG. 35, the horizontal axis represents n and the vertical axis represents the value of Xn. This graph shows changes in the value of Xn for three cases of initial value X0 of 0.1, 0.5, and 0.9. The value to do is different. That is, when the initial value X0 is 0.1, the convergent value is 0.1. Also, when the initial value is 0.5, the convergent value is 0.5. On the other hand, when the initial value X0 is 0.9, the convergent value is 0.1.

FIG. 36 is a graph showing the change in the value of Xn when the parameter k is 1.10.
In the graph shown in FIG. 36, the horizontal axis represents n and the vertical axis represents the value of Xn. This graph shows changes in the value of Xn for three cases of initial value X0 of 0.1, 0.5 and 0.9. Although the speed of approaching the normal state is different, it falls into a vibrating state of reciprocating between about 0.5 and 0.55.

Next, in FIG. 37, the parameter k is 1.2.
A graph showing the change in the value of Xn in the case of 5 is shown. In the graph shown in FIG. 37, the horizontal axis represents n,
The vertical axis represents the value of Xn. This graph shows changes in the value of Xn for three cases of initial value X0 of 0.1, 0.5 and 0.9. Although the speed of approaching the normal state is different, it falls into an oscillating state that reciprocates between about 0.5 and 0.6.

Further, in FIG. 38, the parameter k is 1.9.
A graph showing the change in the value of Xn in the case of 9 is shown. In the graph shown in FIG. 38, the horizontal axis represents n,
The vertical axis represents the value of Xn. This graph shows changes in the value of Xn for three cases of initial value X0 of 0.1, 0.5 and 0.9, and in each case, At first glance, it is a chaotic signal that moves randomly between about 0.0 and 1.0.

As described above, a method for obtaining a chaotic signal by using a predetermined function which is a predetermined linear mapping is conventionally known.

[0026]

However, since the above method is based on mathematical theory, the numerical value must be treated as a real number. That is,
To construct an actual device, it must be a device using analog signals.

With the recent development of digital technology, it has become necessary to use a random chaotic signal even in a device that handles digital signals. In such a digital system, when trying to obtain a chaotic signal using the above-mentioned mountain-shaped function, it is first necessary to use a digital tent map having an input / output relationship as shown in FIG. 39, for example. Can be thought of.

FIG. 39 is a graph showing a mountain-shaped triangular function as described above, that is, a digital tent map, using a 3-bit digital signal. Further, FIG. 40 also shows a graph showing a digital tent map in the case of 4 bits. Here, the horizontal axis represents Xn and the vertical axis represents Xn + 1. In general, the formula that defines a digital tent map is
It is expressed as follows.

Xn + 1 = 2 (Xn) +1 (0 ≦ Xn <2
^{p-1) = 2 (2} p -1-Xn) (2 p-1 ≦ Xn <2 p) where, p is represents the number of bits, p is the graph shown in FIG. 39 is 3 , P is 4 in the graph shown in FIG. An example of a configuration for obtaining a chaotic signal using such a digital tent map is shown in FIG. As shown in FIG. 41,
A digital tent mapping means (Tent Mapping) 10 for realizing a digital tent map and a delay element (D) for causing a time delay of one clock.
The chaotic signal generator is constructed by combining elay Element (delay element) 12 to form a loop. As described with reference to FIG. 41, the digital tent mapping means 10 is composed of a table recording a 3-bit digital tent map, for example, a ROM or the like.
Convert to Xn + 1. On the other hand, the delay element 12
Delays Xn + 1 output from the digital tent mapping means 10 by one clock. As a result, Xn + 1 is used as Xn in the next cycle.

In other words, this delay element 12
Can also be said to represent the identity line. The signal delayed by one clock by the delay element 12 is input to the digital tent mapping means 10 in the next cycle.

FIG. 42 is a schematic diagram for explaining how the chaos signal is generated by the digital tent map. As shown in FIG. 42, when the initial value X0 is "0", X1 is calculated as "1" by the digital tent mapping means. This X1, which is "1", is applied to the digital tent mapping means 10 again via the identity line realized by the delay element 12. As a result, “3” is calculated as X2. Hereinafter, similarly, X3, X4, X5, and X6 are “7”, “0”,
"1" is calculated. Such repetition (itera
As will be easily understood from the above, the value of Xn according to this example is a repetition of “0”, “1”, “3”, “7”. The value of this repetition changes depending on the initial value. When the initial value is "0", the signal of the above sequence is obtained, and when the initial value is "2", "2", "5",
Signals in the order of "4" and "6" are obtained. As described above, the maximum period in the case of 3 bits is 4 periods.

Even when a 4-bit digital tent map is used, a sequence of signals having a constant sequence can be obtained. Digital tent mapping means 1 in FIG.
If the 4-bit digital tent map shown in FIG. 40 is adopted as the 0 digital tent map,
There are the following four types of obtained Xn value columns.

“0”, “1”, “3”, “7”, “15” “2”, “5”, “11”, “8”, “14” “4”, “9”, “ 12 ”,“ 6 ”,“ 13 ”“ 10 ”,“ 10 ”,“ 10 ”,“ 10 ”,“ 10 ”As can be easily understood from these four types of Xn columns, 4
The maximum period for bits is 5. In general, the inventor of the present application experimentally confirmed that the maximum period for an arbitrary number of bits p is p + 1.

However, it can be said that the period of p + 1 is an extremely short period from the expressible number.
For example, the so-called M-sequence is well known as a method of generating a constant random value.

The M series is a series of 0s and 1s, that is, a 1-bit series. However, as the random number sequence, a number sequence having a larger number of digits, such as a congruent random number, is usually used. Therefore, based on the M series, L
A (L ≧ 2) -bit binary sequence <x _t > is generated as follows.

X _t = 0. a _{t + τ1} a _{t + τ2} ... a _{t + τL} (binary number expression) Here, τ1, τ2 ..., τL are different from each other and are constants unrelated to t. Since the generality is not lost even if τ1 = 0, τ1 = 0 will be used hereinafter.

[0037] <x _t> is configured by arranging each bit those appropriately shifting the phase of <a _t>. That is, <
The sequence appearing at each bit position of x _t > is generated by the same recurrence formula. Therefore, <x _t > can be generated at high speed by using the following recurrence formula.

X _t = c ₁ x _t-1 + c ₂ x _t-2 + ... + x _tp “+” in the above equation represents addition without carry for each bit. This can be processed at high speed by using an exclusive OR (EXOR) arithmetic function provided in many computers. Especially recurrence formula of the x _t in the case of the characteristic polynomial f is trinomial f (D) = 1 + D q + D p (q <p) _{is, x t = x tq + x} tp , and the single exclusive Since one random number is generated by the sum operation, the speed can be significantly increased.

FIG. 43 shows an example of an apparatus for generating this M series. FIG. 43 shows a circuit diagram of the 4-stage M-sequence shift register. In this 4-stage M-sequence shift register, the feedback input D ₀ to the first stage is D ₀ = Q ₂ + Q
_{To be 3} from the second and third stages in the figure
OR (exclusive OR) feedback is attached. "+" Here
Represents an exclusive OR. Set the initial state of this register to Q
_{If 0} = 1, Q ₁ = 0, Q ₂ = 0, and Q ₃ = 0, then D ₀
= Q ₂ + Q ₃ = 0 + 0, so when the next clock pulse comes in, the contents of the register will be Q ₀ = 0, Q ₁ = 1 and Q ₂
= 0 and Q ₃ = 0. The complete sequence of register states determined in this way is shown in FIG. In the table shown in FIG. 44, f is a feedback function in each state.

The number of states of this shift register is 1 in total.
There are five, and this number is the maximum number of states that a four-stage shift register having EXOR feedback can take. Therefore, this is called the maximum periodic sequence, that is, the M sequence. The state S ₀ = 0000 is not included in the sequence because it is a so-called “lock-in” state in which the state does not change any more. The length L of the M sequence for such a circuit is generally given by L = 2 ^N −1. here,
N is the number of stages of the shift register.

Note that the EXOR-connected register is always M
It does not generate a series, but depends on the feedback terminal. In FIG. 45, a feedback function that can generate an M sequence for N values is shown up to N = 18.

Further, if the negative function of the EXOR function is fed back, another M series can be generated with the same register length. At this time, the state S ₀ = 0000 is no longer the lock-in state. These circuits described above are used as a pseudo-random number generator because they have periodicity but the numbers in the output sequence obviously have irregularities.

As described above, since the period of the signal obtained in the chaotic signal generator using the digital tent map as it is is extremely short compared with the random number sequence generated by the M sequence, it is extremely practical. It was difficult.

The present invention has been made in view of the above conventional problems, and an object thereof is a chaos generator using a digital tent map, which can generate a signal with a long period. Is to provide a vessel.

[0045]

In order to achieve the above object, the first aspect of the present invention is a digital tent mapping means for applying a digital tent map to an input digital signal and outputting an output digital signal after the application. , An offset counter for outputting an offset signal, a subtracting unit for subtracting the offset signal from the output digital signal, a delay of the output digital signal after the subtraction by one clock, and the digital tent mapping unit for receiving the next clock. A delay unit that supplies the input digital signal, a storage unit that stores the input digital signal that the delay unit first outputs after the offset counter has performed the counting operation, and a value of the signal that is stored in the storage unit. And the value of the input digital signal output by the delay means A chaotic signal generator which outputs the input digital signal to the outside as a chaotic signal, including a comparator for applying a clock signal to the offset counter and causing the offset counter to count when they match. is there.

[0046] To achieve the above object, a second invention, in the above first chaotic signal generator of the present invention, the offset counter is a 2 ^p-1 or more, 2 ^p -1 the range Is output (p is the number of bits of the generated chaotic signal).

In order to achieve the above object, a third aspect of the present invention is the chaotic signal generator according to the first aspect of the present invention, in which the offset signal output from the offset counter is added to p bits of 2 ^p-1. , Adding means for converting into a p-bit digital signal (p is the number of bits of the generated chaotic signal),
Wherein the offset counter is a counter that outputs a p-1 bit offset signal, and the subtracting unit subtracts the p bit offset signal output by the adding unit from the output digital signal. It is a chaotic signal generator.

In order to achieve the above-mentioned object, the fourth aspect of the present invention applies a digital tent map to an input digital signal of p (p is an integer of 1 or more) bits, and p
The digital tent mapping means for outputting a bit output digital signal, the offset calculating means for outputting a p-1 bit offset signal, and the p-1 bit offset signal output by the offset calculating means are p bit 2 ^{p -1} , adding to convert to a p-bit signal, subtracting means for subtracting the output signal of the adding means from the output digital signal, and delaying the output digital signal after the subtraction by 1 clock, A delay means for supplying the digital tent mapping means as an input digital signal of the next clock, and a memory for storing the input digital signal first output by the delay means after updating the offset signal output by the offset calculating means. Means, the value of the signal stored in the storage means, and the output of the delay means. The input digital signal is compared with the value of the input digital signal, and when the values match, a clock signal is applied to the offset calculating means to cause the offset calculating means to perform an offset updating operation. A chaotic signal generator characterized in that it is output to the outside as a signal.

[0049]

According to the present invention, a predetermined offset signal is subtracted from the output signal of the digital tent mapping means,
Moreover, since the offset is updated every time a chaotic signal having the same value is output, a chaotic signal having a long period can be obtained.

[0050] Further, since the limit value of the output offset of the offset counter in a range of 2 ^p-1 ~2 ^p -1,
It is possible to obtain a chaotic signal having a long period and satisfying the uniformity. The range of this offset has been found by experiments.

Further, in order to satisfy the uniformity, the range of the offset value is limited to the above range by setting the p-1 bit counter and the p bit 2 ^p-1 and the output signal of the counter. It can be easily realized by using an adding means for adding.

Further, according to the above chaotic signal generator, the offset is updated by sequentially adding or subtracting a predetermined value by the counter, but it is also preferable to generate this offset signal by the chaotic signal generator. It is possible to obtain a more random signal as compared with the above chaotic signal generator.

[0053]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

As described above, the time series generated from the normal digital tent map has a very short cycle.

In the method of outputting a predetermined chaotic signal from a mapping function, it is known that different time series data can be obtained by changing the height of this mapping function. An explanatory diagram showing this is shown in FIG. FIG.
(A) of FIG. 1 is an explanatory diagram showing a state of change when the height of the parabolic function is changed, and (b) of FIG. 1 is a case where the height of the peak of the triangular function is changed. It is explanatory drawing which shows the mode of change of.

Therefore, it is possible to generate different time series data by changing the height of the mapping function at an appropriate timing to lengthen the cycle of the time series data as a whole, but the hardware becomes complicated. Therefore, it is not realistic. That is, in order to change the height of the mapping function, it is necessary to use multiplication or the like, which is not practical in terms of hardware scale and execution speed.

Therefore, in the present embodiment, different time series data are generated by moving (shifting) the mapping function up and down. Thus, the change in the shape of the graph of the function when the mapping function is shifted up and down is shown in FIG.
Is shown in. That is, a predetermined offset is added to the mapping function. This is equivalent to moving the identity line up and down, as shown in FIG. That is, without changing the shape of the mapping function,
It changes the entity line. This is, of course, as shown in FIG.
An equivalent circuit can also be realized by providing a means (offset function) for inserting a predetermined offset before the line. In FIG. 4, the mapping function and iden
Graphs of three functions of the titline and the newly provided predetermined offset function are shown.

A characteristic of this embodiment is that the period of the obtained time series data is lengthened by appropriately changing the mapping function in this way. As described above, by "moving" the mapping function, it is possible to prevent the data from being repeatedly generated in a short cycle and to obtain time-series data of a long cycle. In this embodiment, while changing the parameters of the mapping function in this way,
Since the generation of time series data is repeated, parametric
This is called iteration.

In this embodiment, as the parameters,
An example in which the offset added to the mapping function is changed is shown. Two types of methods for changing the offset will be described. In the present embodiment, these two types of methods are referred to as Type 1 and Type, respectively.
Call 2.

1.1 Type 1 Chaotic Signal Generator In this Type 1 chaotic signal generator, the offset is increased by 1 in order such as 0, 1, 2, 3. In the present embodiment, the addition of this offset is realized by a subtractor. This subtractor is inserted between the digital tent mapping means and the delay element.

FIG. 5 is a block diagram showing the configuration of the chaotic signal generator according to this embodiment. As shown in FIG. 5, this chaotic signal generator is a digital tent mapping means 100 configured by using a ROM or the like.
And a delay element 102 and a subtractor 104. And the digital tent mapping means 1
The output signal of 00 is supplied to one input terminal of the subtractor 104, and the output signal of the subtractor 104 is supplied to the input terminal of the delay element 102. And
The output signal of the delay element 102 is supplied to the input terminal of the digital tent mapping means 100.

A feature of this embodiment is that the subtractor 104 subtracts a predetermined offset from the output signal of the digital tent mapping means 100. Then, the signal after the subtraction is supplied to the delay element 102. The output signal of the offset counter 106 is supplied to the other input terminal of the subtractor 104, and the digital tent mapping means 10 is supplied.
The output signal of 0 is subtracted by the offset output by the offset counter 106.

The output signal of the delay element 102 is
The register 108 and the comparator 110 are supplied to the digital tent mapping means 100 described above.
And also supplied. The register 108 stores and holds the output signal of the delay element 102 one clock after the offset counter 106 counts up. That is, the offset counter 106 increments and the first data to which the new offset is added is output from the delay element 102 one clock later, but the first data is stored and held in the register 108.

On the other hand, the comparator 110 constantly monitors the value stored and held in the register 108 and the data output from the delay element 102.
When the two data match, a match signal is output. Then, as described above, when this coincidence signal is output, the offset counter 106 counts up. The value stored and held in the register 108,
The case where the data output from the delay element 102 matches is the case where the same value is output from the delay element 102 after the offset counter 106 outputs a predetermined value as an offset. As described above, the register 108 stores and holds the first data after the offset counter 106 counts up and a new value is output as the offset value. The fact that the value stored and held in the register 108 matches the value of the output signal of the delay element 102 means that the same value is output from the delay element 102 for the same offset value. That is, it means that the data for one cycle in the digital tent map has been output, and the data for the second cycle (that is, the same as the first cycle) has just started to be output.

In this embodiment, for convenience, as shown in FIG. 5, the digital tent mapping means 1 is used.
The output signal of 00 is represented by X'n + 1, and the output signal of the subtractor 104 is newly represented by Xn + 1. Also,
P in FIG. 5 represents the number of bits of digital data.

FIG. 6 is a flow chart showing the operation of the chaotic signal generator of this embodiment.

First, the initialization of the chaotic signal generator is performed in step 6-1 by turning on the power or a reset signal from the outside. In this step 6-1, the initial value X0 is set and the offset (offs
et) and the loop variable n is set to 0.

Next, at step 6-2, the value of the initial value X0 is stored and held in the register 108.

In step 6-3, Xn is output as a chaotic signal to the outside.

In step 6-4, the digital tent mapping means 100 outputs X to the outside.
The mapping of the value of n is performed. The result of this mapping is X'n + 1
Is.

In step 6-5, the value X'n + 1 obtained as a result of the above-mentioned mapping is offset (offse).
t) The value is subtracted. This subtraction gives Xn + 1.

At step 6-6, the loop variable n is incremented, that is, +1 is added.

Next, in step 6-7, it is checked whether or not immediately after changing the offset. That is, it is checked whether or not it is the first chaotic signal (time series data) with respect to the offset value. As a result, if it is immediately after changing the offset, step 6
If the process shifts to -8 and it is not immediately after changing the offset, the process shifts to step 6-9.

In step 6-8, Xn is stored in the register. As described above, by storing the chaotic signal (time series data) output first at a certain offset value in the register, it is detected whether the same Xn is output for the same offset value. It allows you to do things. After the processing of step 6-8, the processing shifts to step 6-3 described above.

In step 6-9, it is checked whether Xn and the register value are equal. This is to check whether or not a chaotic signal (time series data) having the same value as the first Xn after being changed to the same offset value is output. If it is determined that the same data is output, the process proceeds to the next step 6-10, and if it is determined that the same data is not output, the process proceeds to step 6-3 described above.

In step 6-10, the offset (value) is incremented. This means that the same Xn has been output for the same offset, and thus one cycle of data for that offset has been output. Therefore, in such a case, the offset (value) is incremented to update the offset in this step.

Next, in this embodiment, the comparator 11
An example of the operation of the chaotic signal generator when 0 matches the data will be described in detail based on specific numerical values.
FIG. 7 shows an explanatory diagram of the operation of this embodiment. This explanatory diagram is similar to FIG. 4 above in that the digital tent map, the offset function, and the identity
A graph of each of the ine functions is shown. Further, in this explanatory diagram, the operation from the state where the initial value is “0” and the offset is “0” is described. Furthermore, the number of bits p is 3.

First, since the initial value X0 is "0", the time series data are "0", "1", "3", "7",
"0" is output. The value “0” of the initial initial value X0 is stored and held in the register 108. Therefore, since X4 is "0", it can be seen that one cycle has elapsed when X4 is output. As described above, when the comparator 110 detects that one cycle has elapsed, the comparator 110 outputs the coincidence signal. Then, the offset counter 106 counts up and the offset is updated to "1". The fact that this offset is updated to "1" is represented by the change of the graph of the offset function in FIG. 7 from (1) to (2).

In this way, the time series data is continuously output with the offset being "1". Based on the last data "0" in the state where the offset is "0", the digital tent mapping unit 100 first converts this "0" into "1". This is shown in the upper left graph of FIG. 7, and the output signal X'n + 1 of the digital tent mapping means 100 is "1".
It will be understood that Next, this "1" is changed according to the function indicated by (2) in FIG. As a result,
"1" changes to "0", and finally "0" is output as Xn.

That is, in the chaotic signal generator according to the present embodiment, the offset is "0" as described above.
In this state, "0", "1", "3", "7", "0" are output, and then in the state where the offset is "1", "0" is output. Since this last X5 (its value is "0") is the first time series data in the state where the offset is "1", it is stored and held in the register 108.

Further, since "0" is repeated as the time series data to be output in the state of the offset "1", the next X6 is "0" and the data of X5 previously stored and held in the register 108. A match is detected. Then, as described above, the coincidence signal is output from the comparator 110 and the offset counter 106 counts up. That is, the offset value is newly set to "2". FIG. 8 shows how the offset value changes from "1" to "2". In the figure, (2) and (3) have offset values of "1",
It is an offset function in the case of "2".

X0 which is "0" is converted into "1" in the digital tent mapping means 100, which is converted into "0" by the offset function (2) and appears as X0. Already "0" by the offset function (2)
Therefore, the offset is updated from "1" to "2" and the offset function is changed from (2) to (3). Next, X6 "0" is converted into "1" in the digital tent mapping means 100, which is converted into "7" by the new offset function (3), and output from the delay element 102 as X7. Less than,
Similarly, when the value of this offset is "2", X7
= “7”, X8 = “6”, X9 = “0”, X10 =
"7" and time series data are output. And this X1
When the comparator 110 detects that 0 is “7”, the offset is updated again. Similarly, when the same value is output for the same offset value, the offset value is updated to obtain a chaotic signal having an extremely long cycle.

The insertion of ^ in FIGS. 7 and 8 indicates that the offset value has been updated at that time. As described above, in the present embodiment, “0”, “1”, “3”, “7”, “0” ^ in order.
"0", "0" ^ "7", "6", "0", "7" ^
"5", "1", "0", "6", "7", "5" ^
Chaos signals (time series data) are output as in “0”, “5”, “0” ^ “4” .... The first 50 examples of chaotic signals generated by the chaotic signal generator according to the present embodiment are shown in FIG. In FIG. 9, the horizontal axis represents time n (Time), and the vertical axis represents the value of the chaotic signal (Si
A graph representing the (Grand Level) is shown.
In addition, the offset function (off
A number indicating the shape of a set function graph is shown. The period of the chaotic signal output from the chaos generator according to the present embodiment is 291 periods, and the period can be significantly lengthened as compared with the case of simply using digital tent mapping (maximum period is 4). became.

As described above, according to the chaotic signal generator of Type 1, a long-period chaotic signal can be obtained.
It has been confirmed by the inventor of the present application that the cycle also changes depending on the initial value. Further, the chaotic signal (time-series data) is not uniform, and as the number of bits increases, two peaks tend to appear in the distribution. For example, FIG. 10 shows a histogram of data (291 pieces) for one period when the bit width of the data is 3 bits and the initial value is 0. In the histogram shown in FIG. 10, the vertical axis represents frequency (Frequency), and the horizontal axis represents signal value (Signal Level). Also,
FIG. 11 shows a histogram of data (2,433,158 pieces) for one period when the bit width of the data is 8 bits and the initial value is 3. Also in FIG. 11, as in FIG. 10, the vertical axis represents the frequency (Frequency
y), and the horizontal axis represents the signal value (Signal Level).
represents 1).

1.2 Improvement of Non-Uniform Distribution The relationship between the offset state and the time-series histogram will be described below.

For example, in the case of 8 bits, the offset value changes in the range of 0 to 255, but this range is divided into four sections for convenience of explanation, and the histogram in each area is the same as the above-mentioned histogram. Ask.

The four sections are (a): 0 to 63,
(B): 64-127, (c): 128-191,
(D): 192-255. When these four sections are represented on the graph of the offset function, they are represented as areas corresponding to each section as shown in FIG. Histograms for these four intervals are shown in FIGS. 13 to 16 respectively (FIG. 1).
3: (a) section, FIG. 14: (b) section, FIG. 15: (c)
Section, FIG. 16: (d) section).

Here, in the sections (c) and (d), that is, when the offset is in the range of 128 to 255, the values of the chaotic signals (time series data) are uniformly distributed in the section. Confirmed experimentally from 15, 16. The inventor of the present application has confirmed that there is almost the same tendency when the number of bits is other than 8 bits.

Therefore, it can be said that the cause of the non-uniform distribution of chaotic data (time series data) is the state of offset.
The offset state that is expected to have a uniform distribution is
As shown in FIG. 17, the range of α is 2 ^p-1 to 2 ^p.
-1 (where p is the number of bits).

From such experimental results, it is also preferable to change the offset within a range where the chaotic signal (time series data) has a uniform distribution. FIG. 17 shows the range in which the offset changes in the chaotic signal generator of Type 1.
18 is a block diagram showing the configuration of a chaotic signal generator restricted to move only in the range of (α).

As shown in FIG. 18, in this improved Type 1 chaos signal generator, the offset counter 206 is composed of p-1 bits. By adding 2 ^{p- 1} to the output signal of the offset counter 206 in the adder 204b,
Subtrahend supplied to the subtractor 204a is the number in the range of 2 ^p-1 ~2 ^p -1. This subtracter 204a is the same as the one shown in FIG.
It is a component equivalent to the subtracter 204 of the chaotic signal generator of Type 1 shown in FIG. That is, the difference between the configuration shown in FIG. 18 and the configuration shown in FIG.
The number of bits of the offset counter 206 is one smaller, and a new adder 204b is added. These arrangements the number to be subtracted from the X'n + 1 be a number in the range of 2 ^p-1 ~2 ^p -1, uniformity of the resulting signal sequence is ensured.

According to the configuration of FIG. 18, the following results were obtained concretely.

The number of bits is 3 and the initial value is 2.
Chaotic signal in the case of (time series data) (50 from the initial point)
A graph of up to 112 points) is shown in FIG. In the graph shown in FIG. 9, the vertical axis represents the signal value (S
signal level), and the horizontal axis represents n of Xn, in other words, time (Time).
Note that in FIG. 19 as well as in FIG. 9, the value of the offset function is described at the bottom thereof.

The number of bits is 3 and the initial value is 2.
In the case of, the chaotic signal (time series data) for one cycle (11
A histogram of data for 2 cycles is shown in FIG. In this histogram, the vertical axis represents frequency (Freq
represents the value of the signal (Signal).
Level).

The number of bits is 8 and the initial value is 0.
In the case of, the chaotic signal (time series data) for one period (1,
The histogram of the data of 726,201 cycles) is shown in FIG.
Is shown in. Similarly in this histogram,
The vertical axis represents the frequency (Frequency), and the horizontal axis represents the signal value (Signal Level).

As can be seen from the histograms shown in FIGS. 20 and 21, this improved Type1
According to the chaotic signal generator, the chaotic signal (time series data) having uniformity can be obtained.

In order to verify the uniformity of the chaotic signal thus obtained, the χ ² test was performed. Data width is 8
The result of the χ ² test when the data of 100,000 points when the initial value is 0 is divided into 16 is 7.8.
4 and χ ² ₁₅ (0.05) = 25.0 or less, and equal probability was guaranteed at a significance level of 5%.

Therefore, the chaotic signal generated by the improved type 1 chaotic signal generator can be sufficiently used as a uniform random number.

2. Type 2 Chaotic Signal Generator Next, the Type 2 chaotic signal generator will be described.

In the Type 1 chaos generator, the offset is increased by 1 in order such as 0, 1, 2, and 3. However, in the Type 2 chaos generator, the offset value is determined by a random number. To go. The chaotic signal generator that generates this random number is the improved T
A chaotic signal generator of type 1 is used.

FIG. 22 is a block diagram of the Type 2 chaotic signal generator which uses the output signal of the chaotic signal generator as an offset. Here, the type 1 chaotic signal generator 306 is used as the offset.

This Type 1 chaos signal generator 306
Is a comparator 3 for p-1 bit random number (chaos signal)
It is output every time a match signal is output from 10. This Ty
The period of the pe2 chaotic signal generator is shown below.

The cycle of the chaotic signal (time series data) when the data width is 3 bits and the initial value is 0 is 189. Also, a graph of signal values from the initial value to 50 points in this case is shown in FIG. In the graph shown in FIG. 23, the ordinate represents the signal value (Signal Level) and the abscissa represents X, as in the graph of FIG.
n of n, in other words, represents time (Time).

FIG. 24 shows a histogram of a chaotic signal (time series data) for one period (189 signal points) when the data width is 3 bits and the initial value is 0. In the histogram shown in FIG. 24, the vertical axis represents the frequency (Frequency), as in the histogram of FIG.
cy), and the horizontal axis represents the signal value (Signal Lev).
el).

FIG. 25 shows a histogram of a chaotic signal (time series data) for one period (268, 435, 456 signal points) when the data width is 8 bits and the initial value is 0. . In the histogram shown in FIG. 25, the vertical axis represents the frequency (F
frequency, where the horizontal axis is the signal value (Sign
al Level).

When the data width is 8 bits and the initial value is 0, and the data of 1,000,000 points is divided into 16, the result of the χ ² test is 10.80 and χ ² ₁₅ (0.0
5) = 25.0 or less, with a significance level of 5%,
Equality is guaranteed. Therefore, it is possible to use the output signal of the Type 2 chaotic signal generator as a uniform random number for various uses.

3. Comparison of Maximum Cycles As described above, according to this embodiment, it is possible to output a signal having an extremely long cycle as compared with a method using a normal digital point and a map. Therefore, Type 1 and T of the parametric iteration described in this embodiment are used.
The maximum period in yepe2, the M-series random number, and the number sequence using the digital tent map is compared. In this comparison, the horizontal axis represents the number of bits (Bits) as a parameter, and the vertical axis represents the maximum period (Maximum Period).
This was done by creating a graph that represents This graph is shown in FIG. As can be seen from this graph, the parametric iteration (Parametric) of the present invention is compared with the M series (M-Sequence) that is frequently used for generating general random numbers.
Iteration) Type 1 and Type 2 can realize an extremely long cycle. In the graph, Digital Tent Mapping (Digital Tent Ma)
Although the period according to "ppping" is also shown, the period of the sequence of sequences due to digital tent mapping is extremely short, as described in the prior art, and is not suitable for practical use.

[0108]

As described above, according to the present invention, it is possible to obtain a chaotic signal having an extremely long period while using digital tent mapping.

Further, if the offset is limited to a predetermined range, it is possible to obtain a chaos signal generator satisfying the uniformity.

Particularly, limiting the offset to a predetermined range can be realized with a simple structure by using a p-1 bit counter and a predetermined adding means, and an inexpensive chaos signal generator can be obtained. Has the effect. Where p
Is an integer greater than or equal to 1 and is the number of bits of a chaotic signal.

Furthermore, it is also preferable to use the chaotic signal generator as a means for obtaining the offset. As a result, it is possible to obtain a chaotic signal generator capable of obtaining a more random chaotic signal.

[Brief description of drawings]

FIG. 1 is an explanatory diagram illustrating that different time series data can be obtained by changing the height of a mapping function.

FIG. 2 is an explanatory diagram illustrating a change in the shape of a graph when a mapping function is vertically shifted.

FIG. 3 is an explanatory diagram illustrating changing the Identity Line up and down.

FIG. 4 is an explanatory diagram illustrating insertion of a predetermined offset before an Identity Line.

FIG. 5 is a configuration block diagram of a chaotic signal generator according to the present embodiment.

FIG. 6 is a flowchart showing an operation of the chaotic signal generator of FIG.

FIG. 7 is an explanatory diagram of an operation of the chaotic signal generator of FIG.

FIG. 8 is an explanatory diagram of an operation of the chaotic signal generator of FIG.

9 is an explanatory diagram showing a graph of the first 50 Xn by the chaotic signal generator of FIG. 5. FIG.

FIG. 10 is a histogram of data (291 pieces) for one period when the data width is 3 bits and the initial value is 0.

FIG. 11 is a case where the data width is 8 bits and the initial value is 3;
8 histograms.

FIG. 12 is a graph showing four sections on an offset function.

FIG. 13 is a histogram for the section (a) shown in FIG.

FIG. 14 is a histogram for the section (b) shown in FIG.

15 is a histogram for the section (c) shown in FIG.

16 is a histogram for the section (d) shown in FIG.

FIG. 17 is a graph showing an offset range such that time-series data has a uniform distribution of.

FIG. 18 is a configuration block diagram of a chaotic signal generator configured such that the offset changes only in the range of the offset in which the time-series data in which the offset is changed has a uniform distribution.

FIG. 19 is a diagram showing a graph of a chaotic signal (first 50 points) when the bit width is 3 bits and the initial value is 2.

FIG. 20 is a diagram showing a graph of a chaotic signal (one cycle, 112 points) when the bit width is 3 bits and the initial value is 2.

FIG. 21 is a chaotic signal when the bit width is 8 bits and the initial value is 0 (one cycle, 1,726,201 points).
It is a figure which shows the histogram of.

FIG. 22 is a configuration block diagram of another type of chaotic signal generator according to the present embodiment.

FIG. 23 is a diagram showing a graph of a chaotic signal (first 50 points) when the bit width is 3 bits and the initial value is 0.

FIG. 24 is a diagram showing a histogram of a chaotic signal (one cycle, 189 points) when the bit width is 3 bits and the initial value is 0.

FIG. 25 is a chaotic signal when the bit width is 8 bits and the initial value is 0 (one cycle, 268, 435, 456);
It is a figure which shows the histogram of (dot).

FIG. 26 is a graph comparing maximum periods of signals according to various methods.

FIG. 27 is a first-order mapping function Xn + 1 = aXn (1-Xn).
FIG. 6 is an explanatory diagram for explaining a generation principle of a chaotic signal according to FIG.

FIG. 28 is a diagram showing a graph of a column of Xn values when the parameter a in the function Xn + 1 = aXn (1-Xn) is changed.

FIG. 29 is a diagram showing a graph of a column of values of Xn when the parameter a in the function Xn + 1 = aXn (1-Xn) is set to 3.8.

FIG. 30 is a cycle-doubled branch diagram when the function Xn + 1 = aXn (1-Xn) is used.

FIG. 31 is an enlarged view of a cycle doubling bifurcation diagram when the parameter a is 2.8 to 4.0.

FIG. 32 is an enlarged view of a cycle-doubled branch diagram when the parameter a is 3.54 to 3.64.

FIG. 33 is a period-doubled branch diagram when a triangular mountain-shaped function is used.

FIG. 34 is a diagram showing a graph showing changes in the value of Xn when the parameter k is 0.50.

FIG. 35 is a diagram showing a graph showing changes in the value of Xn when the parameter k is 1.00.

FIG. 36 is a diagram showing a graph showing changes in the value of Xn when the parameter k is 1.10.

FIG. 37 is a diagram showing a graph showing changes in the value of Xn when the parameter k is 1.25.

FIG. 38 is a diagram showing a graph showing changes in the value of Xn when the parameter k is 1.99.

FIG. 39 is a diagram showing a graph representing a 3-bit digital tent map.

FIG. 40 is a diagram showing a graph representing a 4-bit digital tent map.

FIG. 41 is a block diagram of a configuration for obtaining a chaotic signal using a digital tent map.

FIG. 42 is a schematic diagram showing how a chaotic signal is generated by a digital tent map.

FIG. 43 is an explanatory diagram of a chaotic signal generator using a conventional 4-stage M-sequence shift register.

FIG. 44 is an explanatory diagram showing a table of M series of a conventional 4-stage shift register.

FIG. 45 is an explanatory diagram of a feedback function that achieves the maximum period series of the conventional 4-stage shift register.

[Explanation of symbols]

 100 Digital tent mapping means 102 Delay element 104 Subtractor 106 Offset counter 108 Register 110 Comparator

Claims (4)

[Claims] 1. A digital tent mapping means for applying a digital tent map to an input digital signal and outputting the applied output digital signal, an offset counter for outputting an offset signal, and the offset signal from the output digital signal. Subtracting means for subtracting, delay means for delaying the output digital signal after the subtraction by one clock and supplying it to the digital tent mapping means as the next input digital signal, and after the offset counter performs counting operation, When the storage unit that stores the input digital signal first output by the delay unit and the value of the signal stored in the storage unit are compared with the value of the input digital signal output by the delay unit, and the values match, Apply a clock signal to the offset counter, It includes a comparator for counting the serial offset counter, a chaotic signal generator and outputs to the outside the input digital signal as a chaotic signal. 2. A chaos signal generator of claim 1, wherein said offset counter is a 2 ^p-1 or more, 2 ^p -1 the range of values (p is the number of bits of the chaotic signal generated)
A chaotic signal generator characterized in that it outputs only the signal of. 3. The chaotic signal generator according to claim 1, wherein the offset signal output from the offset counter is
adder means for adding 2 ^p-1 of p bits and converting to a p-bit digital signal (p is the number of bits of the generated chaotic signal); and the offset counter outputs a p-1 bit offset signal. The chaotic signal generator is a counter, wherein the subtracting unit subtracts the p-bit offset signal output from the adding unit from the output digital signal. 4. A digital tent mapping means for applying a digital tent map to an input digital signal of p (p is an integer of 1 or more) and outputting a p-bit output digital signal after the application, and p-1 bit Offset calculating means for outputting an offset signal of ^p-1 and an adding means for adding the p-1 bit offset signal output by the offset calculating means to 2 ^p-1 of p bits to convert into a p-bit signal. Subtraction means for subtracting the output signal of the addition means from the output digital signal, and delay means for delaying the output digital signal after the subtraction by one clock and supplying it to the digital tent mapping means as the next input digital signal. , The delay means outputs first after updating the offset signal output by the offset calculating means A storage unit that stores an input digital signal, compares the value of the signal stored in the storage unit with the value of the input digital signal output by the delay unit, and if they match, a clock signal to the offset calculation unit. And a comparator for causing the offset calculating means to perform an offset updating operation, and outputting the input digital signal to the outside as a chaotic signal.