JPH088315A - Automatic semiconductor wafer selection system - Google Patents

Abstract

PURPOSE:To select even a large quantity of semiconductor crystals automatically in a short time according to the specific application thereof. CONSTITUTION:At first, measured crystal characteristics are referred (Step 101) and crystal characteristics, set for each application, are retrieved (Step 102). Upon provision of a command for selecting a specific application, crystal characteristics set for that application are retrieved and compared with measured crystal characteristic values (Step 103). When the characteristics match each other, the maximum EPD set for the matched application is referred along with the set cutting diameter of a wafer (Step 104) and then they are compared with a measured EPD map (Step 105). When they match each other, a wafer cutting profile plot signal matching a selected application is delivered to an output means (Step 106) thus determining the cutting position of wafer automatically according to the application.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer automatic selection device using a computer, and more particularly to a device suitable for selecting a semiconductor wafer whose use is defined by crystal characteristics, dislocation density and wafer outline.

[0002]

2. Description of the Related Art Crystal characteristics of semiconductor crystals and dislocation density,
It is not always possible to obtain constant characteristics such as the outer shape. Therefore, it is necessary to select a semiconductor crystal having characteristics suitable for each application. Conventionally, this semiconductor crystal has been manually selected by the following procedure.

First, as a first step, (1) the crystal characteristics of the wafer 6 on the seed side and the wafer 7 on the tail side (for example, the crystal to be selected as shown in FIG. 3) (for example,
Check the measurement record in which the specific resistance) measurement result is written.

(2) The characteristics of the intermediate crystal 8 are judged from the measurement record.

(3) Based on the above judgment, a crystal is selected for an optimum use.

For example, the seed-side wafer 6 has a specific resistance of 3.
0 × 10 ⁷ Ωcm, the resistivity of the tail side wafer 7 is 7.0 ×
If it is 10 ⁷ Ωcm, the resistivity of the intermediate crystal 8 is
The segregation of impurities in the crystal can determine that it is in the range of 3.0 × 10 ⁷ Ωcm to 7.0 × 10 ⁷ Ωcm.

Next, as a second step, (4) Further, as shown in FIG. 4, a dislocation density (EPD) map 9 of the seed side wafer and an EPD map 1 of the tail side wafer are further provided.
Refer to 0. Here, the EPD map is a chart showing the number of etch pits for each specific area in one wafer.

(5) In this diagram, the outline 11 of the cutout of the wafer suitable for the application is entered.

For example, if the EPD value required for the above-mentioned application is 10 pieces / cm ² or less, a portion above the EPD value cannot be selected from the map. FIG. 4 shows an EPD map 9 of the seed side wafer and an EPD map 10 of the tail side wafer.
The cut-out contour 11 of the wafer suitable for the purpose is entered from both maps.

The processing up to this point is called "selection" in a broad sense.

[0011]

However, the above-described prior art semiconductor crystal application selection is possible by taking time if the number of semiconductor crystals is small, such as within a few tens of crystal crystals. Due to the laborious manual work, it is impossible to select a large amount of semiconductor crystals for the optimum use.

An object of the present invention is to solve the above-mentioned drawbacks of the prior art and to provide a semiconductor wafer automatic selection system capable of selecting a large amount of semiconductor crystals for an optimum use in a short time even in the case of a large amount of semiconductor crystals. To do.

[0013]

According to the present invention, the characteristics of a seed-side wafer and a tail-side wafer, which are cut out from a semiconductor crystal with an intermediate portion left in advance, are measured and the measured value is used for the intermediate portion of the semiconductor crystal. Is a semiconductor wafer automatic selection system in which the wafer cutting position is determined so as to suit the application.

This system comprises input means, storage means, arithmetic control means, and output means. The storage means, from the input means, the crystal characteristic values of the seed side wafer and the tail side wafer of the semiconductor crystal which are the measured values, the dislocation density map of the seed side wafer and the tail side wafer of the semiconductor crystal,
Also, the crystal characteristics, the maximum value of the dislocation density, and the cut-out wafer diameter, which are set values determined for each application, are stored.

The arithmetic control means refers to the measured crystal characteristic value, the measured dislocation density map, and the set value for each application described above from the storage means, and determines the specified application among the applications. When the set crystal characteristic value determined is searched and the measured crystal characteristic value matches the set crystal characteristic value, the maximum value of the set dislocation density and the set cut-out wafer diameter of the matched application are referred to, and these When the measured dislocation density maps of 1 and 2 match, a wafer cutout contour plot signal suitable for the specified application is output to the output means.

The output means outputs the cut-out outline of the wafer according to the wafer cut-out outline plot signal.

[0017]

The crystal characteristics and dislocation density maps of the seed side wafer and the tail side wafer of the semiconductor crystal to be selected are measured in advance. These measured values are input and stored in the storage means by the input means. Further, the crystal characteristics, the maximum value of dislocation density, and the cut-out wafer diameter, which are set values determined for each application, are also stored in the storage means by the input means.

The arithmetic control means first refers to the characteristic measured values of these crystals stored in the storage means. Next, the crystal characteristics for each application are searched. Here, when an instruction to select a specific use is given, the set crystal characteristic value determined for the use is searched, and the match between the set crystal characteristic value and the measured crystal characteristic value is checked.

When the characteristics match, the set dislocation density maximum value and the set cut-out wafer diameter for the matched application are referred to, and the matching between these and the measured dislocation density map is examined. A region having a dislocation density smaller than the maximum set dislocation density value is examined from the measured dislocation density map, and when the region satisfies the set cut wafer diameter, the selected use is determined to be suitable for the use. A wafer cutout contour plot signal conforming to is output to the output means.

When the output means receives the wafer cutout contour plot signal, the output means plots the wafer cutout contours on the dislocation density maps of the seed side wafer and the tail side wafer of the semiconductor crystal, and cuts out a wafer suitable for the application. Determine the position.

[0021]

EXAMPLES Examples of the semiconductor wafer automatic selection system of the present invention will be described below. FIG. 2 is a block diagram of the system according to the present embodiment. It has a computer main body 5 as arithmetic control means, and a keyboard 1 as display means, a display 2, a storage device 3 for storing characteristic information and the like input from the input means via the computer 5, and a plotter 4 as output means as peripheral devices. To have.

By utilizing such a system, various characteristic information of the wafer is identified, a semiconductor wafer most suitable for a specific application is selected, and the cut-out position of the wafer is automatically determined. In order to automatically select semiconductor wafers,
In the computer body 5, a processing flow selection program as shown in FIG. 1 is incorporated.

As shown in FIG. 3, the specific resistances of the seed-side wafer 6 and the tail-side wafer 7 which have been cut out leaving the intermediate crystal 8 in advance are measured. At this time, the seed side specific resistance was 3.0 × 10 ⁷ Ωcm and the tail side specific resistance was 7.0 × 10 ⁷
Ωcm. From these, as shown in FIG.
It is assumed that an EPD map 9 of the seed side wafer and an EPD map 10 of the tail side wafer in which PDs are distributed at 4 pieces / cm ^{2 to} 12 pieces / cm ² are prepared.

On the other hand, suppose that the semiconductor crystal has three uses A, B, and C that require set values (use ranges) of characteristics as shown in Table 1. The characteristics are the minimum and maximum (* 10
⁷ Ωcm), EPD maximum value (pieces / cm ² ), and cut wafer diameter (mm).

[0025]

[Table 1]

The measured resistivity, measured EPD map, and all information about various set values for each application are input from the keyboard 1 to the storage device 3 via the computer body 5, and the selection program of FIG. 1 is executed.

In the selection program, first, the measured values of the crystal characteristics stored in the storage device 3 are referred to (step 10).
1). Next, the set value of the crystal characteristic for each application shown in Table 1 is searched (step 102). Here, when the instruction to select the use A is given, the set crystal characteristic defined for the use A is searched. In other words, the search results, the specific resistance value range ^{2.0 × 10 7 Ωcm~8.0 × 10 7} Ωcm, EPD maximum 10 pieces / cm ^2, a cut-out wafer diameter 50 mm.

First, the coincidence between the set specific resistance value and the measured specific resistance value is checked (step 103). Measured resistivity value of the crystals, the application range ^{2.0 × 10 7 Ωcm~8.0 × 10 7} Ωcm
Since the characteristics are satisfied and the characteristics match, the set EPD maximum value and the set cut-out wafer diameter of the matched application A are referred to (step 104), and the matching between these and the measured EPD map is checked (step 105). That is, set EPD maximum value 1
Measure the area with EPD smaller than 0 / cm ² EPD
The map is examined to determine whether or not the area satisfies the set cut wafer diameter.

As shown in FIG. 4, since the application range is satisfied in the relationship between the EPD and the outer shape, the crystal is judged to be suitable for the application A, and the wafer cutout suitable for the application A is cut out. The contour plot signal is output to the plotter 4 (step 106).

When the plotter 4 receives this wafer cutout contour plot signal, it plots a wafer cutout contour 11 having a diameter of 50 mm on the seed side wafer EPD map 9 and the tail side wafer EPD map 10 of the semiconductor crystal shown in FIG. Then, the cut-out position of the wafer suitable for the application A is determined.

When the instruction to select the use B is given in step 102, the measured resistivity is judged to satisfy the use range, but the relation between the EPD and the outer shape satisfies the use range. No selection because there is no (Step 105
NO), and a request to select another application is issued.

Similarly, when the instruction to select the use C is given, the crystal cannot be selected at this stage (step 1 because the crystal has a portion exceeding the specific resistance range of the use).
It is determined to be NO) in 03 and a request for selecting another application is issued.

As described above, according to this embodiment, since the selection of the semiconductor wafer whose use is defined by the crystal characteristics, EPD, and wafer outer shape can be automated, a large amount of semiconductor crystals can be selected for the optimum use in a short time. The work efficiency can be improved. In particular, a compound semiconductor such as GaAs having a large characteristic variation has a large contribution to the selection.

In the above embodiments, the case where the crystal characteristic to be judged is the specific resistance has been described, but the present invention can be applied to cases other than the specific resistance. For example, it can be applied to crystal characteristics such as carrier concentration and mobility. In addition, even if a plurality of these electrical characteristics are related, by adding the step of determining the required characteristics for these,
Automatic selection is possible. Next, a specific example of the case where a plurality of electric characteristics are related is shown.

As shown in FIG. 3, the resistivity, carrier concentration, and mobility of the seed-side wafer 6 and the tail-side wafer 7 which have been cut out leaving the intermediate crystal 8 in advance are measured. It is assumed that the measurement result is as shown in Table 2. Further, it is assumed that the seed side wafer EDP map 9 and the tail side wafer EDP map 10 are created as shown in FIG.

[0036]

[Table 2]

[0037]

[Table 3]

On the other hand, suppose that the semiconductor crystal has three uses A, B, and C that require set values (use ranges) of characteristics as shown in Table 3. The characteristics are the minimum and maximum (* 10
⁷ Ωcm), minimum / maximum carrier concentration (× 10 ⁷ / c)
m ³ ), minimum mobility (cm ² / v · s), maximum EDP value (pieces / cm ² ), and cut wafer diameter (mm).

All the information on the measured resistivity, measured carrier concentration, measured mobility, measured EDP map, and various set values for each application is input from the keyboard 1 to the storage device 3 via the computer body 5, Run the selection program.

In the selection program, first, the measured values of the crystal characteristics stored in the storage device 3 are referred to (step 50).
1).

Next, the set values of the crystal characteristics for each application shown in Table 3 are searched (steps 502, 504, 506).

Here, when an instruction to select the use A is given, the set crystal characteristic defined for the use A is searched.
That is, the search result is a specific resistance value range of 2.0 × 10 ⁷ Ω.
cm to 8.0 × 10 ⁷ Ωcm, carrier concentration measurement value range 2.
The diameter is 0 × 10 ⁷ / cm ^{3 to} 6.0 × 10 / cm ³ , the minimum mobility is 700 cm ² / vs, the maximum EDP value is 10 / cm ² , and the cut wafer diameter is 50 mm.

First, the coincidence between the set specific resistance value and the measured specific resistance value is checked (step 503). The measured specific resistance value of the crystal satisfies the usage range of 2.0 × 10 ⁷ Ωcm to 8.0 × 10 ⁷ Ωcm, and the characteristics match. Therefore, the set carrier concentration and the measured carrier concentration of the matched usage A match. (Step 505). The measured carrier concentration value of the crystal satisfies the application range of 2.0 × 10 ⁷ / cm ^{3 to} 6.0 × 10 ⁷ / cm ³ , and the characteristics are the same. Check the agreement with the degree (step 507). The measured mobility of the crystal is 700 cm ² / v · s, the minimum value in the application range.
Since the characteristics are satisfied and the characteristics match, the set EDP maximum value and the set cut-out wafer diameter of the matched application A are referred to (step 508), and the matching between these and the measured EDP map is checked (step 509). That is, the set EDP maximum value 1
Measure the area with EDP smaller than 0 / cm ² EDP
The map is examined to determine whether or not the area satisfies the set cut wafer diameter.

As shown in FIG. 4, since the use range is satisfied also in the relationship between the EDP and the outer diameter, the crystal is determined to be suitable for the use A, and the wafer cut-out outside the use A suitable for the use A is determined. The diameter plot signal is output to the plotter 4 (step 510).

When the plotter 4 receives the wafer cutting outer diameter plot signal, it determines the wafer cutting position of 50 mm diameter on the seed side wafer EDP map 9 and the tail side wafer EDP map 10 of the semiconductor crystal shown in FIG. .

When the instruction to select the application B is given in step 502, the measured resistivity is determined to satisfy the application range, but the carrier concentration does not satisfy the application range, and thus the characteristic It is determined that they do not match (NO in step 505), and a request to select another application is issued.

Similarly, in the case where the instruction to select the use C is given, since the crystal has a portion exceeding the use specific resistance range, it is determined that the characteristics do not match at this stage (step 503). NO), a request is made to select another application.

[0048]

According to the present invention, crystal characteristics, dislocation density,
Since the selection of the semiconductor wafer whose use is defined by the wafer outer shape is automated, a large amount of semiconductor crystals can be selected for the optimum use in a short time, and the work efficiency can be improved.

[Brief description of drawings]

FIG. 1 is a flow chart showing a processing flow of a selection program for explaining an embodiment of a semiconductor wafer automatic selection system of the present invention.

FIG. 2 is a schematic diagram showing the configuration of a semiconductor wafer automatic selection system according to the present embodiment.

FIG. 3 is an external view showing a cutout position of a wafer for which the characteristics of the semiconductor crystal according to the present embodiment are measured.

FIG. 4 is a diagram showing EPD maps of a seed side wafer and a tail side wafer according to the present embodiment.

FIG. 5 is a flowchart showing a processing flow of a selection program for explaining another embodiment of the semiconductor wafer automatic selection system of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 keyboard (input means) 2 display 3 storage device (storage means) 4 plotter (output means) 5 computer body (arithmetic control means) 6 seed side wafer 7 tail side wafer 8 intermediate crystal 9 seed side wafer EPD map 10 tail Side wafer EPD map 11 Wafer cutout outline

Claims (2)

[Claims] 1. The characteristics of a seed-side wafer and a tail-side wafer, which are cut out from a semiconductor crystal leaving an intermediate portion in advance, are measured, and an application of the intermediate portion of the semiconductor crystal is selected from the measured values to suit the application. A semiconductor wafer automatic selection system for determining a cutting position of a wafer as described above, comprising: input means, and crystal characteristic values of the seed side wafer and the tail side wafer of the semiconductor crystal, which are the measured values, from the input means. Storage means for storing the crystal characteristic value, the maximum dislocation density value, and the cut-out wafer diameter, which are set values determined for each purpose of the dislocation density maps of the crystal seed side wafer and the tail side wafer, and the storage means. From the above, the above-mentioned measured crystal characteristic value and the above-mentioned measured dislocation density map are referred to, and the set crystal characteristic value determined for the specified specific application among the applications of is searched for. When the measured crystal characteristic value and the set crystal characteristic value match, the maximum value of the set dislocation density and the set cut-out wafer diameter of the matched application are referred to, and when the measured dislocation density map with them matches, An automatic semiconductor wafer selection system comprising: arithmetic control means for outputting to the output means a wafer cutout contour plot signal suitable for the designated use; and output means for outputting a wafer cutout contour according to the wafer cutout contour plot signal. 2. The semiconductor wafer automatic selection system according to claim 1, wherein the crystal characteristic is specific resistance.