JPH0878269A - Production of insulated grain boundary semiconductor ceramic capacitor - Google Patents

Abstract

PURPOSE: To enhance the reliability by heat treating a specified ceramic material in a reductive atmosphere, shaping the ceramic material and firing in an oxygen atmosphere, and then forming an electrode thereby suppressing fluctuation in the varistor voltage. CONSTITUTION: A material where Sr in SrTiO3 or SrTiO3 is partially substituted by Ca, Mg or Ba is weighed 21 to prepare a first component. The first component is mixed, brushed 22 and then dried 23. First, second and third components are then weighed 24, mixed and dried 25 before being fired 26 in a reductive atmosphere and then crushed 27 and dried. Subsequently, a slurry is prepared 28 and a green sheet is formed 29 on a carrier film which is then dried and cut 30 into a predetermined size. Furthermore, a paste for inner electrode is printed 31 on the green sheet which is then laminated 32, pressed, cut 33 and degreased 34 to form an outer electrode 35. Finally, it is oxidized 36 again and plated 37 thus suppressing fluctuation in the variator voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a grain boundary for protecting semiconductor elements such as IC and LI and electronic circuits used therein from abnormal high voltage such as noise, pulse and static electricity generated in electronic equipment and electric equipment. The present invention relates to a method for manufacturing an insulating semiconductor ceramic capacitor.

[0002]

2. Description of the Related Art Japanese Unexamined Patent Publication No. 3-1516 discloses a grain boundary insulation type semiconductor ceramic capacitor and a method for manufacturing the same. FIG. 2 is a partially cutaway perspective view of the grain boundary insulation type semiconductor ceramic capacitor. Such a chip-type grain boundary insulation type semiconductor ceramic capacitor was obtained as follows.

First, as a starting material, the molar ratio of Sr _(1-x) Ba _x to Ti is 0.95 ≦ Sr _{(1-x )} Ba _x / Ti <1.
Sr _(1-x) B containing excess Ti so that
a _x TiO ₃ (provided that, 0 <x ≦ 0.3) in, Nb ₂ O _5,
Ta ₂ O ₅ , V ₂ O ₅ , W ₂ O ₅ , Dy ₂ O ₃ , Nd ₂ O ₃ , Y ₂
At least one of O ₃ , La ₂ O ₃ , and CoO ₂ is 0.05 to 2.0 mol%, and Mn and Si are M, respectively.
Converted to nO ₂ and SiO ₂ , total 0.2 to 5.0 mo
1% and a mixed powder containing NaAlO _{2 in an amount} of 0.05 to 4.0 mol% were prepared.

Next, this mixed powder is pulverized, mixed, dried, calcined in air or a nitrogen atmosphere, and then pulverized again and dispersed in a solvent together with an organic binder. Was formed.

Next, as shown in FIG. 3, the internal electrode paste is printed on the green sheet 1 so that one end reaches the edge (however, the green sheet 1 for the uppermost layer and the lowermost layer is printed. No), and then the printed green sheet 1 of this internal electrode 2
Was laminated, pressed, and pressure-bonded so that the internal electrodes 2 reached the opposite edges alternately, to obtain a molded body.

Next, after calcining the molded body in air,
It was fired in a reducing atmosphere or a nitrogen atmosphere and then reoxidized in air. Next, this was chamfered, and as shown in FIG. 2, external electrode paste was applied to both end surfaces where the internal electrodes 2 were exposed, and baked to form external electrodes 3. Finally, the surface of the external electrode 3 was plated with solder or the like.

[0007]

In the above structure, the laminated body is reduced and fired to be a semiconductor, but the reducing atmosphere is not sufficiently inside the laminated body, and therefore the reduced state of each particle is unsatisfactory. It became uniform and could not be made into a semiconductor uniformly. Therefore, when the varistor effect is generated by re-oxidizing the reduced particle surface (grain boundary) to give a resistance value, the degree of oxidation is not uniform, that is, the resistance value due to oxidation varies depending on the location. However, there is a problem that the varistor voltage varies.

It is an object of the present invention to provide a grain boundary insulation type semiconductor ceramic capacitor which has little variation in varistor voltage and is excellent in reliability.

[0009]

In order to achieve this object, the present invention provides a ceramic containing SrTiO ₃ or SrTiO ₃ in which a part of Sr is replaced by Ca, Mg, Ba and a mixture thereof. The material is heat treated in a reducing atmosphere, then the ceramic material is shaped and fired in an oxygen atmosphere before forming the electrodes.

[0010]

According to this method, the ceramic material is sufficiently reduced and fired in advance, and the reduced state of each particle is uniform, so that the layered product can be uniformly oxidized when reoxidized. As a result, the resistance value is stabilized, so that there is no variation in the varistor voltage.

[0011]

EXAMPLES An example of the present invention will be described below.

The same parts as in the prior art are designated by the same reference numerals. FIG. 1 is a manufacturing process diagram of a grain boundary insulation type semiconductor ceramic capacitor in the present embodiment.

First, SrTiO ₃ , CaCO ₃ , and BaCO
Sample Nos. 1 to 1 showing ₃ , ₃ , MgCo ₃ , and TiO ₂ in (Table 1)
Weigh each to a composition ratio of 6 (21), and
As an ingredient.

[0014]

[Table 1]

Next, each of the first components is put into a ball mill etc. for each sample No., and a zirconia boulder having excellent wear resistance is used for stirring and crushing, and a necessary amount of pure water is added. After mixing for 20 hours, pulverize (22) and dry (2
3) I did. At this time, the dry powder preferably has an average particle diameter of 1 μm or less.

Next, sample Nos. 1 to 1 of (Table 1) and (Table 2)
The first component and the second component are mixed so that the molar ratio shown in 16 is obtained.
The component and the third component were weighed (24), and the same treatment as in the case of the first component was performed to obtain a mixed dry powder (25).

[0017]

[Table 2]

Thereafter, at 1100 ° C., for example N ₂ : H ₂ =
It was baked in a reducing atmosphere of 10: 1 for 4 hours (26), pulverized again in a ball mill or the like for 75 hours (27), and dried.
The particle size of the powder at this time may be 1.0 μm or less. Further, at this time, as shown in FIG.
It can be seen that the most effective value is about 0.8 μm. Further, if the particle size is less than 0.6 μm, the varistor voltage, which is a basic characteristic, rises, while if it exceeds 1.0 μm, pores increase, oxidation progresses, and the varistor voltage rises. The number of particles existing in the area decreases, and the variation in varistor voltage increases.

Next, 2 for each sample No. with a ball mill etc.
The mixture was mixed for 0 hour, dried and then mixed with a butyral resin and an organic solvent such as butyl acetate to prepare a slurry (28). Using this slurry, a raw sheet 1 was formed on a polyester carrier film having a thickness of, for example, 50 μm by a doctor blade method (29), dried, and cut into a predetermined size (30).

Next, on the green sheet 1 other than the uppermost layer and the lowermost layer of the laminate, the internal electrode paste made of Ag-Pd was screen-printed so that one end reaches the edge (3).
1). After that, as shown in FIG. 3, for example, 30 layers of the green sheet 1 are laminated so that the internal electrode paste alternately reaches the opposite edges (32), and after pressurization and pressure bonding, a predetermined size is obtained. Cut (33). Next, degreasing was sufficiently carried out at 600 ° C. in air (34), and the internal electrodes 2 were exposed to both end faces as shown in FIG.
The external electrode paste made of Ag-Pd was applied as shown in FIG. Spread this evenly over the metal sheath net,
200-400 ° C / in an oxidizing atmosphere using an oxidizing furnace
Reheat by heating at 850 h and baking at 850 ° C for 1 hour (36)
Then, the external electrode 3 was formed (35).

After that, Ni plating was performed on the external electrodes 3 by, for example, an electrolytic plating method, and then solder plating was performed (37).

The grain boundary insulating type semiconductor monolithic ceramic capacitor thus obtained has a size generally called 3216.

The ceramic material is calcined in an oxygen atmosphere for reaction, and then finely pulverized to a particle size of 0.6 to 1.0 μm, and then fired in a reducing atmosphere to produce a raw material. After forming the sheet 1, a grain boundary insulating semiconductor ceramic capacitor may be formed in the same manner as above.

The grain boundary insulation type semiconductor ceramic capacitor thus obtained has no varistor voltage variation because each grain is uniformly oxidized.

In the present embodiment, the laminated type has been described, but it is considered that the same effect can be obtained even if it is a disc type.

Although Ag-Pd is used as the material for the internal electrode 2 and the external electrode 3, Ag, Pd, Pt, Ni, C are used.
One or more metals, alloys or oxides of u, Zn, In, Ga, Na, K and Li may be used.

Further, the type of plating of the external electrode 3 is shown only for some metals, but any type of metal plating may be used, and the forming method thereof may be acid plating, basic plating, electrolytic plating. , Electroless plating is also acceptable.

Further, the external electrode 3 may not be solder-plated as long as it is a material that is not eaten by the external electrode when soldering the grain boundary insulation type laminated semiconductor ceramic capacitor.

[0029]

As described above, according to the present invention, it is possible to obtain a grain boundary insulation type laminated semiconductor ceramic capacitor having a small variation in varistor voltage.

Further, since the present invention is easy in terms of process, the practical effect is extremely large.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of a grain boundary insulating type multilayer semiconductor ceramic capacitor according to an embodiment of the present invention.

FIG. 2 is a partially cutaway perspective view of an example of the present invention and a conventional grain boundary insulating type laminated semiconductor ceramic capacitor.

FIG. 3 is an exploded perspective view of an example of the present invention and a conventional laminated body.

FIG. 4 is a diagram showing the relationship between the particle size of the ceramic reduced powder and the varistor voltage in one example of the present invention.

[Explanation of symbols]

 1 Raw sheet 2 Internal electrode 3 External electrode

Claims (6)

[Claims] 1. A ceramic material containing SrTiO ₃ or SrTiO ₃ in which a part of Sr is replaced by Ca, Mg, Ba and a mixture thereof as a main component is heat-treated in a reducing atmosphere, and then the ceramic material is used. A method for manufacturing a grain boundary insulation type semiconductor ceramic capacitor, which comprises molding and firing in an oxygen atmosphere to form electrodes. 2. A ceramic material containing SrTiO ₃ or SrTiO ₃ in which a part of Sr is replaced by Ca, Mg, Ba and a mixture thereof as a main component is heat-treated in a reducing atmosphere, and then this ceramic material is used. Has an average particle size of 0.
A method for manufacturing a grain boundary insulation type semiconductor ceramic capacitor, which comprises finely pulverizing to 6 to 1.0 μm, molding, and then firing in an oxidizing atmosphere to form electrodes. 3. SrTiO ₃ or SrTiO ₃ in which a part of Sr is replaced by Ca, Mg, Ba and a ceramic material containing a mixture thereof as a main component are calcined in an oxygen atmosphere to react, A method for manufacturing a grain boundary insulation type semiconductor ceramic capacitor, wherein the ceramic material is heat-treated in a reducing atmosphere, molded, and fired in an oxidizing atmosphere to form electrodes. 4. A ceramic material containing SrTiO ₃ or SrTiO ₃ in which a part of Sr is substituted with Ca, Mg, Ba and a mixture thereof as a main component is heat-treated in a reducing atmosphere, and then the ceramic material is added. After forming a green sheet using, the internal electrodes are formed on the green sheet, and then a plurality of the green sheets are laminated so that the internal electrodes are exposed at opposite end surfaces to form a laminate. And an external electrode is formed on the end face of the laminate, and a method for manufacturing a grain boundary insulation type semiconductor ceramic capacitor. 5. An average particle size of SrTiO ₃ or SrTiO ₃ in which a part of Sr is replaced by Ca, Mg, Ba and a ceramic material containing a mixture thereof as a main component are heat-treated in a reducing atmosphere and have an average particle size of 0. .6 to 1.0 μm, then a green sheet is formed using the ceramic material, and then internal electrodes are formed on the green sheet. Grain boundary insulation type semiconductor ceramic capacitor in which internal electrodes are laminated so as to be exposed at opposite end faces to form a laminated body, which is fired in an oxygen atmosphere, and then external electrodes are formed at the end faces of the laminated body. Manufacturing method. 6. A ceramic material containing SrTiO ₃ or SrTiO ₃ in which a part of Sr is replaced by Ca, Mg, Ba and a mixture of these as a main component are calcined and reacted in an oxygen atmosphere, and then, After heat-treating the ceramic material in a reducing atmosphere, forming a green sheet, forming internal electrodes on the green sheet, and then exposing the plurality of green sheets to end faces where the internal electrodes face each other. A method for manufacturing a grain boundary insulation type semiconductor ceramic capacitor, comprising forming a laminated body by laminating, firing in an oxygen atmosphere, and then forming an external electrode on the end face of the laminated body.