JPH0877244A - Device and method for editing terminal information - Google Patents

Abstract

PURPOSE: To provide the terminal information editing device and terminal information editing method which does not require many man-hours by eliminating misinput in editing operation for terminal information in the designing process of a logic circuit. CONSTITUTION: This device is provided with an extracting means 1c which extracts the terminal information regarding a terminal from design information generated in the designing process of the logic circuit and an editing means 1d which edits the extracted terminal information.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a terminal information editing apparatus and a terminal information editing method capable of editing external terminal information in LSI (Large Scale Integrated Circuit) and PCB (Printed Circuit Board) designs.

[0002]

An LSI or the like generally goes through the following design process. That is, a logic circuit diagram is created based on the specifications of the LSI, a netlist is created from the logic circuit diagram, and it is simulated whether the LSI shown in the logic circuit diagram performs a desired operation based on the netlist. Create a test pattern for If the simulation is good, layout design is performed. For example, when inspecting a chip, the above-mentioned database of terminal information can be used to determine to which channel of the LSI tester each pad of the chip should be connected. After being sealed
At the time of product inspection, it is convenient to carry out the inspection if there is a database of the above-mentioned terminal information in order to determine in which socket each lead terminal should be inserted. In addition, conventionally, as a drawing for submission when designing a package logic circuit,
The designer used a writing tool to create and edit the package terminal table that collects the connection information of the connector pins of the package. To solve this problem, a package terminal table data creating device has been proposed. However, in the conventional logic circuit design and creation of package terminal table data, when editing the above-mentioned terminal information and connection information, the operator uses a terminal information editing device (editor) to input the terminal name and other information. I was performing an input operation.

Therefore, when the terminal information is edited, the external terminal name, the input / output direction, the I / O cell name, the bus information, etc., relating to the external terminal are added to the already designed design data including the netlist, schematic and HDL. Even though there is information, the terminal name and other information were input again from the beginning by the terminal information editing device etc., and the terminal information was edited, so an input error occurred or the above-mentioned editing required man-hours. There was a problem. Further, in the above-mentioned conventional terminal information editing device, the order of displaying the terminal information is fixed, and the operator cannot select the order or the terminal information to be displayed, and the terminal information is edited. At this time, since the package is not displayed on the screen, it was necessary to confirm the terminal position by referring to the document etc. separately. Further, in the logic circuit design, when the test pattern is created, the information about the external terminal, that is, the external terminal name, the input / output direction, the bus information and the like are input to the waveform editing device each time, so There were mistakes and it took time. Also, in the case of automatic placement and wiring in logic circuit design, information about external terminals, that is, external terminal names, input / output directions, I / O cell names, terminal positions, and other necessary information should be created with an editor or the like. Or, since only the terminals were manually placed on the automatic placement and routing software at arbitrary positions, an input error occurred and it took a lot of man-hours. In addition, conventionally, since the created logic circuit design data, package terminal table data, and the like were visually confirmed, an error occurred and it took a lot of man-hours. The present invention has been made to solve such a problem, and an object of the present invention is to provide a terminal information editing device and a terminal information editing method that eliminate input errors and do not require man-hours.

[0004]

A terminal information editing apparatus of the present invention is a first extracting means for extracting information about an external terminal from design data including a netlist, schematic and HDL created in a design process of a logic circuit. And a first editing means for editing the extracted information about the external terminal.

With this configuration, the first extracting means extracts the information about the external terminals from the design data,
Since the editing means edits the extracted information about the external terminals, the first extracting means and the first editing means automatically edit the information about the external terminals to prevent an input error from occurring and to save the man-hours for creating the terminal information. It works so as not to require.

Further, the terminal information editing device of the present invention provides information on the external terminal extracted by the first extracting means or each terminal of each I / O cell extracted by the second extracting means. The necessary information is supplied and the information about the external terminals supplied or the information necessary for each terminal of each I / O cell is created as waveform information or placement / wiring information in a format that can be read by a waveform editing device or an automatic placement / wiring device. It is also possible to provide a third editing means for sending out.

Further, the terminal information editing apparatus of the present invention provides information on the external terminal extracted by the first extracting means or each terminal of each I / O cell extracted by the second extracting means. Necessary information is supplied and information regarding the external terminal is supplied, whether or not there is a contradiction between the design data and the test pattern, or information necessary for each terminal of each I / O cell, and the I / O cell. It is also possible to provide a verification means for verifying whether or not there is a contradiction with the library describing the information.

Further, the terminal information editing method of the present invention includes a first extraction step of extracting information about external terminals from design data including a netlist, schematic and HDL created in a logic circuit design step. And a first editing step of editing information on the external terminal.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION

First Embodiment; A terminal information editing apparatus and a terminal information editing method according to a first embodiment of the present invention will be described below with reference to the drawings. The operation of the terminal information editing apparatus according to the present embodiment executes one embodiment of the terminal information editing method of the present invention. As shown in FIG. 1, the terminal information editing device in this embodiment includes a control device 1, an input device 2, a display device 3, and a storage device 4. The controller 1 includes
ROM (read only memory) 1a for storing an operation control program of the terminal information editing device and data necessary for executing the control program, RAM (random access memory) 1 specified as a work area 1
b, extraction means 1 for extracting, for example, information on external terminals from design data or the like, which will be described later, stored in the storage device 4.
c and an editing unit 1d that edits information about the external terminal extracted by the extracting unit 1c. The extracting means 1c includes a first extracting means 1c-1 and a second extracting means 1c-2, and the editing means 1d has a first editing means 1d.
-1 and the second editing means 1d-2. As described above, the information about the external terminal is the external terminal name,
Information such as input / output direction, I / O cell name, and bus information.

The display device 3 is, for example, a CRT display for displaying the progress and the execution result of the control program during execution. The input device 2 is composed of a keyboard and a mouse, and is used for designating display contents displayed on the display device 3 and additionally writing to the display contents. The storage device 4 is composed of, for example, a hard disk, and is design data obtained in each step of designing a logic circuit as described above, design data including a netlist, schematic and HDL,
The test pattern and various pieces of information regarding the I / O cell created in advance are stored. Furthermore, the storage device 4 also stores, for example, information about the external terminals extracted by the control device 1. Note that the design data means information including logic circuit diagram information as shown in FIG. 3, netlist information created from the logic circuit diagram information, schematic and HDL information. The information about the I / O cell is shown in FIG.
The I / O cell name, number, and I / O
Information such as the level of the signal output from the cell, that is, the H (high) level or the L (low) level is applicable. The control device 1, the input device 2, the display device 3, and the storage device 4 are connected to each other via a bus 5.

The operation of the terminal information editing apparatus having the above structure will be described below. As described above, it is assumed that the storage device 4 stores in advance the design data created in each design step of the logic circuit, the test pattern, and the information about the I / O cell. In step (indicated by S in the figure) 1 shown in FIG. 2, the terminal information editing device is activated. In step 2, each information such as design data stored in the storage device 4 is read from the storage device 4 by the control device 1. In addition, step 2
1, 22, 23 are included, and from the storage device 4, step 2
In 1, the design data is read, in step 22, the test pattern is read, and in step 23, information about the I / O cell is read.

In step 3, the control device 1 extracts terminal information, which is necessary information about terminals, from each information read in step 2. The step 3 includes steps 31, 32 and 33. In the step 31, the first extracting means 1c-1 of the extracting means 1c extracts the information about the external terminal from the design data read in the step 21, and the step 32 Then, the information about the external terminal is extracted from the test pattern read at step 22 by the first extracting means 1c-1. At step 33, the information about the I / O cell is read from the information about the I / O cell read at step 23.
The required information is extracted for each terminal of the cell. The above-mentioned information about the external terminal means an external terminal name, a signal input / output direction at the external terminal, an I / O cell name, bus information, and the like. Since the first extracting means 1c-1 can also extract the I / O cell name in steps 31 and 32, the I / O cell name information extracted in steps 31 and 32 is used as information regarding the I / O cell. Can be used in step 33. In this case, I / O at step 33
The second extraction means 1c-2 extracts the information required for the terminal based on the cell name.

In step 4, the package input by the operator using the first editing means 1d-1 of the editing means 1d with respect to the information relating to the external terminals extracted in step 31, for example, in the control device 1. The pin number and the pad number are edited and the result is visually displayed on the display screen of the display device 3 via the bus 5. On the display screen, the contents as shown in FIG. 4 are displayed as an initial screen. For example, regarding the information about the external terminals extracted in step 31, as shown in FIG. 5, the name of each terminal and the I / O direction ,
The I / O cell name and the like are displayed, and in step 4, the first editing means 1d-1 is used to edit the pin number and pad number of the package input by the operator. Similarly, for the information about the external terminals extracted in step 32, the name of each terminal, the direction of I / O, the bus name, etc. are displayed as shown in FIG. 6, and in step 4, the first editing means 1d-
1 is used to edit the pin number and pad number of the package input by the operator. Similarly, step 33
Information about the I / O cells extracted in
In addition to the name of each terminal, I / O direction, and I / O cell name, information held by each I / O cell is also displayed as shown in FIG. 3, and in step 4, the second editing means 1d of the editing means 1d is displayed. −
2 is used to edit the pin number and pad number of the package input by the operator. The respective terminal information edited in step 4 is stored in the storage device 4 by the control device 1 in step 5. Incidentally, FIG.
The display contents shown in FIG. 7 are examples, and the present invention is not limited to these.

The first editing means 1d-1 can also rearrange the arrangement of, for example, "information 1", "information 2", ... In the initial screen shown in FIG. In order to perform such rearrangement, for example, "Information 1" is displayed on another screen displayed as shown in FIG.
It is executed by rearranging the labels 10 of "information 2", ... As "information 5", "information 4", .... Accordingly, for example, as shown in FIG. 10, information “16”, “17”, ... Displayed for each terminal name in the “Information 1” column.
Are rearranged by the above rearrangement as shown in FIG. Furthermore, the first editing means 1d-1 is a label on the initial screen, for example, "information 1",
It is also possible to display only the label 10 of "Information 2", .... In order to perform such selection display, the operator wants to display the label 1 on another screen displayed as shown in FIG.
It is executed by selecting 0. That is, when the operator selects, for example, "setting 2" shown in FIG. 12, the label 10 displayed on the display screen is "information 1", "information 3", and "information 5" as shown in FIG. , "Information N" only. It should be noted that, in the above-mentioned "sorting" and "selection" operations, the label layout was changed and selected on the separate screen, but the present invention is not limited to this, and the labels on the display screen can be directly sorted or selected. You may choose to do so. In addition, the first
The editing unit 1d-1 can also combine both the operations of "sorting" and "selecting". Further, the edited information can be stored as the display information 4e in the storage device 4 by the control device 1, and these settings can be used when the editing device is activated next time.

Furthermore, the control device 1 can read the package graphic information in the storage device 4 and display the picture of the package 11, the package terminal name, and the package terminal number as shown in FIG. Also, the package 1
In FIG. 1, the terminal name set by the operator using the above-mentioned editing device and the terminal number of the package are also displayed. Furthermore, the editing device allows the operator to
By specifying the terminal number of the package or the set terminal name, the terminal position of the specified package can be highlighted so that the operator can easily find the specified terminal. In FIG. 14, the package terminal name is “D4”, the package terminal number is “19”, or the terminal name is “IN4”.
The pin position of the package is highlighted by specifying. In addition, the terminals displayed in the above package diagram can also be highlighted by selecting the terminals specified by the set terminal names and terminal numbers on the screens shown in FIGS. 4 to 7. You can

According to the terminal information editing apparatus of this embodiment,
When editing the terminal information, the terminal information, which is information about the terminal such as external terminal name, input / output direction, I / O cell name, and bus information, is extracted from the design data and test patterns that have already been designed in the logic circuit design process. Since the extracted terminal information is edited and displayed, an input error can be prevented and the design efficiency of the logic circuit can be improved.

Further, since the edited terminal information is stored in the memory device 4, for example, after the chip is resin-sealed in the package, each lead terminal can be inserted into any socket at the time of product inspection. It is possible to easily judge whether it is good or not and improve the inspection efficiency.

In circuit design, terminal information is edited,
When displaying, the order in which the terminal information is displayed is rearranged in an easy-to-reference order, or only the specified information is displayed, so when using the same circuit in multiple steps or by multiple people, the necessary information Can be freely set in each step or by the user, and the development efficiency of the circuit design can be improved. Further, since the package graphic information and the terminal name in the package are also displayed on the screen and the display method of the designated terminal is changed, it is not necessary to refer to the package document and the like, and the development efficiency can be improved. it can.

Second Embodiment: A terminal information editing apparatus and a terminal information editing method according to a second embodiment of the present invention will be described below with reference to the drawings. The operation of the terminal information editing apparatus according to the present embodiment executes one embodiment of the terminal information editing method of the present invention. Further, in the second embodiment, the same components as those shown in the drawings used in the first embodiment described above are designated by the same reference numerals, and the description thereof will be omitted. The control device 20 in the terminal information editing device in the second embodiment includes a third editing means 21 and a verification means 22 in addition to the constituent parts of the control device 1 in the first embodiment. The operation of the terminal information editing apparatus of the second embodiment configured as above will be described below.

The operation of the third editing means 21 will be described below with reference to FIG. Incidentally, in FIG. 16, steps 1, 2,
Steps 21, 23, 3, 31, and 33 are the same as the steps shown in FIG. 2, and the description thereof will be omitted. In step 41, the third editing means 21 has the information about the external terminals extracted by the first extracting means 1c-1 described in the first embodiment or the second extracting means described in the first embodiment. 1c-
Necessary information is supplied to each terminal of each I / O cell extracted in 2. In step 41, the third editing means 21
Information about the supplied external terminals or each I / O
The information required for each terminal of the cell is converted into respective formats that can be read by various waveform editing devices or automatic placement and routing devices, created as waveform information or placement and routing information, and sent out. The operation of the third editing means 21 will be described more specifically below. The operation control program is stored in the ROM 1a as described in the first embodiment.
In the embodiment, the operation control program converts information about the external terminals or information required for each terminal of each I / O cell into a format compatible with various waveform editing devices or automatic placement and routing devices. Programming is done. Based on the program, the third editing means 21 follows the format specified by the operator so as to correspond to the format, and the first extracting means 1c-
The information about the external terminal extracted at 1 or the information necessary for each terminal of each I / O cell extracted at the second extracting means 1c-2 is converted. Further, when supplying information concerning the external terminals or information necessary for each terminal of each I / O cell to the waveform editing apparatus, the operator inputs an input waveform or Input output waveform or input / output waveform. Then, based on these pieces of information, the third editing means 21 determines the waveform at a certain terminal supplied by the operator,
An editing operation is performed to correspond to the converted information at the terminals, and waveform information with the converted information in each of the formats is output for each terminal. Further, when the above information is supplied to the automatic placement and routing apparatus, the third editing means 21 further adds, for example, L to the above information.
After editing the terminal number (pad number) of the SI package, the terminal name, the terminal position, and other necessary information are sent as placement and routing information in a format that can be read by the automatic placement and routing apparatus. In step 51, the waveform information or the layout and wiring information is stored in the storage device 40.

The verification means 22 includes information about the external terminals extracted by the first extraction means 1c-1 described in the first embodiment or the second extraction means 1 described in the first embodiment.
The required information is supplied to each terminal of each I / O cell extracted in c-2. The verification means 22 determines whether or not the supplied information about the external terminals is inconsistent with the design data and the test pattern stored in the storage device 40, or information necessary for each terminal of each I / O cell. And the library in which the information regarding the I / O cell is described is inconsistent. The operation of the verification means 22 will be described with reference to FIG. Incidentally, in FIG. 17, steps 1, 2, 21, 22,
23, 3, 31, 32, and 33 are the same as the steps shown in FIG. 2, and the description thereof will be omitted.

For example, when the verification means 22 verifies the information about the external terminals and the design data, that is, the circuit diagram, the netlist, and the HDL, the external terminal information and the design data are sent to the verification means 22 in step 45. Supplied. Specifically, the verification unit 22 determines whether the I / O direction matches the terminal name of the supplied external terminal information, whether the terminal names exist in both directions without excess or deficiency, or the bus information matches. Check such as doing. For example, if the direction of IO of "IN1" of the terminal name shown in FIG. 5 is "OUT", I of "IN1" is displayed in the schematic of FIG.
Since the O direction is "IN", it is inconsistent. Also, if a certain terminal name exists only in either one of FIG. 3 and FIG. 5, a contradiction will occur. Further, in verifying whether or not the bus information matches, FIG. 3 and FIG.
When the same terminals indicated by and belong to the bus, it also verifies whether the buses to which they belong are the same.

When the verification means 22 verifies the information on the external terminal and the test pattern, the external terminal information and the test pattern are verified in step 45.
2 is supplied. Specifically, the verification unit 22 checks whether the IO direction matches the terminal name, whether the terminal names exist in both directions without excess or deficiency, or whether the bus information matches. For example, it is assumed that the IO direction of “IN1” shown in FIG. 6 is “OUT”. However, in the test pattern, the direction of IO of "IN1" is "IN".
If it is, it will be a contradiction. Also, if a certain terminal name exists only in either one of FIG. 6 or the test pattern, a contradiction will occur. When verifying whether the bus information matches, when the same terminals shown in FIG. 6 and the test pattern belong to the bus, it is also verified whether the buses to which they belong are the same.

When the verification means 22 verifies the information required for each terminal of each I / O cell and the library in which the information regarding the I / O cell is described, each I / O cell is checked in step 45. The information necessary for each terminal and the information about the I / O cell are supplied to the verification means 22. For example, "information 1" in "IN1" shown in FIG. 7 is "type1".
If it is "B", in the library that describes the information about the I / O cell in FIG.
Since it is e1A ″, it is inconsistent. In this way, the verification unit 22 verifies all the terminals from the information 1 to the information N. In step 45, the verification unit 22.
After the above-described various verifications performed by the above are completed, those verification results are stored in the storage device 40 as verification information in step 55.

As described above, according to the editing apparatus of the second embodiment, when the test pattern is edited by the waveform editing apparatus, information about the external terminals, that is, the external terminal name, the input / output direction, the I / O cell name, Also, since the bus information and the like set by the editing device can be used, an input error to the waveform editing device can be prevented and the development efficiency can be improved. Also, when automatically placing and wiring,
Since information such as I / O direction and bus information set in the editing device of the second embodiment can be used, an input error to the automatic placement and routing device can be prevented and the development efficiency can be improved. it can. Further, according to the editing device of the second embodiment, by verifying whether or not the data edited by the editing device of the first embodiment and the design data (circuit diagram, netlist, HDL) are consistent. It is possible to prevent the verification error and the verification omission, and improve the development efficiency. Further, according to the editing device of the second embodiment,
By verifying whether or not there is a contradiction between the data edited by the editing device of the first embodiment and the test pattern, it is possible to prevent a verification error and a verification omission, and improve the development efficiency. Further, according to the editing device of the second embodiment, it is verified whether or not there is a contradiction between the information regarding the I / O cell edited by the editing device according to the first embodiment and the library describing the information regarding the I / O cell. By doing so, it is possible to prevent a verification error and a verification omission and improve the development efficiency.

[0026]

As described above in detail, according to the present invention, the first extracting means extracts the information about the external terminals from the design data, and the first editing means edits the extracted information about the external terminals. By doing so, it is possible to automatically edit the information regarding the external terminals and prevent the occurrence of input errors, and it is possible to create the terminal information without requiring man-hours.

Further, in the editing operation in the terminal information editing apparatus of the present invention, the terminal information and the information necessary for each terminal of the I / O cell are rearranged, or only the specified information is displayed or specified according to the instruction of the operator. Since the display method of information can be changed, it is possible to prevent an input error and to create terminal information and the like without requiring man-hours.

Also, since the third editing means can be provided, the external terminal information extracted by the first extracting means or the information necessary for each terminal of the I / O cell extracted by the second extracting means can be provided. It is possible to change to a format that can be read by the waveform editing device or the automatic placement and routing device, prevent an input error from occurring, and create terminal information and the like without requiring man-hours.

Further, since the verification means can be provided, whether or not there is a contradiction between the external terminal information extracted by the first extraction means and the design data or the test pattern, or the second
It is possible to verify whether or not there is a contradiction between the information necessary for each terminal of the I / O cell extracted by the extraction means and the library in which the information related to the I / O cell is described, and it is possible to prevent a verification error and a verification omission. Can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a terminal information editing device according to a first embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of the terminal information editing apparatus shown in FIG. 1, which is a terminal information editing method according to an embodiment of the present invention.

FIG. 3 is a diagram showing logic circuit diagram information in the design data processed by the terminal information editing device shown in FIG.

FIG. 4 is a diagram showing an example of contents displayed on a display device shown in the terminal information editing device shown in FIG.

5 is a diagram showing an example of a case where terminal information extracted based on design data by the terminal information editing device shown in FIG. 1 is displayed on the display device shown in FIG.

6 is a diagram showing an example of a case where terminal information extracted based on a test pattern by the terminal information editing device shown in FIG. 1 is displayed on the display device shown in FIG.

7 is a diagram showing an example of a case where the terminal information extracted by the terminal information editing device shown in FIG. 1 based on information about I / O cells is displayed on the display device shown in FIG.

8 is a diagram showing an example of information about I / O cells processed by the terminal information editing device shown in FIG.

9 is a diagram showing a screen display for instructing the rearrangement of labels in the terminal information editing device shown in FIG.

10 is a diagram showing an example of contents displayed on the display device shown in FIG. 1, showing a state before rearrangement of labels.

FIG. 11 is a diagram showing a state in which the labels shown in FIG. 10 are rearranged.

12 is a diagram showing a screen display for selecting a label to be displayed on the display device in the terminal information editing device shown in FIG.

FIG. 13 is a diagram showing an example of contents displayed on the display device shown in FIG. 1, showing a state in which only the selected label is displayed.

14 is a diagram showing a state in which package graphic information is displayed on the screen in the terminal information editing device shown in FIG.

FIG. 15 is a block diagram showing a configuration of a terminal information editing device according to a second embodiment of the present invention.

16 is a flowchart showing the operation of the third editing means provided in the terminal information editing device shown in FIG.

17 is a flowchart showing the operation of the verification means provided in the terminal information editing device shown in FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Control device, 1c ... Extraction means, 1c-1 ... 1st extraction means, 1c-2 ... 2nd extraction means, 1d ... Editing means, 1d-
DESCRIPTION OF SYMBOLS 1 ... 1st edit means, 1d-2 ... 2nd edit means, 2 ... Input device, 3 ... Display device, 4 ... Storage device, 20 ... Control device,
21 ... Third editing means, 22 ... Verification means, 40 ... Storage device.

Claims (10)

[Claims] 1. A first extracting means for extracting information about an external terminal from design data including a netlist, schematic and HDL created in a logic circuit design process, and editing the extracted information about the external terminal. First to do
A terminal information editing device comprising: an editing unit. 2. The terminal information editing apparatus according to claim 1, wherein the first extracting means extracts information about the external terminal from a test pattern created in a logic circuit designing process instead of the design data. 3. A second extracting means for extracting information necessary for each terminal of each I / O cell from the information about the I / O cell based on the I / O cell name information among the extracted information about the external terminals. 3. The terminal information editing apparatus according to claim 1, further comprising: a second editing unit that edits the extracted information necessary for each terminal for each I / O cell name information. 4. The operator's instruction is to edit the information relating to the external terminal in the first editing means or to edit the information necessary for each terminal of each I / O cell in the second editing means. The terminal information according to any one of claims 1 to 3, which is at least one of a rearrangement according to (1), a display of only specified information, a change of a display method of only specified information, and a plurality of settings of a combination of specified information. Editing device. 5. The terminal name of the package is edited by the editing of the information on the external terminals in the first editing means or the editing of the information necessary for each terminal of each I / O cell in the second editing means. 4. A package diagram display with the terminal positions thereof shown.
The terminal information editing device according to any one of 1. 6. The specified terminal information is used for the editing of the information on the external terminal in the first editing means or the editing of the information required for each terminal of each I / O cell in the second editing means. 6. The terminal information editing device according to claim 5, wherein is highlighted in the package diagram. 7. The information concerning the external terminal extracted by the first extracting means or the necessary information is supplied and supplied to each terminal of each I / O cell extracted by the second extracting means. A third editing means is provided for creating and transmitting information regarding the external terminal or information required for each terminal of each I / O cell as waveform information or placement / wiring information in a format readable by a waveform editing device or an automatic placement / wiring device. Was
The terminal information editing device according to claim 1. 8. The information concerning the external terminal extracted by the first extracting means or the necessary information is supplied and supplied to each terminal of each I / O cell extracted by the second extracting means. Whether there is a contradiction between the information on the external terminal and the design data or the test pattern, or the I
8. The terminal information edit according to claim 1, further comprising a verification means for verifying whether or not there is a contradiction between information necessary for each terminal of the / O cell and a library describing information regarding the I / O cell. apparatus. 9. The terminal according to claim 1, further comprising a storage unit that stores the edited result edited by the first editing unit, the second editing unit, or the third editing unit. Information editing device. 10. A first extracting step of extracting information about an external terminal from design data including a netlist, a schematic and HDL created in a logic circuit designing step, and editing the extracted information about the external terminal. First to do
A terminal information editing method comprising: an editing step.