JPH0875889A - Criticality alarming apparatus - Google Patents

Abstract

PURPOSE: To improve the safety by detect delayed critical phenomenon by sending an output of a delayed critical alarm when 1/3 abnormality is continuous ly detected and 2/3 abnormality is detected for a prescribed period or more while keeping early critical phenomenon detection function. CONSTITUTION: A 1/3 abnormality continuously monitoring circuit 21 monitors whether 1/3 abnormality detected by one of radiation detector among three radiation detectors 1a-1c continues or not. A 2/3 abnormality continuously monitoring circuit 22 monitors whether 2/3 abnormality detected by two radiation detectors among three radiation detectors continus for a prescribed period or more. When the 1/3 abnormality continuously monitoring circuit monitors that the 1/3 abnormality is proceeding and at the same time, the 2/3 abnormality continuously monitoring circuit monitors that the 2/3 abnormality continues for the prescribed period or more, a critical alarm output circuit 23 sends an output of a delayed critical alarm.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a criticality warning device capable of outputting a criticality warning of early criticality, and in particular, a 1/3 abnormality is continuously detected, and a 2/3 abnormality is detected for a predetermined time or longer. The present invention relates to a criticality warning device that can output a criticality warning of late criticality when detected and improve safety.

[0002]

2. Description of the Related Art Generally, in a facility for handling nuclear fuel material,
In order to prevent a criticality accident, a criticality warning device that detects a criticality and outputs a criticality warning is widely used. FIG. 6 is a circuit block diagram showing the configuration of this type of criticality warning device.
FIG. 7 is a circuit diagram showing the configuration of this criticality warning device. In this criticality warning device, three radiation detectors 1a to 1c arranged in the field are connected to a 2/3 logic module, respectively. Here, each radiation detector has a scintillator, an amplifier, and a trip circuit (not shown). The scintillator detects radiation, the amplifier amplifies this detection signal, and the trip circuit outputs a predetermined trip level of the amplified signal. The excess amplified signal component is sent to the 2/3 logic module as a logic level.

In the 2/3 logic module, the logic level received from each of the radiation detectors 1a to 1c is the hold circuit 2.
It is held by a to 2c and can be individually trip-displayed by the indicator lights 3a to 3c. In the 2/3 logic module, the logic levels received from the radiation detectors 1a to 1c are individually held by the three hold circuits 5a to 5c with the reset line 4, and the 1/3 abnormality detection circuits 6 and 2/3 are respectively held. It is supplied to the fail / criticality warning output circuit 8 via the abnormality detection circuit 7 individually.

Here, the 1/3 abnormality detection circuit 6 fails the logic level (1/3 abnormality) when at least one of the three hold circuits 5a to 5c outputs a logic level. It is sent to the critical warning output circuit 8, and the OR circuit 9 is used here.

On the other hand, the 2/3 abnormality detection circuit 7 fails the logic level (2/3 abnormality) when any two of the three hold circuits 5a to 5c output a logic level. It is sent to the critical warning output circuit 8. Here, three hold circuits 5a
5c are connected to the AND circuits 11a to 11c through the three OR circuits 10a to 10c, respectively, and the remaining 3 outputs are set to 3 sets. AND circuits 11a to 11c corresponding to
The outputs of the AND circuits 11a to 11c are connected to the fail / criticality warning output circuit 8 via the OR circuit 12.
Has been output to.

The fail / criticality warning output circuit 8 is 1/3
When the logic level is received from the abnormality detection circuit 6 within 0.5 seconds, the critical alarm is output when the logic level is received from the 2/3 abnormality detection circuit 7, and the 2/3 abnormality is detected within 0.5 seconds. If the logic level is not received from the circuit 7, the fail indicator lamp 13 is turned on. Specifically, the output of the 1/3 abnormality detection circuit 6 is given to the inverting circuit 15 and the AND circuit 16 on the criticality warning side via the hold timer 14, and the output of the 1/3 abnormality detection circuit 6 is held. Is supplied to the AND circuit 18 on the fail side. The hold timer 14 holds the output of the 1/3 abnormality detection circuit 6 for 0.5 seconds, and when 0.5 seconds has elapsed, each hold circuit 5a is reset via the reset line 4.
~ 5c is continuously reset. Further, the output of the inverting circuit 15 is given to the AND circuit 18 on the fail side. On the other hand, the output of the 2/3 abnormality detection circuit 12 is given to the critical warning side AND circuit 16. AN on the criticality warning side
The output of the D circuit 16 is output as a critical alarm through the hold circuit 19, and is also supplied from the hold circuit 19 to the AND circuit 18 on the fail side through the inversion circuit 20.

Next, the operation of such a criticality warning device will be described with reference to FIG.
Will be explained. Now the first radiation detector 1a
Assume that a critical event is detected at the analog level as shown in FIG. 8A and the logic level is sent to the 2/3 logic module as shown in FIG. 8B. In the 2/3 logic module, the logic level is held by the hold circuit 5a as shown in FIG.
It is given to the hold timer 14 through the 1/3 abnormality detection circuit 6. As shown in FIG. 8G, the hold timer 14 holds this logic level for 0.5 seconds and outputs it to the AND circuit 16 on the critical warning side.

Subsequently, the second radiation detector 1b detects a critical event at an analog level as shown in FIG. 8 (c), and as shown in FIG.
It is assumed that the data is sent to three logic modules. In the 2/3 logic module, as shown in FIG. 8F, the logic level is held by the hold circuit 5b. The 2/3 abnormality detection circuit 7 outputs the logic level to the AND circuit 16 on the critical alarm side because the logic level is held by the two hold circuits 5a and 5b.

The AND circuit 16 on the criticality warning side receives 2 when the logic level is received from the hold timer 14.
Upon receiving the logic level from the / 3 abnormality detection circuit 7, a critical alarm is output as shown in FIG.
When the second radiation detector 1b does not detect a critical event during the hold time of 0.5 seconds by the hold timer 14, the hold timer 1 is set after this hold time.
Since the output of 4 becomes "0", the AN on the fail side
A fail signal is output from the D circuit 18 and the fail indicator lamp 13 is turned on to prevent a false alarm due to a failure of one radiation detector 1a or noise.

[0010]

However, as described above, the criticality warning device as described above can detect the criticality of simultaneity within 0.5 seconds, which is an early event.
There is a problem that critical detection of slow events that take longer than 0.5 seconds is extremely difficult.

Further, if the monitoring time is lengthened to detect a slow critical event, the probability of noise mixing increases in proportion to the length of the monitoring time, increasing the possibility of outputting a false alarm. There is.

The present invention has been made in consideration of the above situation, and while maintaining the function of detecting an early critical event, 1/3 anomaly is continuously detected, and 2/3 for a predetermined time or longer.
It is an object of the present invention to provide a criticality warning device capable of detecting a late criticality event and improving safety by outputting a criticality alarm of late criticality when an abnormality is detected.

Another object of the present invention is to provide a critical warning device capable of reducing false alarms and improving reliability by discriminating noise from critical events when a late critical event is detected. To do.

[0014]

The invention according to claim 1 proposes at least one other radiation within 0.5 seconds after one of the three radiation detectors detects an abnormality. A criticality warning device capable of outputting a criticality warning of early criticality when a detector detects an abnormality.
One-third of one radiation detector to monitor whether the one-third abnormality detected by one radiation detector continues
An abnormality continuation monitoring circuit, a 2/3 abnormality continuation monitoring circuit for monitoring whether or not the 2/3 abnormality detected by the two radiation detectors of the three radiation detectors continues for a predetermined time or more, 1/3 Monitoring by the abnormal continuation monitoring circuit is 1 /
A critical alarm output circuit that outputs a slow critical alarm when the monitoring by the 2/3 abnormal continuation monitoring circuit indicates that the 2/3 abnormal continues for a predetermined time or longer. It is a criticality warning device.

The invention according to claim 2 is the critical alarm device according to claim 1, wherein the 1/3 abnormal continuation monitoring circuit is 1/3 at the initial stage of detection by the one radiation detector. It is a criticality warning device provided with a hold circuit for monitoring an abnormal vibration state as continuation of an abnormality.

Further, in the invention corresponding to claim 3, in the criticality warning device according to claim 1 or 2, the 1/3 abnormality continuation monitoring circuit keeps the 1/3 abnormality continued within 20 seconds. It is a criticality warning device equipped with a timer circuit for monitoring only.

According to a fourth aspect of the invention, in the criticality warning device according to any one of the first to third aspects, the monitoring by the 1/3 abnormality continuation monitoring circuit is 1
Critical alarm device including an error output circuit that outputs an error signal when the 2/3 abnormality continuation monitoring circuit indicates that the 2/3 abnormality continues for less than a predetermined time. Is.

Further, the invention according to claim 5 is the critical alarm device according to any one of claims 1 to 4, wherein the predetermined time is 1 second. The invention corresponding to claim 6 is the critical warning device according to any one of claims 1 to 4, wherein the predetermined time is 2 seconds.

[0019]

Therefore, according to the invention corresponding to claim 1, by taking the above-mentioned means, the 1/3 abnormal continuation monitoring circuit is detected by one of the three radiation detectors. / 3 Monitor whether or not the abnormality continues, and
The 3 abnormality continuity monitoring circuit monitors whether the 2/3 abnormality detected by two radiation detectors of the three radiation detectors continues for a predetermined time or longer, and the critical alarm output circuit outputs 1
When the / 3 abnormality continuation monitoring circuit indicates that the 1/3 abnormality continues, and when the 2/3 abnormality continuation monitoring circuit indicates that the 2/3 abnormality continues for a predetermined time or longer, a slow criticality warning is issued. Therefore, if the 1/3 anomaly is continuously detected and the 2/3 anomaly is detected for a predetermined time or longer while maintaining the function of detecting the early critical event, the critical alarm of the late critical alarm is issued. By outputting, a slow critical event can be detected and safety can be improved.

Further, in the invention corresponding to claim 2, the 1/3 abnormality continuation monitoring circuit according to claim 1 has a hold circuit, and the hold circuit is 1 / in the initial stage of detection by one radiation detector. By holding the vibration state of three abnormalities, the 1/3 abnormality continuation monitoring circuit can monitor the vibration state of the 1/3 abnormality at the initial detection time as the continuation of the abnormality. Therefore, in addition to the action corresponding to claim 1, The certainty of the detection operation for the slow criticality can be improved.

Further, in the invention corresponding to claim 3, the 1/3 abnormality continuation monitoring circuit corresponding to claim 1 or 2 has a timer circuit, and the timer circuit keeps 2/3 continuation of abnormality.
Since the monitoring is performed within 0 seconds, it is possible to further improve the certainty of the detection operation with respect to the slow criticality, in addition to the operation corresponding to claim 1 or claim 2.

In the invention corresponding to claim 4, the error output circuit is 1/3, and the monitoring by the abnormality continuation monitoring circuit is 1 /
The error signal is output when the monitoring by the 2/3 abnormality continuation monitoring circuit indicates that the 2/3 abnormality continues for less than a predetermined time, and therefore the error signal is output. In addition to the action corresponding to the item (1), it is possible to reduce false alarms and improve reliability by distinguishing noise from a critical event when a slow critical event is detected.

Further, in the invention according to claim 5, since the predetermined time is 1 second, in addition to the action corresponding to any one of claims 1 to 4, the time within 1 second It is possible to remove noise having a band and improve reliability.

Further, in the invention corresponding to claim 6, the predetermined time is 2 seconds, and therefore, the invention is defined in any one of claims 1 to 4.
In addition to the effect corresponding to any one of the above items, noise having a time zone of 2 seconds or less can be removed, and the reliability can be further improved.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. 1 is a circuit block diagram showing a configuration of a criticality warning device according to a first embodiment of the present invention, and FIG. 2 is a circuit diagram showing a configuration of the criticality warning device, and FIGS.
The same reference numerals are given to the same portions as those and detailed description thereof will be omitted, and only different portions will be described here.

That is, the apparatus of this embodiment is capable of detecting a late critical event while maintaining the function of detecting an early critical event, and monitors the continuation of an abnormality as compared with the apparatus shown in FIGS. 6 and 7. 1/3 abnormal continuation monitoring circuit 21 and 2/3 abnormal continuation monitoring circuit 22 for
Fail / criticality alarm output circuit 23 having a function of detecting a late critical event based on the logic level received from the / 3 abnormal continuation monitoring circuit 21 and the 2/3 abnormal continuation monitoring circuit 22.
It has.

Here, the 1/3 abnormality continuity monitoring circuit 21 is
It monitors whether or not the 1/3 abnormality detected by one of the three radiation detectors 1a to 1c continues, and specifically, the 1/3 abnormality detection circuit 6
Hold timer 24 that holds the output of the hold timer for 1 second, and the output of the hold timer 24 and the 1/3 abnormality detection circuit 6
OR circuit 25 that takes the logical sum of the outputs of
When the output from 5 is received, the time is up for 20 seconds and "1" is sent to the fail / criticality warning output circuit 23, and the output of the OR circuit 25 is reset within 20 seconds or after 20 seconds. The monitoring timer 16 is provided.

The 2/3 abnormality continuation monitoring circuit 22 monitors whether the 2/3 abnormality detected by two radiation detectors among the three radiation detectors 1a to 1c continues for a predetermined time or longer. In this case, the first delay timer 27 that outputs a timing signal 1 second after receiving the output of the 2/3 abnormality detection circuit 7, the output of the first delay timer 27, and the 2/3 abnormality detection circuit A that takes the logical product of the outputs of 7
It has an ND circuit 28 and a second delay timer 29 which sends a timing signal to the fail / criticality warning output circuit 23 one second after receiving an output from the AND circuit 28.

The fail / criticality warning output circuit 23 is 1 /
When the monitoring by the 3 abnormality continuation monitoring circuit 6 indicates that the 1/3 abnormality is continuing and the monitoring by the 2/3 abnormality continuation monitoring circuit 7 indicates that the 2/3 abnormality continues for 2 seconds or more, the criticality of the slow criticality is reached. The critical alarm output circuit that outputs an alarm and the monitoring by the 1/3 abnormality continuation monitoring circuit 21 indicate that the 1/3 abnormality is continuing, and the monitoring by the 2/3 abnormality continuation monitoring circuit 22 is 2
And a fail output circuit (error output circuit) that outputs a fail signal (error signal) when the abnormality continues for less than 2 seconds.

The criticality warning output circuit is a first AND which takes the logical product of the output of the monitoring timer 26 in the 1/3 abnormality continuation monitoring circuit 21 and the output of the second delay timer 29 in the 2/3 abnormality continuation monitoring circuit 22. Circuit 30 and this first A
The second AND circuit 31 which takes the logical product of the output of the ND circuit 30 and the output of the 2/3 abnormality detection circuit 7 and the output of the 1/3 abnormality detection circuit 6 are held for 0.5 seconds and the 0.5 When the seconds have passed, the hold circuits 14a to 5c are continuously reset, and the hold timer 14 and the hold timer 1 as described above are continuously reset.
4 and the output of the 2/3 abnormality detection circuit 6, and the third AND circuit 16 similar to the above, which takes the logical product, and the OR circuit 3 that takes the logical sum of the outputs of the second and third AND circuits 31, 16.
2 and a hold circuit 19 similar to the above which holds the output of the OR circuit 32 and outputs it as a criticality warning.

The fail output circuit is a first inversion output circuit 33 for inverting and outputting the output of the monitoring timer 26 in the 1/3 abnormality continuation monitoring circuit 21, and a critical alarm hold circuit 1.
The second inversion output circuit 20 similar to the above which reversely outputs the output of 9 and the hold circuit 17 similar to the above which holds and outputs the output of the 1/3 abnormality detection circuit 6, and this hold circuit 1
7 and the first and second inverting output circuits 33, 20
And an AND circuit 18 similar to the above which outputs a fail signal by taking the logical product of the outputs of the above.

Next, the operation of the criticality warning device configured as described above will be described with reference to the time chart of FIG. Since the operation of detecting an early critical event is as described above, the description thereof will be omitted, and only the operation of detecting a late critical event will be described here.

Now, the first radiation detector 1a is shown in FIG.
It is assumed that, as shown in (i), a critical event that slowly increases while oscillating is detected at an analog level and, as shown in FIG. 3 (j), the logic level is sent to the 2/3 logic module.

In the 2/3 logic module, as shown in FIG. 3 (n), the logic level is held by the hold circuit 14 for 0.5 seconds and held by the hold timer 14 after 0.5 seconds, as described above. It will be canceled. When a second radiation detector detects a critical event during this 0.5 second holding time, an early critical warning is sent as described above.
As shown in (l) and (m), no critical event is detected.

The logic level from the first radiation detector 1a is 1/3 through the 1/3 abnormality detection circuit 6.
It is given to the hold timer 24 in the abnormality continuity monitoring circuit 21. The hold timer 24 holds the logic level for 1 second as shown in FIG.
5 to the monitoring timer 26.

The monitoring timer 26 continues to detect this logic level for 20 seconds, as shown in FIG. 3 (q). Then, the second radiation detector 1b is shown in FIG.
It is assumed that a critical event is detected at the analog level as shown in FIG. 3 and the logic level is sent to the 2/3 logic module as shown in FIG. In the 2/3 logic module, the 2/3 anomaly detection circuit 7 has two radiation detectors 1
Since the logic level is held in a and 1b,
Fail logic level / criticality warning device 23/2 /
3 It is sent to the abnormality continuity monitoring circuit 22.

In the 2/3 abnormal continuation monitoring circuit 22,
When receiving the logic level from the 2/3 abnormality detection circuit 7,
As shown in FIG. 3 (r), the first delay timer 27 outputs "1" to the AND circuit 28 after 1 second. AND circuit 2
The second delay timer 8 outputs “1” to the second delay timer 29 when receiving the output from the 2/3 abnormality detection circuit 7 when receiving the output from the first delay timer 27. Two
As shown in FIG. 3 (s), reference numeral 9 delays the output from the AND circuit 28 by 1 second and outputs the fail / criticality warning output circuit 23.
Send to.

In the fail / criticality warning output circuit 23, the first AND circuit 30 takes the logical product "1" of the output of the second delay timer 29 and the output of the monitoring timer 26 to obtain the second AND circuit 31. Give to. Second AND circuit 31
Is the output of the 2/3 abnormality detection circuit 7 and the first AND circuit 3
A logical product "1" with the output of 0 is taken, and as shown in FIG. 3 (t), a criticality alarm is output through the OR circuit 32 and the hold circuit 19.

The operation in the case where a critical signal is not output due to the mixing of noise but a fail signal is output will now be described for the three types of noise (a) to (c).
Now, assume that noise is intermittently detected for about 1 second in the first radiation detector 1a, as shown in (a) of FIG. In the case of (a), the 1/3 abnormal continuation monitoring circuit 21
The output of the monitoring timer 26 in 1) is cut off after 1 second, the AND of the AND circuit 18 in the fail output circuit becomes "1", and the fail signal is output.

Next, as shown in (b) of FIG.
It is assumed that noise is detected in the second radiation detector 1b within less than 1 second. In the case of (B), the output of the AND circuit 28 in the 2/3 abnormality continuation monitoring circuit 22 becomes “0”, and the output of the monitoring timer 26 in the 1/3 abnormality continuation monitoring circuit 21 is cut off after 1 second, The logical product of the AND circuit 18 in the fail output circuit becomes "1" and the fail signal is output.

Further, as shown in (c) of FIG. 3 (k),
It is assumed that noise is detected in the second radiation detector 1b within less than 2 seconds. In the case of (c), the output of the monitoring timer 26 in the 1/3 abnormal continuation monitoring circuit 21 is cut off after about 2 seconds, and the AND of the AND circuit 18 in the fail output circuit becomes "1", and the fail signal is generated. Is output.

As described above, according to the first embodiment, 1
/ 3 abnormality continuity monitoring circuit 21 has three radiation detectors 1a ...
It is monitored whether the 1/3 abnormality detected by one of the radiation detectors 1a of 1c continues, and the 2/3 abnormality continuation monitoring circuit 7 controls the 2/3 of the 3 radiation detectors 1a to 1c.
Whether or not the 2/3 abnormality detected by the two radiation detectors 1a and 1b continues for 2 seconds or longer is monitored every 1 second, and the fail / criticality alarm output circuit 23 uses the 1/3 abnormality continuation monitoring circuit 21. With the monitoring showing that the 1/3 abnormality continues,
When the monitoring by the 2/3 abnormality continuation monitoring circuit 22 indicates that the 2/3 abnormality continues for 2 seconds or more, since a slow criticality warning is output, 1 / while maintaining the function of detecting an early criticality event.
3 abnormalities were continuously detected, and 2 /
When 3 abnormalities are detected, a late critical event can be detected by outputting a critical alarm of late criticality, and safety can be improved.

Further, according to the present embodiment, the hold timer 24 in the 1/3 abnormality continuity monitoring circuit 21 holds the vibration state (chattering state) of 1/3 abnormality at the initial stage of detection by one radiation detector 1a. As a result, the 1/3 abnormality continuation monitoring circuit 21 can monitor the vibration state of the 1/3 abnormality at the initial stage of detection as the continuation of the abnormality, so that the reliability of the detection operation for the slow criticality can be improved.

Further, according to this embodiment, the 1/3 abnormality continuation monitoring circuit 21 has the monitoring timer 26, and the monitoring timer 2
Since 6 monitors the continuation of 1/3 abnormality within 20 seconds,
The certainty of the detection operation for the slow criticality can be further improved. For example, as shown in FIG. 3 (n), even if noise is detected at time x after 20 seconds, it is possible to determine that the noise is not related to the criticality and output a fail signal.

Further, according to the present embodiment, the fail output circuit is monitored by the 1/3 abnormality continuation monitoring circuit 21 by 1/3.
When the abnormality continues, the 2/3 abnormality continuation monitoring circuit 22 outputs a fail signal when the 2/3 abnormality continues for less than 2 seconds. Therefore, when a slow critical event is detected, By distinguishing between noise and critical events, false alarms can be reduced and reliability can be improved.

Further, according to the present embodiment, since the 2/3 abnormality monitoring circuit 22 monitors the 2/3 abnormality for 2 seconds, noise having a time zone of 2 seconds or less should be removed. Therefore, the reliability can be further improved.

Next, a criticality warning device according to a second embodiment of the present invention will be described. FIG. 4 is a circuit block diagram showing the configuration of this criticality warning device. The same parts as those in FIG. 2 are designated by the same reference numerals and detailed description thereof will be omitted, and only different parts will be described here.

That is, the device of the present embodiment has a simplified circuit configuration as compared with the device of the first embodiment. Specifically, the second delay timer 29 is provided as compared with the device shown in FIG. It is omitted.

Here, as described above, it is assumed that the first radiation detector 1a detects a critical event, and then the second radiation detector 1b detects a critical event. The logic level from the second radiation detector 1b is sent to the first delay timer 27 of the 2/3 abnormality continuation monitoring circuit 22 via the 2/3 abnormality detection circuit 7. As shown in FIG. 3 (r), the first delay timer 27 outputs "1" to the AND circuit 28 one second after receiving this logic level.
Output to. When the AND circuit 28 receives this logic level and receives the logic level from the 2/3 abnormality detection circuit, it outputs "1" to the first AND circuit 30 of the fail / criticality warning output circuit 23.

In the fail / criticality warning output circuit 23, when the first AND circuit 30 receives "1", the logical product "1" is given to the second AND circuit 31, and the second AND circuit 31 is provided.
The circuit 31 outputs a critical warning. That is, by omitting the second delay timer 29 as compared with the device of the first embodiment, it is possible to output the critical warning at a timing earlier by 1 second.

As described above, according to the second embodiment, by omitting the second delay timer 29 as compared with the first embodiment, in addition to the effect of the first embodiment, it is faster by 1 second. A criticality alarm can be output at a timing, and the circuit configuration can be simplified.

Further, according to the present embodiment, since the monitoring time of the 2/3 abnormality by the 2/3 abnormality continuation monitoring circuit 22 is 1 second, noise having a time zone within 1 second should be removed. Therefore, the reliability can be improved.

Next, a criticality warning device according to a third embodiment of the present invention will be described. FIG. 5 is a circuit diagram showing the configuration of this criticality warning device. The same parts as those in FIG. 2 are designated by the same reference numerals, detailed description thereof will be omitted, and only different parts will be described here.

That is, the device of this embodiment has a simplified circuit configuration as compared with the device of the first embodiment. Specifically, as compared with the device shown in FIG. 21 is omitted and the OR connected to the output terminal of the hold timer 24
The input terminal of the circuit 25 is connected to the fail / criticality warning output circuit 23.
Is connected to the output terminal of the hold timer 14. The hold timer 14 has a hold time of 1 second in order to detect a late critical event.

As described above, it is assumed that the first radiation detector 1a detects a critical event and sends the logic level to the 2/3 logic module. In the 2/3 logic module, the logic level is held for 1 second by the hold circuit 5a, and after 1 second has elapsed, the hold timer 14 in the fail / criticality warning output circuit 23 releases the hold. At the same time, this hold timer 1
As shown in FIG. 3 (p), 4 holds the logic level for 1 second and gives it to the monitoring timer 26 through the OR circuit 25, while also giving the logic level to the second AND circuit 31. When a second radiation detector 1b detects a critical event during the holding time of 1 second, an early critical critical alarm is sent as described above, but in the present embodiment, FIG. , (M), no critical event is detected.

Hereinafter, as described above, the monitoring timer 26 continues to detect this logic level for 20 seconds as shown in FIG. 3 (q), and it is assumed that a critical event is detected by the second radiation detector 1b. A critical warning is output from the fail / criticality warning output circuit 23.

As described above, according to the third embodiment, compared with the device shown in FIG. 2, the hold timer is omitted and shared by the hold timer. Therefore, in addition to the effect of the first embodiment, the circuit is The configuration can be simplified.

In the second embodiment, the case where the second delay circuit 29 is omitted has been described, and the case where the hold timer 24 is omitted has been described in the third embodiment. However, the present invention is not limited to this. Even if the second and third embodiments are carried out at the same time and the second delay circuit 29 and the hold timer 24 are omitted, the present invention is carried out in the same manner to obtain the same effect, and the structure is further simplified. be able to. In addition, the present invention can be modified in various ways without departing from the scope of the invention.

[0059]

As described above, according to the invention of claim 1, the 1/3 abnormality continuation monitoring circuit continues the 1/3 abnormality detected by one of the three radiation detectors. The 2/3 abnormality continuity monitoring circuit monitors whether the 2/3 abnormality detected by two radiation detectors out of the three radiation detectors continues for a predetermined time or longer, The critical warning output circuit indicates that the monitoring by the 1/3 abnormality continuation monitoring circuit indicates that the 1/3 abnormality continues, and 2 /
3 When the monitoring by the abnormality continuity monitoring circuit indicates that the 2/3 abnormality continues for a predetermined time or longer, a critical alarm of late criticality is output, so that the 1/3 abnormality continues while maintaining the function of detecting an early critical event. Detected over a period of 2 /
(3) When an abnormality is detected, a critical alarm of late criticality is output, so that it is possible to provide a criticality alarm device capable of detecting a late critical event and improving safety.

According to the invention of claim 2, claim 1
The 1/3 abnormal continuation monitoring circuit has a hold circuit, and this hold circuit holds the 1/3 abnormal vibration state at the initial stage of detection by one radiation detector, thereby Since the vibration state of 1/3 abnormality at the initial stage of the detection can be monitored as the continuation of the abnormality, it is possible to provide the criticality warning device capable of improving the certainty of the detection operation for the slow criticality in addition to the effect of the first aspect.

Further, according to the invention of claim 3, the 1/3 abnormality continuation monitoring circuit according to claim 1 or 2 has a timer circuit, and the timer circuit continues the 1/3 abnormality only within 20 seconds. Since it is monitored, in addition to the effect of claim 1 or claim 2,
It is possible to provide a criticality warning device that can further improve the certainty of the detection operation for the slow criticality.

Further, according to the invention of claim 4, the error output circuit is ⅓, and the monitoring by the abnormality continuation monitoring circuit is ⅓.
The error signal is output when the monitoring of the 2/3 abnormality continuation monitoring circuit indicates that the 2/3 abnormality continues for less than a predetermined time, and the error signal is output.
In addition to the effect of any one of the above items, it is possible to provide a critical warning device that can reduce false alarms and improve reliability by discriminating noise from critical events when a slow critical event is detected.

Further, according to the invention of claim 5, since the predetermined time is 1 second, the invention according to claim 1 to claim 4
In addition to the effect of any one of the above items, it is possible to provide a critical alarm device that can remove noise having a time zone of 1 second or less and improve reliability.

Further, according to the invention of claim 6, since the predetermined time is 2 seconds, in addition to the effect of any one of claims 1 to 4, a time zone within 2 seconds is set. It is possible to provide a critical alarm device that can remove the noise that it has and that can further improve reliability.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a configuration of a criticality warning device according to a first embodiment of the present invention,

FIG. 2 is a circuit diagram showing a configuration of a criticality warning device according to the embodiment.

FIG. 3 is a time chart for explaining the operation in the embodiment.

FIG. 4 is a circuit diagram showing a configuration of a criticality warning device according to a second embodiment of the present invention,

FIG. 5 is a circuit diagram showing a configuration of a criticality warning device according to a third embodiment of the present invention,

FIG. 6 is a circuit block diagram showing the configuration of a conventional criticality warning device,

FIG. 7 is a circuit diagram showing a configuration of a conventional criticality warning device,

FIG. 8 is a time chart for explaining a conventional operation.

[Explanation of symbols]

1a to 1c ... Radiation detector, 4 ... Reset line, 5a
5c, 17, 19 ... Hold circuit, 6 ... 1/3 abnormality detection circuit, 7 ... 2/3 abnormality detection circuit, 9, 10a-10
c, 12, 25, 32 ... OR circuit, 11a to 11c, 1
6, 18, 30, 31 ... AND circuit, 13 ... Indicator light, 1
4, 24 ... Hold timer, 20, 33 ... Inversion output circuit, 21 ... 1/3 abnormal continuation monitoring circuit, 22 ... 2/3 abnormal continuation monitoring circuit, 23 ... Fail / criticality warning output circuit.

Claims (6)

[Claims] 1. A rapid criticality detection is achieved by detecting an abnormality by at least one other radiation detector within 0.5 seconds after one of the three radiation detectors detects the abnormality. In a criticality warning device capable of outputting a criticality warning, a 1/3 abnormality continuity monitoring circuit for monitoring whether or not a 1/3 abnormality detected by one of the three radiation detectors continues A 2/3 abnormality continuation monitoring circuit for monitoring whether or not a 2/3 abnormality detected by two radiation detectors of the three radiation detectors continues for a predetermined time or more; When the monitoring by the monitoring circuit indicates that the 1/3 abnormality continues, and when the monitoring by the 2/3 abnormality continuation monitoring circuit indicates that the 2/3 abnormality continues for a predetermined time or longer, a slow criticality warning is output. With a critical warning output circuit A criticality warning device comprising: 2. The criticality alarm device according to claim 1, wherein the 1/3 abnormality continuation monitoring circuit regards the vibration state of the 1/3 abnormality at the initial stage of detection by the one radiation detector as continuation of abnormality. A criticality warning device comprising a hold circuit for monitoring. 3. The criticality alarm device according to claim 1, wherein the 1/3 abnormality continuation monitoring circuit includes a timer circuit for monitoring the continuation of the 1/3 abnormality for 20 seconds or less. A criticality warning device. 4. The criticality warning device according to any one of claims 1 to 3, wherein the monitoring by the 1/3 abnormality continuation monitoring circuit indicates that 1/3 abnormality continues. A criticality warning device comprising an error output circuit that outputs an error signal when the monitoring by the / 3 abnormality continuation monitoring circuit indicates that the 2/3 abnormality continues for less than a predetermined time. 5. The critical warning device according to claim 1, wherein the predetermined time is 1 second. 6. The critical alert device according to claim 1, wherein the predetermined time is 2 seconds.