JPH0869546A - Stereoscopic image processing method and image processor - Google Patents

Abstract

PURPOSE: To enable texture mapping and glow shading in consideration of depth by considering the perspective converted value of a Z value. CONSTITUTION: When the value on a front clip surface is denoted as CZF and the value on a rear clip surface is denoted as CZB as to the Z value after perspective conversion which is outputted from a microprocessor part 1 to an edge expanding circuit 2, a calculation is made on the basis of Zs = 1-CZF/ Ze (Zs is Z value on screen coordinates, Ze is Z value on sight coordinates) only on condition that the distance between CZF and CZB is small. Further, when the distance between CZF and CZB is large or when rear clipping is not performed, namely, when CZB/(CZB-CZF) can be considered to be 1, a calculation is made on the basis of Zs=CZF/Ze. In the former case, only conventional unnecessary calculations are omitted, so the calculation quantity is small and precision is also held. In the latter case, the calculation is simplified and the total throughput is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for performing texture mapping on polygons of screen coordinates which have been perspective-transformed by the Z buffer method.

[0002]

2. Description of the Related Art In computer graphics, perspective transformation and clipping processing are performed in consideration of a visual field pyramid. In modeling, the view pyramid is created by giving the position of the viewpoint in the world coordinate system, the direction of the line of sight, and the viewing angle.

In the conversion from the world coordinate system to the viewpoint coordinate system, the whole viewpoint (including the light ray) is translated so that the viewpoint becomes the origin, and further, the line of sight is rotated so as to face the positive direction of the Z axis. An affine transformation is used for this transformation. Then, the transformed viewpoint coordinate system is transformed into the screen coordinate system by using perspective transformation.

By the way, in three-dimensional graphics, the Z-buffer algorithm is the most commonly used at present because of its simple algorithm among various hidden surface processing methods and the ability to render a large amount of shape data at high speed. ing.

Before performing the hidden surface processing using this Z-buffer algorithm, it is necessary to perform the above-mentioned coordinate conversion and the like.
Among these, there is a perspective transformation for converting from a visual field (viewpoint) coordinate system to a screen coordinate system, that is, converting three-dimensional data into two-dimensional data. When using the Z-buffer method, X,
It is necessary to perform perspective transformation not only on the Y value but also on the Z value. This is because if perspective transformation is not performed on the Z value, a straight line is not mapped to a straight line and a plane is not mapped to a flat surface, and there arises a problem that the context is interchanged.

For this reason, various methods have been proposed for performing perspective transformation on Z values, but a method suitable for displaying a large number of objects (lumps of polygons, objects) such as in games has been proposed. Absent.

On the other hand, as a texture mapping method, there is a method of performing inverse perspective transformation in pixel units, but this method has a drawback that the processing speed is slow, and thus texture mapping cannot be performed in real time.

Therefore, in order to solve this problem, I /
A texture mapping device including an O interface, a memory, an edge interpolation circuit, a line interpolation circuit, a mapping memory, and a multiplication circuit is disclosed in Japanese Patent Laid-Open No. 63-80375 and Japanese Patent Laid-Open No. 5-37575.
No. 298456 has been proposed. These devices perform texture mapping using digital differential analysis (DDA).

[0009]

However, in the above-mentioned apparatus, since the depth is not taken into consideration, there is a problem that the straight line on the texture map looks distorted on the screen or does not move smoothly when moved. It was

In view of the above-mentioned conventional problems, the present invention has
First, the Z value is considered, and an object is to provide an image processing apparatus using a Z buffer method capable of texture mapping and glow shading in consideration of depth.

[0011]

According to the present invention, in a stereoscopic image processing method using the Z buffer method for hidden surface processing, the value of the front clip plane is CZF and the value of the rear clip plane is CZF.
When ZB is set and the distance between CZF and CZB becomes large, the perspective transformation value of the Z value is Zs = 1−CZF / Ze.
(Here, Zs is the Z value on the screen coordinates, and Ze is the Z value on the visual field coordinates).

Further, according to the present invention, in the stereoscopic image processing method using the Z buffer method for the hidden surface processing, when the value of the front clip plane is CZF and the value of the rear clip plane is CZB, CZF and CZB are combined. When the distance is sufficiently large or when backward clipping is not performed, the perspective transformation value of the Z value is set to Zs = CZF / Ze (where Zs is the Z value on the screen coordinate and Ze is the Z value on the visual field coordinate). It is characterized in that it is calculated based on.

Further, according to the present invention, in the stereoscopic image processing method using the Z buffer method for the hidden surface processing, when the value of the front clip plane is CZF and the value of the rear clip plane is CZB, CZF and CZB are combined. When the distance is large enough or when backward clipping is not performed, the Z value (Zs) on the screen coordinates is set to 1 / depending on the value of the front clipping plane.
It is characterized in that a value obtained by left-shifting Ze (Ze is a Z value on the visual field coordinates) is used.

The output obtained by calculating 1 / Ze may be shifted according to the value of CZF by a barrel shifter or a multiplexer.

The image processing apparatus of the present invention comprises a processing means for perspectively transforming the Z value by the above method, and the Z value and the screen data of the polygon to be displayed and the texture map address data are interpolated between two points on the side of the polygon. A means for expanding the edge in the processing and each edge expanded data
A means for developing a pixel by interpolation processing between points and a means for reading out as texture data from a texture mapping memory according to the texture map address data subjected to the pixel development are provided.

In the image processing apparatus of the present invention, a register file may be provided between the processing means for performing perspective transformation and the edge developing means, and data for several polygons may be transferred at once.

Further, the image processing apparatus of the present invention multiplies the texture map address data by the perspective-transformed Z value, expands the multiplied texture map address data into pixels, and perspective-transforms the pixel expanded texture map address data. It is characterized by division by the Z value.

The edge expanding means feeds back the output from the first multiplexer, the shift register that stores the slope data of the first multiplexer to which the slopes of the sides forming the polygon are input, and the first multiplexer by feeding back the output from the shift register. Means for giving to the multiplexer, an adder having one output of the shift register, a second multiplexer to which the output of the adder and start point data are input, and an output from the second multiplexer are stored. It is characterized by comprising a shift register and means for giving the output from the shift register to the adder circuit.

A 2-numerator / denominator divider may be used as the pixel expanding means.

Further, the brightness value data is multiplied by the Z value obtained by perspective transformation, and the multiplied brightness value data is expanded into pixels,
It is also possible to configure so that the brightness value data that has undergone pixel expansion is divided by the Z value that has been perspective-transformed.

A transparent mapping memory that stores a flag indicating whether or not it is transparent may be provided.

[0022]

According to the first configuration, since only the conventional useless calculation is omitted, the calculation amount is small and the accuracy is maintained.

According to the above second structure, CZB and CZF
Since it copes with the case where the distance between and is large, the calculation is simplified and the overall processing capability is improved.

By performing perspective transformation and inverse perspective transformation on the two-dimensional texture map data, texture mapping can be performed in consideration of depth.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the overall construction of the first embodiment of the present invention.

As described above, in three-dimensional graphics, the Z-buffer algorithm is simple among various hidden surface processing methods and can render a large amount of shape data at high speed.

In the image processing apparatus, it is necessary to convert from the viewpoint coordinate system to the screen coordinate system before performing the hidden surface processing using the Z buffer algorithm. That is,
The conversion from the world coordinate system to the viewpoint coordinate system is performed by the affine transformation, and these conversions are performed by the microprocessor unit 1. Perspective transformation is performed to convert the viewpoint coordinate system to the screen coordinate system.

As described above, when the Z buffer method is used, it is necessary to perform perspective transformation not only on X and Y values but also on Z values. This is because if perspective transformation is not performed on the Z value, a straight line is not mapped to a straight line and a plane is not mapped to a flat surface, and there arises a problem that the context is interchanged.

As a method of performing perspective transformation on the Z value, there is a method shown in the following mathematical expression (1).

[0031]

## EQU1 ## Zs = 1 / Ze (1) Here, Zs is the Z value on the screen coordinates, and Ze is the Z value on the visual field coordinates.

Although the Z value can be perspective-transformed by using the above equation (1), this method has a problem that the accuracy is low.

Therefore, in order to improve this precision, the range of the view volume in the depth direction is made as narrow as possible, and Z
A method has been proposed in which a value is normalized between 0 and 1 and perspective transformation is performed by the following mathematical expression (2) (for example, PIXEL).
(No. 73) pp. 88-89. ).

[0034]

## EQU00002 ## Zs = Z / W = (A.Ze + B) /C.Ze=a (1-CZF / Ze) (2) where a = CZB / (CZB-CZF) where CZF is the front clip The surface value, CZB, is the value of the rear clip surface.

By the way, when many objects are displayed as in a game, the distance between CZF and CZB is inevitably large. Therefore, the present invention, when it is necessary to display many objects, that is, C
In the case of ZB >> CZF, since a becomes about 1, the above formula (2) becomes the following formula (3).

[0036]

## EQU3 ## Zs = 1-CZF / Ze (3)

The above equation (3) is simpler than the equation (2), and the operation can be performed easily. Therefore, in the present invention,
When displaying many objects, the Z value is perspectively transformed by the microprocessor unit 1 based on the above equation (3). X and Y values on screen coordinates (Xs, Ys)
Is calculated by the following equation (4).

[0038]

Xs = Xe · d / Ze, Ys = Ye · d / Ze (4) where d is the distance from the viewpoint to the screen.

Since Ze changes between CZF and CZB, Zs in the above equation (3) is changed from 0 to (1-CZF /
It varies between CZB) = 1. When the Z buffer method is used, it is only necessary to change the initialization value of the Z buffer when changing from 0 to 1 or from 1 to 0. Therefore, the equation (3) should be treated as the following equation (5). There is no problem.

[0040]

## EQU5 ## Zs = CZF / Ze (5)

Further, by shifting and using the result of the expression (1), the accuracy of the expression (1) can be improved. That is, the value of Zs is shifted according to the value of CZF. For example, when CZF = Ze = 33, 1 / Ze is represented by 16 bits after the decimal point, which is 07c1h. CZ
From the relationship of F ≦ Ze, when CZf is 33, the upper 5 bits of 16 bits are fixed to 0. That is, there is no problem even if a 16-bit value is left-shifted by 5 bits. However, in this case, 1 / Ze must be obtained by 21 bits or more below the decimal point, but if the result of the divider of the microprocessor unit 1 is 32 bits, no problem will occur.

From the above, in the image processing apparatus of FIG. 1 showing the first embodiment of the present invention, CZF and CZB in the Z value after perspective transformation output from the microprocessor unit 1 to the edge expansion circuit 2. When the distance is small, the above equation (3) is used. When the distance between CZF and CZB is large, that is, CZB / (CZB-CZ
When F) = 1, the above equation (5) is used.
In this way, the operation method of Zs is switched according to the relationship between CZB and CZF and output to the edge expansion circuit 2.

The affine transformation may be performed by the system in advance, but may be performed by the microprocessor unit 1.

If it is desired to further reduce the load on the microprocessor unit 1, the above equation (1) may be used, and Ze may be shifted to improve the accuracy. In particular, (1)
When using the formula, it may be shifted by the microprocessor unit 1, but 1 / Ze data is output as it is,
A circuit on the receiving side, in this example, the edge expansion circuit 2 is configured to shift using a barrel shifter or a multiplexer. FIG. 2 shows an example of a shifter circuit forming the data input section of the edge expansion circuit 2. X, Y, 1 / Ze perspective-transformed from the microprocessor unit 1
I (luminance value), MX, MY are barrel shifters (BRS) 2
Given to 1. Z value shifted from BRS21,
X, Y, I, MX, and MY are output and the edges are expanded. If one word of data includes several parameters (X and Y, etc.), the determination may be made based on the CZF input to the BRS controller 22.

In the image processing apparatus shown in FIG. 1, the data for one polygon is processed by direct memory access (DM
By A) transfer, it is transferred from the microprocessor unit 1 to the edge expansion circuit 2. The microprocessor unit 1 includes a circuit for DMA transfer.

However, if the data is transferred for each polygon, a wasteful time increases or a control circuit for reducing the wasteful time is required. Therefore, in the present invention, as shown in FIG. 3, a register file (RGF) 23 for storing polygon data for several polygons or more is provided. The register file 23 is controlled by the RGF address controller 24, and the Z value, X, Y, from the microprocessor unit 1 is controlled.
I, MX, MY are stored.

If the registration file 23 is provided in this way, useless processing time during DMA transfer can be reduced accordingly.

FIG. 4 shows the configuration of the edge expansion circuit 2. As shown in FIG. 4, the screen coordinate values Xs, Ys, Zs, MXs, MYs and the brightness value (I) are DMA-transferred from the microprocessor unit 1 to the register file 23. At this time, flags for polygons, for example, flags for flat shading or glow shading are also transferred. Then, data is sent from the registration file 23 to the initial calculation unit 25, and in this embodiment, the initial calculation unit 25 performs the shift operation by the barrel shifter 21 shown in FIG. The edge expansion circuit 2 expands the polygon data to the left and right edges as shown in FIG. In addition, although a quadrangular shape is described in this embodiment, any polygonal shape may be used. As shown in FIG. 5, the data obtained by interpolating the divided data on the left side and the right side by interpolation circuit 26 on the right side and interpolation circuit 27 on the left side by digital differential analysis (DDA) and interpolating Is transferred to the pixel expansion circuit 3. Also, the DDA control unit 2
From 8, a scan line, that is, Y data and a flag is output.

The pixel expansion circuit 3 includes interpolation circuits 26, 2
The point data output from 7 is input, a straight line parallel to a scan line determined by two points of these point data is interpolated to develop a pixel, and the developed data is used as an address to access the texture mapping memory 4. . The texture mapping memory 4 outputs the texture data having the address value indicated by the data output from the pixel expansion circuit 3, and outputs the texture data to the color calculation circuit 5.

In the color operation circuit 5, the look-up table memory 6 is accessed from the LUTAD read from the pixel expansion circuit 3, and the color information (R,
Take out G and B). Then, color calculation is performed.

The memory control circuit 7 stores the Z buffer memory 8 and the frame memory (R, G, B values) of the same format as the frame memory 9 in which the Zs calculated by the above-described method is stored. ing)
Control.

In the memory control circuit 7, first, the data of the pixel in the Z buffer memory 8 is read out and compared, and the Zs value of the calculated pixel is compared. If the Zs value is larger,
That is, if the calculated pixel is in front, the respective data is written to the frame memory 9 and the Z buffer memory 8, and conversely, if it is small, nothing is written. Also CRT
The RGB data of the immediately preceding frame is read by the control signal of the controller 10. This CRT controller converts RGB data in the frame memory into a D / A converter, R
CRT composite video signal through GB encoder
Output to.

In this way, texture mapping based on the Z buffer method can be easily performed.

Since the texture mapping device in the above-mentioned device does not consider depth, there is no problem when Z1 and Z2 are equal as shown in FIG. 21, but when Z1 ≠ Z2, depth is considered. Because not
There is a problem that it does not become as shown in FIG. Furthermore, there is a problem that the straight line on the texture map does not become a straight line on the screen screen, or the motion does not become smooth when rotated and moved. Therefore, in the second embodiment of the present invention, in order to solve these problems, texture mapping is performed as follows.

First, the texture map addresses MX, M
The perspective conversion (screen conversion) of Y is performed by the following mathematical expression (6).

[0056]

## EQU6 ## MXs = MX / Ze, MYs = MY / Ze (6) where MXs and MYs are texture map addresses on the screen.

Then, MXs and MYs are developed from polygon data to pixel data by digital differential analysis (DDA).

The pixel-developed (MXs, MYs) is inversely converted into the original texture map address (MX, MY) according to the following equation (7).

[0059]

## EQU00007 ## MX = MXs / Zs, MY = MYs / Zs (7) Here, Zs is the Zs value developed in the pixel.

By calculating in this way, it becomes possible to perform texture mapping considering depth.

FIG. 6 is a block diagram showing an image processing apparatus using the above method. As shown in FIG. 6, in the microprocessor unit 1, coordinate conversion, shading, clipping, etc. are performed in the same manner as in the first embodiment described above, and screen coordinate values Xs, Ys, Zs, MXs, MYs and luminance values ( DMA transfer of I). At this time, flags for polygons, for example, flags for flat shading or glow shading are also transferred. In addition, the microprocessor unit 1 uses affine transformation and D
Dedicated hardware such as MA transfer is also included. Then, the calculation of the above equation (6) and the above-described perspective transformation of the Z value are performed in this block.

Data for one polygon is transferred from the microprocessor unit 1 to the edge expansion circuit 2 by DMA transfer. However, if the data is transferred for each polygon, a wasteful time increases or a control circuit for reducing the wasteful time is required. Therefore, also in this embodiment, as shown in FIG. 3, a register file 23 for storing polygon data for several polygons or more is provided. In the edge expansion circuit 2 provided with the resist file 23 as described above, the polygon data is expanded to the left and right edges as shown in FIG.

FIG. 7 shows the configuration of this edge expansion circuit.
This edge expansion circuit is configured in the same manner as in the first embodiment described above, but in the initial operation section in this embodiment, the shift operation shown in FIG.
In s, the process of converting MY to MYs is performed. This initialization operation circuit 25a is configured as shown in FIG.

The data DMA-transferred from the microprocessor unit 1 is temporarily stored in a register file (RGF23).
Data is transferred to the initial calculation unit 25a for each polygon. The barrel shifter 250 shifts the Z value, and the MXs / MYs calculator 251 multiplies MX and MY by Zs to convert them into MXs and MYs. This calculation unit 25
The conversion of MX and MY into screen coordinates in 1 is performed by multiplying the screen-converted Zs value in this block, rather than converting MX and MY into screen coordinates based on the above equation (6) in the microprocessor unit 1. This is because the accuracy is better and the number of bits of the input data can be reduced.

Then, the DDA initial setting section 252 determines the Y value, and as shown in FIG. 5, the right side and the left side are discriminated and the tilt data is calculated. The inclination data is, for example, when Xs,
(Xs1−Xs0) / Ys1−Ys0) (0 and 1 are polygon end point numbers). The inclination data and the starting point data of each parameter calculated in this block are transferred to the interpolation circuits 26 and 27 on the right and left sides. The interpolation circuit is shown in FIG.
FIG. 10 shows an adder circuit. The Ys value is 1
Since it is only necessary to add the values one by one, the DDA control unit 28 of FIG. Also, the Ys value may be calculated by a counter.

The interpolating circuits 26 and 27 shown in FIG. 9 are composed of adder circuits 26a (27a) to 6e (27e), respectively, and the adder circuit 26a (27a) interpolates and generates the X coordinate. The adder circuit 26b (27b) is a circuit that interpolates and generates the Z value, and the adder circuit 26c (27c).
Is a circuit that interpolates and generates I (luminance value), and an adder circuit 2
6d (27d) is a circuit that interpolates and generates MX values, and addition circuit 26e (27e) is a circuit that interpolates and generates MY values.

FIG. 10 shows an example of a concrete configuration example of these adder circuits. This adder circuit includes a register 261 that stores the slope data calculated by the DDA conversion unit 252, and the data from this register 261 is added by the adder 262.
Given to. In addition, the start point data is the multiplexer 26.
3 and the output from the adder circuit 262 is given to the multiplexer 263. Multiplexer 263
Data of the register 2 is held in the register 264.
The value of 64 is given to the adding circuit 262. Therefore, the start point data is first held in the register 264 via the multiplexer 263, and the start point data held in the register 264 and the slope data held in the register 261 are added by the adder 262, and the value is added to the multiplexer 2
It is given to the register 264 via 63, and this interpolated data is output. Subsequently, the previously interpolated data and the inclination data are added by the adder 262, and the sequential interpolation processing is performed.

The number of times of this edge expansion is smaller than the number of times of pixel expansion except when the pixel expansion circuit 3 is parallelized. Therefore, it is not necessary to interpolate all the parameters in one cycle as shown in FIG.

FIG. 11 shows an adder circuit for interpolating a plurality of parameters, and FIG. 12 shows an interpolator circuit using this adder circuit. As shown in FIG. 11, a plurality of gradient data is given to the shift register 267 via the multiplexer 265, and from the shift register 267, the multiplexer 2 is supplied.
Outputs are provided to 65 and adder 268, respectively. The data in the register 270 is transferred from the adder circuit 268 via the multiplexer 269, and the data is given from the register 270 to the adder 266 via the shift register 266. Multiple start point data is the multiplexer 26
9 to the register 270. With this configuration, interpolation processing of a plurality of parameters can be sequentially performed. With this configuration, the circuit scale becomes smaller. Further, with this configuration, it is not necessary to have a dividing circuit for calculating the tilt data for each parameter.

Further, the pixel expansion circuit 3 interpolates a pixel from the start and end points of each parameter output from the edge expansion circuit 2, where the start point is the left side data and the end point is the right side data. The calculation method is the same as that of the edge expansion circuit 2. FIG. 13 shows the configuration of the pixel expansion circuit.

The initial calculation section 31 calculates the initial value of each inclination data, and supplies this initial data to the interpolation circuit 32. The interpolation circuit 32 is configured similarly to the above-mentioned addition circuit 260, and develops pixels for each scan line sandwiched between two points on the left side and the right side by the DDA. This interpolation circuit 32
Of each parameter that is pixel-expanded by
The inverse conversion circuit 33 must convert Xs and MYs into MX and MY. FIG. 14 shows the configuration of the inverse conversion circuit. The dividers 331 and 332 of this circuit are sequential dividers. Here, there are two types of numerator, MXs and MYs, but there is only one type of denominator, Zs. Therefore, the circuit scale can be reduced by using the divider shown in FIG. This Figure 1
6 is a circuit diagram showing a specific configuration of the 2-numerator / denominator divider. A pixel expansion circuit using this divider is shown in FIG. The divider 330 includes a rounding circuit below the decimal point. Further, since the denominator Zs data is output together with the division result, the shift register is unnecessary.

From the texture map block number (MB) contained in the flag (FLAG) and (MX, MY) thus obtained, the texture map memory control unit 34 determines the look-up table address (LU) at that pixel.
TAD) is read out and transferred to the color operation circuit 5.

In the color operation circuit 5, the look-up table memory is accessed from the LUTAD and MB read from the pixel expansion circuit 3, and the color information (R, G, B) of the pixel is extracted. And I, FR, FG,
Color calculation is performed from FB (color information when I is the maximum value) according to the flow chart of FIG. However, this flowchart is only an example. FIG. 18 is a schematic diagram showing the color intensity of FR. FIG. 19 shows a block diagram of the color calculation unit. The brightness value I is given to the register 51, and this brightness value is given to the R arithmetic circuit 52. FR and R are given to the R operation circuit, and the operation is performed according to the intensity shown in FIG. Further, the brightness value is given to the G calculation circuit 53. FG and G are given to the G calculation circuit, and the calculation is performed with the intensity set similarly to the intensity shown in FIG. Furthermore, the brightness value is B
It is given to the arithmetic circuit 54. FB and B are given to the B arithmetic circuit, and the arithmetic operation is performed according to the intensity set similarly to the intensity shown in FIG. Each of these data is controlled and read by the LUT address control unit.

As shown in the flow chart of FIG.
8 it is judged whether it is greater than 80h (step 1),
If it is larger than 80h, the value of 80h is subtracted from FR, and the result is multiplied by the upper 7 bits of the luminance value (steps 2 and 4). If it is smaller than 80h, the value of 80h is output and this value is multiplied by the upper 7 bits of the brightness value (steps 3 and 4). Then 80h
It is determined whether or not it is larger (step 5). If it is larger, R1 and R0 are added, and if not larger, R
The value of 1 is output.

The memory control circuit 7 stores Zs which is a pixel expansion of Zs calculated by the above-described method.
Then, the Z buffer memory 8 and the frame memory 9 (where R, G, and B values are stored) of the same format as the frame memory are controlled.

First, the data of that pixel in the Z buffer memory 8 is read out and the Zs value of the calculated pixel is compared,
If the Zs value is larger, that is, if the calculated pixel is in front, the respective data is written in the frame memory and the Z buffer memory, and conversely, nothing is written. Further, the RGB data of the immediately preceding frame is read out by the control signal of the CRT controller 10. The CRT controller 10 outputs the RGB data in the frame memory 9 to a CRT via a D / A converter and an RGB encoder.

By carrying out the above, it becomes possible to perform texture mapping in consideration of the depth, and also parallelization becomes possible.

Further, MX and MY are also applied to I (luminance value).
By performing the same process as the process performed in step 1, glow shading considering depth can be performed.

That is, I is Is (Is is a luminance value on the screen coordinates), and Is = I * Zs (7)

Is is expanded from polygon data to pixel data by DDA.

Is to I, and I = Is / Zs (8)

In this case, the above-mentioned 2-numerator / denominator divider is replaced by a 3-numerator / denominator divider.

When parallelizing in order to improve the processing capability of the image processing apparatus of the present invention, it is necessary to prepare texture mapping memories for parallelization or to prepare high speed memories.

An embodiment using a transparent mapping memory that stores only the transparent flag of the texture map will be described.

FIG. 20 shows a block diagram when the microprocessor and subsequent parts are parallelized. In this example, a transparent mapping memory is used in place of the texture mapping memory in FIG. 6, and it is determined here whether or not it is transparent. Then, instead of RGB data, I,
Stores MB, MX, and MY. The texture mapping memory and color calculation are performed when reading the frame memory.

By doing so, it is not necessary to use a plurality of texture mapping memories. Further, although a plurality of extra transparent mapping memories are required, the capacity is considerably smaller than the case where a plurality of texture mapping memories are used. Also, texture maps containing transparency data can be used as before.

The polygon register file (PolyRGF) and the line register file (Lin) shown in FIG.
eRGF) is a register file or first-in first-out (FIFO), and by using these, wasteful processing is reduced.

[0088]

According to the present invention, the perspective transformation of Z value is performed by Zs =
1-CZF / Ze (where Zs is the Z value on the screen coordinates and Ze is the Z value on the visual field coordinates), so that only unnecessary calculation in the related art is omitted, so the calculation amount is small. Also, accuracy is maintained.

Further, according to the present invention, when the distance between CZF and CZB is sufficiently large or when backward clipping is not performed, the perspective transformation of Z value is performed by Zs = CZF / Ze (where Zs is on the screen coordinate). By performing the Z value and Ze based on the Z value on the visual field coordinates, the case where the distance between CZB and CZF is large is dealt with, and the calculation is simplified.
Overall processing capacity is improved.

Further, according to the present invention, when the distance between CZF and CZB is sufficiently large or when backward clipping is not performed, the Z value (Zs) on the screen coordinates is set to 1 / Ze (according to the value of the front clipping plane). By using a value obtained by left-shifting (Z value on the visual field coordinates) for Ze, it is possible to significantly improve the processing capability without significantly lowering the accuracy.

By shifting the output obtained by calculating 1 / Ze according to the value of CZF by the barrel shifter or multiplexer, the processing capacity can be further improved.

The image processing apparatus according to the present invention includes a processing means for performing perspective transformation of Z values by the above-described method, and an interpolation processing between the Z values and the screen data of the polygon to be displayed and the texture map data between two points on the polygon side. Edge expanding means, pixel expanding each edge expanded data by interpolation processing between two edge points, and means for reading out texture data from the texture mapping memory according to the pixel expanded texture map data. With the provision, optimal processing can be efficiently performed.

Further, the image processing apparatus of the present invention is provided with a register file between the processing means for performing perspective transformation and the edge expansion means, and transfers data for several polygons at once, thereby reducing wasteful processing. can do.

Furthermore, the image processing apparatus of the present invention multiplies the texture map data by the perspective-transformed Z value, develops the multiplied texture map data into pixels, and the pixel-developed texture map data is perspective-transformed into Z.
By dividing by the value, texture mapping considering depth can be performed.

The circuit scale can be reduced by using a 2-numerator / denominator divider as the pixel expanding means.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a first embodiment of the present invention.

FIG. 2 is a block diagram showing a shifter circuit forming an input unit of an edge expansion circuit.

FIG. 3 is a block diagram showing a configuration of a register file used in the present invention.

FIG. 4 is a block diagram showing an example of an edge expansion circuit.

FIG. 5 is a schematic diagram showing polygon data.

FIG. 6 is a block diagram showing an overall configuration of a second embodiment of the present invention.

FIG. 7 is a block diagram showing an example of an edge expansion circuit.

FIG. 8 is a block diagram showing an example of an initialization arithmetic circuit.

FIG. 9 is a block diagram showing an example of an interpolation circuit.

FIG. 10 is a block diagram showing a configuration example of an addition circuit used in an interpolation circuit.

FIG. 11 is a block diagram showing a configuration example of an addition circuit that interpolates a plurality of parameters.

12 is a block diagram showing an interpolation circuit using the addition circuit of FIG.

FIG. 13 is a block diagram showing an example of a pixel expansion circuit.

FIG. 14 is a block diagram showing a configuration of an inverse conversion circuit.

FIG. 15 is a block diagram showing a configuration of a pixel expansion circuit.

FIG. 16 is a circuit diagram showing a specific configuration of a 2-numerator / denominator divider.

FIG. 17 is a schematic diagram showing an operation of color calculation.

FIG. 18 is a schematic diagram showing the color intensity of FR.

FIG. 19 is a block diagram showing a configuration of a color calculation unit.

FIG. 20 is a block diagram when a microprocessor unit and subsequent components are parallelized.

FIG. 21 is a diagram showing a relationship between polygons and Z values.

FIG. 22 is a diagram showing a relationship between polygons and Z values.

[Explanation of symbols]

 1 Microprocessor part 2 Edge expansion circuit 3 Pixel expansion circuit 4 Texture mapping memory 5 Color operation circuit

Claims (11)

[Claims] 1. In a stereoscopic image processing method using the Z buffer method for hidden surface processing, when the value of the front clip plane is CZF and the value of the rear clip plane is CZB, CZF and C
When the distance from ZB becomes large, the perspective transformation value of the Z value is based on Zs = 1-CZF / Ze (where Zs is the Z value on the screen coordinates and Ze is the Z value on the visual field coordinates). A three-dimensional image processing method characterized by calculating. 2. A stereoscopic image processing method using the Z buffer method for hidden surface processing, wherein CZF is the value of the front clip plane and CZB is the value of the rear clip plane, and CZF and C
When the distance from ZB is sufficiently large or when backward clipping is not performed, the perspective transformation value of the Z value is Zs = CZ.
F / Ze (where Zs is the Z value on the screen coordinate, Z
e is a Z value on the visual field coordinates). 3. In a stereoscopic image processing method using the Z buffer method for hidden surface processing, when the value of the front clip plane is CZF and the value of the rear clip plane is CZB, CZF and C
Z value (Zs) in screen coordinates when the distance from ZB is large enough or when backward clipping is not performed
Is a value obtained by left-shifting 1 / Ze (Ze is a Z value on the visual field coordinates) according to the value of the front clipping plane. 4. The stereoscopic image processing method according to claim 3, wherein an output obtained by calculating 1 / Ze is shifted according to the value of CZF by a barrel shifter or a multiplexer. 5. A processing means for perspective-transforming a Z value by the method according to any one of claims 1 to 3, and the Z value, the screen data of the polygon to be displayed, and the texture map address data between two points on the polygon side. A means for performing edge expansion by interpolation processing, a means for performing pixel expansion of each edge expanded data by interpolation processing between two edge points, and a means for reading texture data from the texture mapping memory according to the pixel expanded texture map address data. An image processing apparatus comprising: 6. The image processing apparatus according to claim 5, wherein a register file is provided between the processing means for performing perspective transformation and the edge expansion means, and data for several polygons is transferred at one time. 7. The texture map address data is multiplied by a perspective-transformed Z value, the multiplied texture map address data is expanded into pixels, and the pixel-developed texture map data is divided by the perspective-converted Z value. The image processing device according to claim 5 or 6. 8. The edge expanding means feeds back a first multiplexer into which a slope of a side forming a polygon is input, a shift register storing the slope data, and an output from the shift register to feed back the first multiplexer. 1 means for giving to the multiplexer, an adder having the output of the shift register as one input, a second multiplexer to which the output of the adder and starting point data are input, and an output from the second multiplexer. 7. The image processing apparatus according to claim 5, further comprising a shift register for storing the shift register, and means for giving an output from the shift register to the adder circuit. 9. The image processing apparatus according to claim 5, wherein a 2-numerator / denominator divider is used as the pixel expanding means. 10. The luminance value data is multiplied by a perspective-transformed Z value, the multiplied luminance value data is subjected to pixel expansion, and the pixel-expanded luminance value data is divided by the perspective converted Z value. Item 7. The image processing device according to Item 5 or 6. 11. The image processing apparatus according to claim 5, further comprising a transparent mapping memory that stores a flag indicating whether or not it is transparent.