JPH0865170A - Module type audio data processing method - Google Patents

Abstract

PURPOSE: To obtain a module type audio data processing system which can perform MPEG standard and other audio data compressing and expanding operations at low cost. CONSTITUTION: An audio data processing system 10 includes a control processor 12 which is coupled with an execution controller 22 through a bus 21. The control processor operates as a master processor which controls the execution controller, which controls a multiplier accumulator 28. An auxiliary data handier 20 is also included which takes auxiliary data out of an input FIFO buffer 18. The control processor takes audio data out of an input buffer and outputs processed audio data through an output block 30.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to electronic systems, and more particularly to a modular audio data processing system and its operating method.

[0002]

2. Description of the Related Art Motion Picture Experts Group (MPEG: Motion Pict)
ure Expert Group) is ISO-1
1172 compression and decompression algorithms used for digital transmission and reception of audio and video (com
compression and decommmpressi
MPEG audio / video standard relating to on-algorithm (hereinafter referred to as "MPEG standard"). The MPEG standard has a function of efficiently compressing data according to an established psychoacoustic model, and can transmit CD-quality audio and video images in real time, decompression and broadcast. I am trying. The MPEG standard is very useful for a variety of products including digital compact cassette decoders, encoders, minidisk decoders, encoders, other decoders using the MPEG standard, encoders. In addition, various other audio standards such as the Dolby standard also include encoding and decoding audio / video data transmitted in digital form.

To transmit compressed digital data, a data stream that is received and processed at a rate of 15 megabits / second or higher is used. MP
Prior systems that have been used to perform EG and other digital compression and decompression operations required expensive digital signal processors and extended support memory. Other architectures have included a large amount of dedicated circuitry which has not been easily applied to applications using new digital data compression or decompression. Compressing audio and video data for digital transmission of information is similar to encoding and reproducing audio and video signals from media such as digital compact cassettes and minidiscs, as well as television and video. It will soon be used in large-scale transmission systems for radio broadcasting.

In this way, a system capable of performing compression / expansion of audio data at a cost lower than that associated with a system centered on a programmable digital signal processor is realized, and the system is adapted to various compression / expansion applications. There has been a need to consider the degree of modularity so that can be adapted.

[0005]

SUMMARY OF THE INVENTION In accordance with the teachings of the present invention, an integrated audio data processing system is described in which the drawbacks associated with conventional systems and methods for compressing and expanding audio data are greatly reduced or eliminated. There is.

According to one embodiment of the present invention, an execution control unit.
A data processing system including a control processor coupled to the. The execution control unit is further coupled to a multiplier / accumulator. The control processor inputs the data stream and, depending on the specific action required of the system,
It outputs either the encoded or decoded data stream.

According to another embodiment of the present invention, there is a data processing system including a control processor capable of receiving a data stream via an input buffer.
Ancillary data handler
The handler is coupled to the input buffer and retrieves ancillary data from the input data stream (retr).
ieve) The auxiliary data can be output. The control processor causes the execution control unit to dequantize, transform and filter the compressed data in the input stream. The dequantized, transformed and filtered data is then output by the control processor.

[0008]

BRIEF DESCRIPTION OF THE DRAWINGS The technical advantages of the present invention may be more fully appreciated with reference to the accompanying drawings. In the figures, the same reference numerals indicate the same mechanism.

INTRODUCTION The present invention is used to efficiently encode or decode a serial data stream in order to perform data compression and decompression operations using various syntaxes, including the MPEG standard syntax. A modular audio data processing system is included. In order to process the serial data stream in real time, the system according to the invention must be able to receive and process the bit stream at variable rates up to 15 Mbit / s. further,
A bitstream can include multiple multiplexed data sets. These datasets include audio data, video data, and auxiliary data (ancil).
array data) are included. The system according to the invention must be able to retrieve the particular data set to be processed in the data stream and also to retrieve and output any ancillary data, while maintaining the integrity of said ancillary data. At the same time, processing of other datasets must not be interrupted.

When processing an audio data stream, the system according to the present invention may be assigned to the assignee of the present application as a US patent application, serial no. 08 / 021,00
7, "Integrated Audio Decoding System and Method of Operation", US Patent Application, Serial No. 08 / 054,1
27, "Audio Decoding Circuit and Method", US Patent Application, Serial No. 08 / 054,768, "Hardware Filter Circuit", US Patent Application, Serial No. 0
8 / 054,126 "System Decoding Circuit and Operating Method"
Although various systems and methods for decoding audio data described in (hereinafter referred to as the "Audio Decoder Patent") are available, these systems are hereby referred to by these patent applications. The disclosure of the patent application is fully incorporated herein.

General Scheme Referring to FIG. 1, an audio data processing system 10 including a control processor 12 is shown. The control processor 12 scheme may include the system described above with reference to FIG. 3 of the Audio Decoder Patent incorporated herein or any other suitable programmable arithmetic logic unit design. Generally, the control processor 12
Acts as a master processor for system 10 and controls the operation of processing data received by system 10. The control processor 12 is a microcode read-only memory 1
4. Use the microcoded routine stored in 4. The control processor 12 is also coupled to a random access memory 16, which is used as a scratchpad memory for the control processor 12 to store intermediate values during audio data processing. System 10 receives the serial data stream in input FIFO buffer 18.
The input FIFO buffer 18 includes an address / data bus 21 by the control processor 12 and the auxiliary data handler 20.
(Address and data bas). The control processor 12 accesses the data stored in the buffer 18 by the first-in first-out method and transfers the data to the execution controller 22 via the bus 21.

The execution controller 22 includes a microcode controlled state machine and executes routines stored in the microcode read only memory 24. The execution controller 22 is
Random access memory 26 is used to store the values received from control processor 12 via bus 21 and to store intermediate results of data processing operations during encoding and decoding of audio data.

The execution controller 22 is a multiplier / accumulator 28.
Is bidirectionally coupled with. The multiplier / accumulator 28 is shown in FIG. 4 of the Audio Decoder Patent previously incorporated into the present disclosure.
And can be advantageously made using the scheme disclosed in FIG. The multiplier / accumulator 28 is a fast Fourier transform or a discrete cosine transform.
transforms), multiplication operations, division operations, combined multiplication and accumulation operations. In addition, operations such as addition, subtraction, negation and shift operations are multiplication
It can be performed by the accumulator 28. Working under the control of the control processor 12, the system 10 processes data using an execution controller and a multiplier / accumulator 28 to provide an output block 30 coupled and accessed via the bus 21. Output the processed data via. In addition, control processor 12 provides status information via status register 32 to various other systems coupled to audio data processing system 10. Status register 32
Tells the input data stream the stored values for the header of the latest frame of audio data and the synchronization status of the system 10.

As described above, the input data stream can include audio data and video data as well as auxiliary data. The auxiliary data conveys various kinds of information or the audio data processing system 10. Used by various systems coupled to the audio data processing system 10 to control the systems associated with the. Therefore, (As suc
h,), the auxiliary data contained in the input data stream is critical and must be handled carefully by the data processing system 10. The system 10 causes the input buffer 18 to tap the tap point (ta
p_point) and at the same time auxiliary data can be fetched from the input buffer 18, while other data is in control processor 12, execution controller 2
2. Being processed in the multiplier / accumulator 28 is an important technical advantage of the present invention. The auxiliary data handler 20 receives the head position of the auxiliary data arranged in the input buffer 18 from the control processor 12, and extracts the auxiliary data from the input buffer 18 via the bus 21. In this way, a large amount of auxiliary data in the input data stream can be transferred from the input buffer 18 and output to a system external to the system 10, so that the input buffer 18 is filled with new data from the input data stream. . The start position of the auxiliary data in the specific frame of the audio data can be calculated from the information in the header.
The method used to perform this calculation is described in more detail with reference to FIG.

System Operation FIGS. 2-5 are flowcharts illustrating certain operations of the audio data processing system 10. Further, for more advanced operations performed by audio data processing system 10, reference is specifically made to FIGS. 11-31 of the previously incorporated audio decoder patent.

Audio Data Decoding Operation FIGS. 2a and 2b show an audio data processing system 1.
9 is a flowchart showing an operation of audio data decoding executed by 0. The method according to the invention starts at step 100, where all variables used in the operation according to the invention are initialized. The method then proceeds to step 102, where the input FIFO buffer 18 is checked for data. Input FIFO buffer 18
If there is no data, the buffer 18 is continuously checked until there is data. Once there is data, the method proceeds to step 104, where the method branches to a subroutine that restores synchronization with the data stream. The synchronization recovery operation will be described in more detail with reference to FIG. When synchronization is restored in step 104, the method proceeds to step 106, where the input / output rate balance calculation is performed.
ce calculations) are performed. The I / O rate balancing calculation serves to ensure that the input FIFO buffer 18 does not overflow or underflow. The system 10 then compares the free space in the buffer 18 or the amount of processed data to the running average (runni) of the amount of unprocessed data in the buffer 18.
ng average). Next, system 1
Zero outputs a signal representing this average to the various systems associated with system 10 to regulate the rate of the input data stream to prevent buffer 18 overflow or underflow. Operations associated with the input / output speed balancing calculation will be described in more detail with reference to FIG.
Once this calculation has been performed in step 106, the method proceeds to step 108 where the velocity balancing information is output, eg pulse width modulated. A suitable method and system for performing this velocity balancing calculation is described in U.S. Patent Application Serial No. 08/07
1, 744, "Methods and Apparatus for Synchronizing to a Bitstream", the disclosure of which is hereby incorporated by reference into these patent applications. (Hereinafter, referred to as "velocity balancing patent").

The method proceeds to step 110 where the control processor 12 extracts header information (headereri) from the data stream stored in the input buffer 18.
nformation), bit allocation information (bit a
location information, scale factor selection information (scale factor sel)
ct information). These portions of the data stream are decoded by the control processor 12 in step 110. The content and format of these pieces of information are described in detail in the Audio Decoder patent. The decoded header is placed in the status register 32 by the control processor 12. The method proceeds to step 112, where two values are calculated using information gathered from header information, bit allocation information, and scale factor selection information. The first value calculated is the auxiliary data size variable, which is a value representing the amount of auxiliary data contained in the frame associated with the header decoded in step 110. The second value is the audio data size value, which likewise represents the amount of audio data contained in the frame associated with the header decoded in step 110. These values are calculated using the information contained in the header as well as the bit allocation information and scale factor selection information. The method then proceeds to step 114, where the auxiliary data size value and the audio data size value are used to perform the auxiliary pointer check. The method used to perform the auxiliary pointer check is described in more detail with reference to FIG. In general, the auxiliary data size value and the audio data size value are used to determine when the dividing point of the audio data and the auxiliary data is made to reside in the input buffer 18. This is based on the fact that the frame size may be larger than the size of the input buffer 18. Therefore, the auxiliary data handler 2
A 0 must enter the active state when the first ancillary data in a particular frame becomes available in the input buffer 18.

The method comprises steps 114 through 11
Proceed to 6 where a determination is made whether there is a CRC word. This information is included in the header. If there is a CRC, the method proceeds to step 118, where C is the case where there is no bit error in the part protected by the CRC word.
A determination is made whether the RC calculation is valid. If the CRC calculation is not valid, the method proceeds to step 120 where the sync state variable stored in state register 32 is set equal to "2" and is associated with the rest of system 10 and system 10. Indicates to the system that it is out of sync with the input data stream. The method attempts to recover synchronization and error correction routines (errors) until the synchronization can be recovered.
process 120), the process proceeds from step 120 to step 104.

If the CRC calculation in step 118 is valid, the method proceeds to step 122, where scale factor information is extracted and decoded from the data stream. The various methods used to perform this operation are described in detail in the audio decoder patents incorporated above.

The method comprises steps 122 through 12
Proceed to step 4, where the auxiliary pointer check is performed once again. The method used to perform the auxiliary pointer check is described in detail with reference to FIG. The method continues from step 124 to Figure 2b and proceeds to step 126 where the block variable is set equal to "0". According to the MPEG syntax, there are 12 blocks of compressed audio data per frame. To prevent the loss of auxiliary data, the method according to the invention performs an auxiliary pointer check after the data of each block has been decoded. Thus, the method proceeds from step 126 to step 128 where a block of compressed audio data is decoded. The method used to decode the subbands of compressed audio data is described in detail in the previously incorporated Audio Decoder patent. Next, the method comprises steps 128 to 13
Proceed to 0, where the auxiliary pointer check is performed once again.

The method then proceeds to step 132, where the block variable is incremented. The method then proceeds to step 134, where the block variable is compared to the number "12". If the block variable has not reached the number "12", the method returns to step 128 where the next subband block is decoded. If the block variable is equal to "12" in step 134, decoding of the entire frame is complete and the method proceeds to step 136 where the auxiliary pointer flag (ANC_PTR_FLG) is examined. The auxiliary pointer flag is set equal to "1" as long as the auxiliary data handler is operating on the auxiliary data in the input buffer 18. Therefore, in step 136 control processor 12 continues to check the auxiliary pointer flag until the auxiliary data handler sets the auxiliary pointer flag equal to "0". When the auxiliary data handler 20 has finished outputting the auxiliary data, the auxiliary pointer flag is equal to "0" and the method proceeds from step 136 to step 138 where the next 32 bits of the input data stream are:
It is read as the header of the next frame of audio data.

The method then proceeds to step 140 where the first 12 bits of the new header are checked for sync words. MPEG
According to the syntax of, 12 "1" s are used as the synchronization word. If the first 12 bits are all "1",
The method returns to step 106 shown in Figure 2a, where the I / O rate balancing calculation is performed. The first one in the header
If the two bits are not all "1" s, the method proceeds to step 142 where a determination is made as to whether there is a CRC word. If it is determined in step 142 that there is a CRC, the method returns to step 106 and proceeds to step 118 according to the method previously described, where CR is
It is checked whether C is valid. C in step 142
If there is no RC, the method proceeds to step 144,
Now the sync state variable in the status register 32 is set equal to "2" to indicate that sync has been lost. The method then proceeds to step 146 where the control processor 12
Backs up 11 bits of the bitstream.
The method then returns to step 104, where sync recovery and error correction operations are performed.

The CRC word may be used by the system 10 as sync information, even if the sync word contained in the bitstream is invalid or it is clear that the data stream contains no sync information. That is an important technical advantage in the present invention. As explained earlier, the first 12 bits of the new frame are shown in Figure 2b.
If there is a CRC word as determined in step 142, even if it is not a synchronization word as determined in step 140 of step 138, then the method proceeds if step 118 determines that the CRC word is valid. Decode this frame. Thus, to conclude that they are in sync, C
RC information is used to prevent loss of synchronization due to a 1-bit error in the sync word. Moreover, the CRC information can be used to determine that synchronization is achieved even though the syntax of the data stream does not include an explicit data field containing the sync word. The method according to the invention can handle either single states or combined states.

Sync Recovery and Error Handling FIG. 3 illustrates the sync recovery and error handling used by the system 10 to recover synchronization with the input data bitstream and output muted audio data via the output block 30. It is a flowchart showing a procedure. The method begins at step 150, where M
The AC busy flag (MAC_BUSY_FLAG) is checked. The MAC busy flag indicates whether the multiplier / accumulator 28 is busy. If the MAC busy flag is set equal to "1" indicating that the multiplier / accumulator is busy, then the MAC busy flag is set equal to "0" and the multiplier / accumulator 28 is empty. Until indicated, the method waits at step 150.
The method then proceeds to step 152 where the header is set equal to FFFF000 (hexadecimal) and layer 1
Indicates that it is a header (layer one header). The method then proceeds to step 154, where
Here the count variable is set equal to "0". The count variable is bits per codeword.
r code word) and the scale factor used in the muting operation. The method proceeds to step 156 where the bits per codeword for the latest value of the count variable are set equal to "0". The bits per codeword and scale factor are stored in random access memory 26 for operation by execution controller 22 and multiplier-accumulator 28. The method then proceeds to step 158, where the scale factor information associated with the most recent value of the count variable is set equal to "0". The method then proceeds to step 160, where the count variable is incremented. The method then proceeds to step 162 where the count variable is "64".
Compared to. If the count variable is less than "64", the method returns to step 156 where the next set of bits per codeword and scale factor is also set equal to "0". Step 156 to Step 16
2 affects outputting 64 sets of bits per codeword and scale factor associated with one block of muted audio data. It is an important technical advantage of the present invention that system 10 is capable of muting one block of data. As a result, the system according to the present invention can double the resolution of error correction in various systems that perform error correction frame by frame.

Once a block of audio data has been stored in random access memory 26, as indicated by the count variable equal to 64 in step 162, the method proceeds to step 164 where the FILTER instruction controls. It is sent from the processor 12 to the execution controller 22. According to the filter instruction, the execution controller uses the multiplier / accumulator 28 to perform the dequantization operation, the conversion operation, and the filtering operation on the audio data stored in the random access memory 26.
These operations are described in detail in the audio decoder patents incorporated above.

The method then proceeds to step 166 where the MAC busy flag is set equal to "1",
The system 10 confirms that the multiplier / accumulator 28 is occupied.
Shown in the rest of the. The method then proceeds to step 168 where the repeat buffer flag (REPEAT_
BUFER_FLAG) is set equal to "1".
REPEAT_BUFFER_FLAG instructs the execution controller 22 to REPEAT the same audio data associated with the muted audio block.
It is used to output continuously until _BUFFER_FLAG is cleared. Thus, in order to output a series of muted audio blocks,
It is necessary to execute the setup of muted audio data, which is performed only once, when the above-described steps 156 to 162 are repeatedly performed. Next, REPEAT_BUFFER
_FLAG is set and remains set until the control processor 12 places a sync word or valid CRC string in the data stream. Therefore, the processing capacity of the control processor 12 is released in order to search whether it is not synchronized with the bit stream, and the muted audio data is REPEAT_BUFFER_F.
It is automatically output via the output block 30 until the LAG is cleared.

The method comprises steps 168 through 17
Proceed to 0, where it is checked to see if the next 12 bits contain a sync word. If at step 170 the next 12 bits do not contain a sync word, the method proceeds to step 172 where the control processor 12 backs up 11 bits of the bitstream and returns to step 170 where the same check is performed again. Run.
If at step 170 the next 12 bits always contain a sync word, the method proceeds to step 174 where the header register of status register 32 is the sync word concatenated to the next 20 bits of the bitstream. Set equal.

The method then proceeds to step 176, where a determination is made as to whether the word count is greater than half the size of the input buffer 18. The word count is a variable indicating the number of words stored in the input buffer 18. Therefore, the decision in step 176 is
It is an essential decision as to whether the input buffer is larger than half full. If the input buffer 18 is not more than half full, the method remains at step 176 until sufficient data has been input to the input buffer 18 from the input data stream. This step ensures that the input buffer 18 never underflows. If the input buffer 18 is more than half full, the method proceeds from step 176 to step 178 where REPEAT_BUFER_F.
LAG is set to "0" and instructs the execution controller 22 to stop outputting the muted block of audio data. This method is step 1
Proceeding to 80, the sync state variable is now set equal to "3" to indicate that the system 10 has synchronized with the incoming data stream.

Input / Output Rate Balancing Calculations FIG. 4 is a flow chart illustrating a method by which the system 10 according to the present invention implements input / output rate balancing calculations. These calculations are also described in the previously incorporated velocity balancing patent. The method begins at step 190, where the sum variable (sum variable1e) is set equal to the sum of the previous value for the sum variable and the word count variable. This sum is initialized equal to "0" in step 100. The word count variable is the input buffer 18
Maintained to be equal to the number of words in. The method proceeds to step 192, where the sample count variable is incremented. The sample count variable is also set equal to "0" in step 100 described above. The sample count variable indicates the number of times the word count was sampled. The method then proceeds to step 194, where the sample count variable is the average point variable (average po).
int variable) is set equal to. The mean point variable is a programmable value that sets the number of samples needed before averaging. If the average point has not been reached, the method ends. If the average point is equal to the number of sample counts, the method proceeds from step 194 to step 196, where the average of word counts is calculated equal to the sum divided by the sample count variable. The method then proceeds to step 198 where the average free word count (a) is calculated as the difference between the buffer size and the average word count.
The average empty word count) is calculated. The buffer size is equal to the size of the input buffer 18. The method then proceeds to step 200, where the summing variable is again set equal to "0".
The method then proceeds to step 202, where the sample count variable is again set equal to "0".
After this, the method ends.

As described above, the information calculated by the method described in FIG. 4 has a duty cycle proportional to two values, the word count average value and the empty word count average value calculated as described above. Is pulse-width modulated and output. Thus, the average fill level of the input buffer 18 may be communicated to various systems associated with the audio data processing system 10 to allow for regulation of the rate at which the input data is transmitted to the system 10 and specifically the input buffer 18. By thus providing the feedback signal associated with the value calculated by the method described in FIG. 4, the underflow or overflow of the input buffer 18 and the error caused by this underflow or overflow can be avoided. .

Auxiliary Pointer Check FIG. 5 illustrates the system 10 for determining whether a break point between auxiliary data and audio data in a particular frame is always resident in the input buffer 18. 3 is a flow chart representing the method used by. As described previously, the auxiliary pointer check operation is performed on each block of data to ensure that no auxiliary data has been lost and that audio data processing is not interrupted.

The method begins at step 204, where the auxiliary pointer flag is checked. If the beginning of the auxiliary data in the data stream is within the bounds of the input buffer 18, then the auxiliary pointer flag is set equal to "1". If the auxiliary pointer flag is already set equal to "1", the method ends. If the auxiliary pointer flag is not set equal to "1", the method proceeds to step 206 where a determination is made as to whether the difference between the size of the audio data and the bit count is less than the size of the buffer. . As explained earlier, the size of audio data indicates the amount of audio data in a particular frame,
It is determined from header information, bit allocation information, and scale factor selection information. The bit count variable indicates the number of bits already read in a particular frame. The difference between the size of the audio data and the bit count indicates the number of bits of audio data that has not yet been read. If this amount is not less than the size of the buffer, the method ends. If the difference is less than or equal to the size of the buffer, the breakpoint between the audio data and auxiliary data in the particular frame resides within the boundaries of the input buffer 18, and the method proceeds to step 208. In step 208, the auxiliary data pointer is set equal to the difference between the size of the audio data and the bit count.

The auxiliary data pointer serves as a tap point for the auxiliary data handler 20 to move auxiliary data from the input FIFO buffer 18 and output the auxiliary data. The method then proceeds to step 210, where the auxiliary count variable is set equal to the previously calculated auxiliary data size. The auxiliary count variable is decremented by the auxiliary data handler 20. When the auxiliary count variable is set equal to "0", the auxiliary data handler 20 resets the auxiliary pointer flag to "0" and the rest of the system 10 receives the auxiliary data in the latest frame from the input FIFO buffer 18. It is taken out and is output to a system associated with the system 10. The method proceeds to step 212, where the auxiliary data pointer flag is set equal to "1". The method then ends.

As described above, the audio data processing system 10 is designed to process the auxiliary data resident in the compressed data frame with high efficiency. The auxiliary data is output as soon as it is taken out of the input buffer 18 and prevents the interface for processing the auxiliary data and the audio data in the frame from disappearing.

With reference to the various processes involved in decoding compressed audio data, the system 10 according to the present invention is described.
I have explained. However, it should be understood that the scheme according to the invention is equally applicable to other data processing applications. For example, by modifying the microcoded operations that control the control processor 12, the scheme according to the invention can be used for encoding and compression of audio data. Thus, while the invention has been described in detail, various modifications, substitutions, and partial alterations to the embodiments described herein may be made without departing from the spirit and scope of the invention as defined by the appended claims. You have to understand that it can be reworked.

With respect to the above description, the following items will be further disclosed. (1) A data processing system capable of processing a data stream, the input buffer capable of receiving and storing an input data stream, and capable of being coupled to the input buffer and extracting audio data from the input buffer. A control processor, an execution controller coupled to the control processor, capable of receiving data from the control processor and instructing processing of data received from the control processor; and coupling to the execution controller, to the execution controller A multiplier / accumulator capable of performing the processing of data received from the control processor as instructed, coupled to the input buffer, extracting auxiliary data from the input buffer, and extracting the extracted auxiliary data. Auxiliary hand that can output Data processing system comprising: the chromatography, the.

(2) The system according to the first item, wherein the processing includes dequantization, conversion, and filtering of the data stream to decode the audio data.

(3) The system according to the first item, wherein the processing includes quantization and conversion of the data stream to encode the data stream.

(4) The system of claim 1, further comprising an output buffer coupled to the control processor and capable of receiving and storing processed data from the control processor. system.

(5) The system according to the first aspect, further comprising a microcode memory coupled to the control processor and capable of storing an instruction sequence for instructing an operation of the control processor. System to do.

(6) The system according to the first aspect, further comprising a microcode memory coupled to the execution controller and capable of storing an instruction sequence for instructing an operation of the execution controller. System to do.

(7) The system of claim 1, wherein the status register is coupled to the control processor and is capable of storing and outputting status information including information indicating a synchronization status of the system related to the data stream. A system further comprising:

(8) A data processing system capable of processing a data stream including multiplexed audio data and auxiliary data, wherein the data processing system is coupled to the input buffer and extracts audio data from the input buffer. A control processor capable of performing the above-mentioned control processor, an execution controller coupled to the control processor, capable of receiving data from the control processor and instructing dequantization, conversion, and filtering of the data received from the control processor; A multiplier / accumulator that is combined and is capable of performing the inverse quantization, transforming, and filtering of data received from the control processor as directed by the execution controller;
An auxiliary handler, coupled to the input buffer, capable of extracting auxiliary data from the input buffer, and outputting the extracted auxiliary data, coupled to the control processor and receiving processed data from the control processor, And an output buffer that can store
A first microcode memory coupled to the control processor and capable of storing an instruction sequence for instructing an operation of the control processor; and an instruction sequence coupled to the execution controller and instructing an operation of the execution controller. A microcode memory capable of storing a status register, and a status register coupled to the control processor, capable of storing and outputting status information including information indicating a synchronization status of the system related to the data stream. A data processing system comprising:

(9) A method for processing a data stream, which comprises receiving a data stream in an input buffer, detecting that synchronization with the data stream has been lost,
Instructing the execution controller to provide a predetermined data set corresponding to the muted output to the execution controller in response to the detecting step and to continue operation on the predetermined data set until synchronization is restored. To the execution controller,
A method comprising recovering synchronization in the data stream.

(10) The method according to item 9, wherein the data in the data stream is processed by dequantizing, transforming, and filtering after the synchronization is restored. The method further comprising the step of outputting the data.

(11) The method according to the ninth item, wherein a tap point is set in the input buffer by determining whether there is auxiliary data in the input buffer and using an auxiliary data handler responsive to the step of determining. Then, the method further comprises the steps of: extracting auxiliary data starting from the tap point from the input buffer, and outputting the extracted auxiliary data.

(12) A method of processing an encoded data stream, wherein a CRC word is arranged in the data stream, the CRC word is used to determine whether the data stream is valid, and If the stream does not have a valid sync word, the method further comprises using the step of determining whether the data stream is valid to determine synchronization with the data stream.

(13) A method according to item 12, further comprising the step of retrieving the data stream for a valid sync word.

(14) The method described in the twelfth item, wherein the data stream does not include a dedicated synchronization word.

(15) An audio data processing system (10) is described that includes a control processor (12) coupled to an execution controller (22) via a bus (21). The control processor (12) is an execution controller (2
2) Acts as a master processor to control
The execution controller then controls the multiplier / accumulator (28). An auxiliary data handler (20) is provided to retrieve auxiliary data from the input FIFO buffer (18). Audio data is retrieved from the input FIFO buffer (18) by the control processor (12),
The processed audio data is output via the output block (30).

[Brief description of drawings]

FIG. 1 is a schematic block diagram of an audio data processing system designed in accordance with the teachings of the present invention.

2A and 2B are flowcharts illustrating the operation of the audio data processing system according to the present invention, wherein a is a flowchart illustrating the operation of the audio data processing system according to the present invention, and b is the operation of the audio data processing system according to the present invention. FIG.

FIG. 3 is a flow chart for explaining the operation of the audio data processing system according to the present invention.

FIG. 4 is a flowchart diagram for explaining the operation of the audio data processing system according to the present invention.

FIG. 5 is a flow chart for explaining the operation of the audio data processing system according to the present invention.

[Explanation of symbols]

10 Audio Data Processing System 12 Control Processor 14 Microcode Read-Only Memory for Control Processor 16 Random Access Memory for Control Processor 18 Input FIFO Buffer 20 Auxiliary Data Handler 21 Address Data Bus 22 Execution Controller 24 Microcode Read-Only Memory for Execution Controller 26 Random access memory for execution controller 28 Multiplier / accumulator 30 Output block 32 Status register

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[Procedure amendment]

[Submission date] December 9, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Correction content]

[Document name] Statement

Title: Modular audio data processing system

[Claims]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to electronic systems, and more particularly to a modular audio data processing system and its operating method.

[0002]

2. Description of the Related Art Motion Picture Experts Group (MPEG: Motion Pict)
ure Expert Group) is ISO-1
1172 compression and decompression algorithms used for digital transmission and reception of audio and video (com
compression and decommmpressi
MPEG audio / video standard relating to on-algorithm (hereinafter referred to as "MPEG standard"). The MPEG standard has a function of efficiently compressing data according to an established psychoacoustic model, and can transmit CD-quality audio and video images in real time, decompression and broadcast. I am trying. The MPEG standard is very useful for a variety of products including digital compact cassette decoders, encoders, minidisk decoders, encoders, other decoders using the MPEG standard, encoders. In addition, various other audio standards such as the Dolby standard also include encoding and decoding audio / video data transmitted in digital form.

To transmit compressed digital data, a data stream that is received and processed at a rate of 15 megabits / second or higher is used. MP
Prior systems that have been used to perform EG and other digital compression and decompression operations required expensive digital signal processors and extended support memory. Other architectures have included a large amount of dedicated circuitry which has not been easily applied to applications using new digital data compression or decompression. Compressing audio and video data for digital transmission of information is similar to encoding and reproducing audio and video signals from media such as digital compact cassettes and minidiscs, as well as television and video. It will soon be used in large-scale transmission systems for radio broadcasting.

In this way, a system capable of performing compression / expansion of audio data at a cost lower than that associated with a system centered on a programmable digital signal processor is realized, and the system is adapted to various compression / expansion applications. There has been a need to consider the degree of modularity so that can be adapted.

[0005]

SUMMARY OF THE INVENTION In accordance with the teachings of the present invention, an integrated audio data processing system is described in which the drawbacks associated with conventional systems and methods for compressing and expanding audio data are greatly reduced or eliminated. There is.

According to one embodiment of the present invention, an execution control unit (execution control unit).
The data processing system includes a control processor coupled to t). The execution control unit further includes a multiplier / accumulator.
Is joined to. The control processor inputs the data stream and outputs either the encoded or decoded data stream, depending on the particular operation required by the system.

According to another embodiment of the present invention, there is a data processing system including a control processor capable of receiving a data stream via an input buffer.
Ancillary data handler
The handler is coupled to the input buffer and retrieves ancillary data from the input data stream (retr).
ieve) The auxiliary data can be output. The control processor causes the execution control unit to dequantize, transform and filter the compressed data in the input stream. Then dequantized, transformed,
The filtered data is output by the control processor.

[0008]

BRIEF DESCRIPTION OF THE DRAWINGS The technical advantages of the present invention may be more fully appreciated with reference to the accompanying drawings. In the figures, the same reference numerals indicate the same mechanism.

INTRODUCTION The present invention is used to efficiently encode or decode a serial data stream in order to perform data compression and mediation operations using various syntaxes including the MPEG standard syntax. A modular audio data processing system is included. In order to process the serial data stream in real time, the system according to the invention must be able to receive and process the bit stream at variable rates up to 15 Mbit / s. further,
A bitstream can include multiple multiplexed data sets. These datasets include audio data, video data, and auxiliary data (ancil).
array data) are included. The system according to the invention must be able to retrieve the particular data set to be processed in the data stream and also to retrieve and output any ancillary data, while maintaining the integrity of the ancillary data. At the same time, processing of other datasets must not be interrupted.

When processing an audio data stream, the system according to the present invention may be assigned to the assignee of the present application as a US patent application, serial no. 08 / 021,00
7, "Integrated Audio Decoding System and Method of Operation", US Patent Application, Serial No. 08 / 054,1
27, "Audio Decoding Circuit and Method", US Patent Application, Serial No. 08 / 054,768, "Hardware Filter Circuit", US Patent Application, Serial No. 0
8 / 054,126 "System Decoding Circuit and Operating Method"
Although various systems and methods for decoding audio data described in (hereinafter referred to as the "Audio Decoder Patent") are available, these systems are hereby referred to by these patent applications. The disclosure of the patent application is fully incorporated herein.

General Scheme Referring to FIG. 1, an audio data processing system 10 including a control processor 12 is shown. The control processor 12 scheme may include the system described above with reference to FIG. 3 of the Audio Decoder patent incorporated herein or any other suitable programmable arithmetic and logic unit design. Generally, the control processor 12
Acts as a master processor for system 10 and controls the operation of processing data received by system 10. The control processor 12 is a microcode read-only memory 1
4. Use the microcoded routine stored in 4. The control processor 12 is also coupled to a random access memory 16, which is used as a scratchpad memory for the control processor 12 to store intermediate values during audio data processing. System 10 receives the serial data stream in input FIFO buffer 18.
The input FIFO buffer 18 includes an address / data bus 21 by the control processor 12 and the auxiliary data handler 20.
(Address and databas). The control processor 12 accesses the data stored in the buffer 18 by the first-in first-out method and transfers the data to the execution controller 22 via the bus 21.

The execution controller 22 includes a microcode controlled state machine and executes routines stored in the microcode read only memory 24. Execution controller 22
Uses random access memory 26 to store the values received from control processor 12 via bus 21 and to store intermediate results of data processing operations during encoding and decoding of audio data.

The execution controller 22 is a multiplier / accumulator 28.
Is bidirectionally coupled with. The multiplier / accumulator 28 is shown in FIG. 4 of the Audio Decoder Patent previously incorporated into the present disclosure.
And can be advantageously made using the scheme disclosed in FIG. The multiplier / accumulator 28 is a fast Fourier transform or a discrete cosine transform.
transforms), multiplication operations, division operations, and combination operations of multiplication and accumulation. further,
Operations such as addition, subtraction, negation and shift operations can also be executed by the multiplier / accumulator 28. Working under the control of the control processor 12, the system 10 processes data using an execution controller and a multiplier / accumulator 28 to provide an output block 30 coupled and accessed via the bus 21. Output the processed data via. further,
The control processor 12 is the audio data processing system 1
Status register 32 to various other systems tied to 0
To provide status information via. The status register 32 conveys the stored values for the header of the most recent frame of audio data and the sync status of the system 10 to the input data stream.

As described above, the input data stream can include audio data and video data as well as auxiliary data. The auxiliary data conveys various kinds of information or the audio data processing system 10. Used by various systems coupled to the audio data processing system 10 to control the systems associated with the. Therefore, (As suc
h,), the auxiliary data contained in the input data stream is critical and must be handled carefully by the data processing system 10. The system 10 causes the input buffer 18 to tap the tap point (ta
p_point) and at the same time auxiliary data can be fetched from the input buffer 18, while other data is in control processor 12, execution controller 2
2. Being processed in the multiplier / accumulator 28 is an important technical advantage of the present invention. The auxiliary data handler 20 receives the head position of the auxiliary data arranged in the input buffer 18 from the control processor 12, and extracts the auxiliary data from the input buffer 18 via the bus 21. In this way, a large amount of auxiliary data in the input data stream can be transferred from the input buffer 18 and output to a system external to the system 10, so that the input buffer 18 is filled with new data from the input data stream. . The start position of the auxiliary data in the specific frame of the audio data can be calculated from the information in the bedder.
The method used to perform this calculation is described in more detail with reference to FIG.

System Operation FIGS. 2-5 are flowcharts illustrating certain operations of the audio data processing system 10. Further, for more advanced operations performed by audio data processing system 10, reference is specifically made to FIGS. 11-31 of the previously incorporated audio decoder patent.

Audio Data Decoding Operation FIGS. 2a and 2b show an audio data processing system 1.
9 is a flowchart showing an operation of audio data decoding executed by 0. The method according to the invention starts at step 100, where all variables used in the operation according to the invention are initialized. The method then proceeds to step 102, where the input FIFO buffer 18 is checked for data. Input FIFO buffer 18
If there is no data, the buffer 18 is continuously checked until there is data. Once there is data, the method proceeds to step 104, where the method branches to a subroutine that restores synchronization with the data stream. The synchronization recovery operation will be described in more detail with reference to FIG. When synchronization is restored in step 104, the method proceeds to step 106, where the input / output rate balance calculation is performed.
ce calculations) are performed. The I / O rate balancing subtraction serves to ensure that the input FIFO buffer 18 does not overflow or underflow. The system 10 then compares the free space in the buffer 18 or the amount of processed data to the running average (runni) of the amount of unprocessed data in the buffer 18.
ng average). Next, system 1
Zero outputs a signal representing this average to the various systems associated with system 10 to regulate the rate of the input data stream to prevent buffer 18 overflow or underflow. Operations associated with the input / output speed balancing calculation will be described in more detail with reference to FIG.
Once this calculation has been performed in step 106, the method proceeds to step 108 where the velocity balancing information is output, eg pulse width modulated. A suitable method and system for performing this velocity balancing calculation is described in U.S. Patent Application Serial No. 08/07
1, 744, "Methods and Apparatus for Synchronizing to a Bitstream", the disclosure of which is hereby incorporated by reference into these patent applications. (Hereinafter, referred to as "velocity balancing patent").

The method proceeds to step 110, where the control processor 12 extracts the header information (header) from the data stream stored in the input buffer 18.
information), bit allocation information (bit
allocation information, scale factor selection information (scale factor se)
lect information). These portions of the data stream are decoded by the control processor 12 in step 110. The content and format of these pieces of information are described in detail in the Audio Decoder patent. The decoded header is placed in the status register 32 by the control processor 12. The method proceeds to step 112, where two values are calculated using information gathered from header information, bit allocation information, and scale factor selection information. The first value calculated is the auxiliary data size variable, which is a value representing the amount of auxiliary data contained in the frame associated with the header decoded in step 110. The second value is the audio data size value, which likewise represents the amount of audio data contained in the frame associated with the header decoded in step 110. These values are calculated using the information contained in the header as well as the bit allocation information and scale factor selection information. The method then proceeds to step 114, where the auxiliary data size value and the audio data size value are used to perform the auxiliary pointer check. The method used to perform the auxiliary pointer check is described in more detail with reference to FIG. In general, the auxiliary data size value and the audio data size value are used to determine when the dividing point of the audio data and the auxiliary data is made to reside in the input buffer 18. This is based on the fact that the frame size may be larger than the size of the input buffer 18. Therefore, the auxiliary data handler 2
A 0 must enter the active state when the first ancillary data in a particular frame becomes available in the input buffer 18.

The method comprises steps 114 through 11
Proceed to 6 where a determination is made whether there is a CRC word. This information is included in the header. If there is a CRC, the method proceeds to step 118, where C is the case where there is no bit error in the part protected by the CRC word.
A determination is made whether the RC calculation is valid. If the CRC calculation is not valid, the method proceeds to step 120 where the sync state variable stored in state register 32 is set equal to "2" and is associated with the rest of system 10 and system 10. Indicates to the system that it is out of sync with the input data stream. The method attempts to recover synchronization and error correction routines (errors) until the synchronization can be recovered.
process 120), the process proceeds from step 120 to step 104.

If the CRC calculation in step 118 is valid, the method proceeds to step 122, where scale factor information is extracted and decoded from the data stream. The various methods used to perform this operation are described in detail in the audio decoder patents incorporated above.

The method comprises steps 122 through 12
Proceed to step 4, where the auxiliary pointer check is performed once again. The method used to perform the auxiliary pointer check is described in detail with reference to FIG. The method continues from step 124 to FIG.
Proceed to 26, where the block variable is set equal to "0". 1 per frame according to MPEG syntax
There are two blocks of compressed audio data. To prevent the loss of auxiliary data, the method according to the invention performs an auxiliary pointer check after the data of each block has been decoded. Thus, the method proceeds from step 126 to step 128 where a block of compressed audio data is decoded. The method used to decode the subbands of compressed audio data is described in detail in the previously incorporated Audio Decoder patent. Next, the method comprises steps 128 to 130.
Then, the auxiliary pointer check is executed once again.

The method then proceeds to step 132, where the block variable is incremented. The method then proceeds to step 134, where the block variable is compared to the number "12". If the block variable has not reached the number "12", the method returns to step 128 where the next subband block is decoded. If the block variable is equal to "12" in step 134, decoding of the entire frame is complete and the method proceeds to step 136 where the auxiliary pointer flag (ANC_PTR_FLG) is examined. The auxiliary pointer flag is set equal to "1" as long as the auxiliary data handler is operating on the auxiliary data in the input buffer 18. Therefore, in step 136 control processor 12 continues to check the auxiliary pointer flag until the auxiliary data handler sets the auxiliary pointer flag equal to "0". When the auxiliary data handler 20 has finished outputting the auxiliary data, the auxiliary pointer flag is equal to "0" and the method proceeds from step 136 to step 138 where the next 32 bits of the input data stream are:
It is read as the header of the next frame of audio data.

The method then proceeds to step 140 where the first 12 bits of the new header are checked for sync words. MPEG
According to the syntax of, 12 "1" s are used as the synchronization word. If the first 12 bits are all "1",
The method returns to step 106 shown in Figure 2a, where the I / O rate balancing calculation is performed. The first one in the header
If the two bits are not all "1" s, the method proceeds to step 142 where a determination is made as to whether there is a CRC word. If it is determined in step 142 that there is a CRC, the method returns to step 106 and proceeds to step 118 according to the method previously described, where CR is
It is checked whether C is valid. C in step 142
If there is no RC, the method proceeds to step 144,
Now the sync state variable in the status register 32 is set equal to "2" to indicate that sync has been lost. The method then proceeds to step 146 where the control processor 12
Backs up 11 bits of the bitstream.
The method then returns to step 104, where sync recovery and error correction operations are performed.

The CRC word may be used by the system 10 as sync information, even if the sync word contained in the bitstream is invalid or it is clear that the data stream contains no sync information. That is an important technical advantage in the present invention. As explained earlier, the first 12 bits of the new frame are shown in Figure 2b.
If there is a CRC word as determined in step 142, even if it is not a synchronization word as determined in step 140 of step 138, then the method proceeds if step 118 determines that the CRC word is valid. Decode this frame. Thus, to conclude that they are in sync, C
RC information is used to prevent loss of synchronization due to a 1-bit error in the sync word. Moreover, the CRC information can be used to determine that synchronization is achieved even though the syntax of the data stream does not include an explicit data field containing the sync word. The method according to the invention can handle either single states or combined states.

Sync Recovery and Error Handling FIG. 3 illustrates the sync recovery and error handling used by the system 10 to recover synchronization with the input data bitstream and output muted audio data via the output block 30. It is a flowchart showing a procedure. The method begins at step 150, where M
The AC busy flag (MAC_BUSY_FLAG) is checked. The MAC busy flag indicates whether the multiplier / accumulator 28 is busy. If the MAC busy flag is set equal to "1" indicating that the multiplier / accumulator is busy, then the MAC busy flag is set equal to "0" and the multiplier / accumulator 28 is empty. Until indicated, the method waits at step 150.
The method then proceeds to step 152 where the header is set equal to FFFF000 (hexadecimal) and layer 1
It indicates that the header is a layer header. The method then proceeds to step 154 where the count variable is set equal to "0". The count variable is bits per codeword (bits per
It is used to address the code word) and the scale factor used in the muting operation appropriately. The method proceeds to step 156 where the bits per codeword for the latest value of the count variable are set equal to "0". The bits per codeword and scale factor are stored in random access memory 26 for operation by execution controller 22 and multiplier-accumulator 28. The method then proceeds to step 158, where the scale factor information associated with the most recent value of the count variable is set equal to "0". The method then proceeds to step 160, where the count variable is incremented. The method then proceeds to step 162 where the count variable is "64".
Compared to. If the count variable is less than "64", the method returns to step 156 where the next set of bits per codeword and scale factor is also set equal to "0". Step 156 to Step 16
2 affects outputting 64 sets of bits per codeword and scale factor associated with one block of muted audio data. It is an important technical advantage of the present invention that system 10 is capable of muting one block of data. As a result, the system according to the present invention can double the resolution of error correction in various systems that perform error correction frame by frame.

Once a block of audio data has been stored in random access memory 26, as indicated by the count variable equal to 64 in step 162, the method proceeds to step 164 where the FILTER instruction controls. It is sent from the processor 12 to the execution controller 22. According to the filter instruction, the execution controller uses the multiplier / accumulator 28 to perform the dequantization operation, the conversion operation, and the filtering operation on the audio data stored in the random access memory 26.
These operations are described in detail in the audio decoder patents incorporated above.

The method then proceeds to step 166 where the MAC busy flag is set equal to "1",
The system 10 confirms that the multiplier / accumulator 28 is occupied.
Shown in the rest of the. The method then proceeds to step 168 where the repeat buffer flag (REPEAT_
BUFER_FLAG) is set equal to "1".
REPEAT_BUFFER_FLAG instructs the execution controller 22 to REPEAT the same audio data associated with the muted audio block.
It is used to output continuously until _BUFFER_FLAG is cleared. Thus, in order to output a series of muted audio blocks,
It is necessary to execute the setup of muted audio data, which is performed only once, when the above-described steps 156 to 162 are repeatedly performed. Next, REPEAT_BUFFER
_FLAG is set and remains set until the control processor 12 places a sync word or valid CRC string in the data stream. Therefore, the processing capacity of the control processor 12 is released in order to search whether it is not synchronized with the bit stream, and the muted audio data is REPEAT_BUFFER_F.
It is automatically output via the output block 30 until the LAG is cleared.

The method comprises steps 168 through 17
Proceed to 0, where it is checked to see if the next 12 bits contain a sync word. If at step 170 the next 12 bits do not contain a sync word, the method proceeds to step 172 where the control processor 12 backs up 11 bits of the bitstream and returns to step 170 where the same check is performed again. Run.
If at step 170 the next 12 bits always contain a sync word, the method proceeds to step 174 where the header register of status register 32 is the sync word concatenated to the next 20 bits of the bitstream. Set equal.

The method then proceeds to step 176, where a determination is made as to whether the word count is greater than half the size of the input buffer 18. The word count is a variable indicating the number of words stored in the input buffer 18. Therefore, the decision in step 176 is
It is an essential decision as to whether the input buffer is larger than half full. If the input buffer 18 is not more than half full, the method remains at step 176 until sufficient data has been input to the input buffer 18 from the input data stream. This step ensures that the input buffer 18 never underflows. If the input buffer 18 is more than half full, the method proceeds from step 176 to step 178 where REPEAT_BUFER_F.
LAG is set to "0" and instructs the execution controller 22 to stop outputting the muted block of audio data. This method is step 1
Proceed to 80, where the sync state variable is set equal to "3" to indicate that the system 10 has synchronized with the incoming data stream.

Input / Output Rate Balancing Calculations FIG. 4 is a flow chart illustrating a method by which the system 10 according to the present invention implements input / output rate balancing calculations. These calculations are also described in the previously incorporated velocity balancing patent. The method begins at step 190, where the sumvariable is set equal to the sum of the previous value for the sum variable and the word count variable. This sum is initialized equal to "0" in step 100. The word count variable is maintained equal to the number of words in the input buffer 18. The method proceeds to step 192, where the sample count variable is incremented. The sample count variable is also set equal to "0" in step 100 described above. The sample count variable indicates the number of times the word count was sampled. The method then proceeds to step 194, where the sample count variable is the average point variable (average po).
int variable) is set equal to. The mean point variable is a programmable value that sets the number of samples needed before averaging. If the average point has not been reached, the method ends. If the average point is equal to the number of sample counts, the method proceeds from step 194 to step 196, where the average of word counts is calculated equal to the sum divided by the sample count variable. The method then proceeds to step 198 where the average free word count (a) is calculated as the difference between the buffer size and the average word count.
The average empty word count) is calculated. The buffer size is equal to the size of the input buffer 18. The method then proceeds to step 200, where the summing variable is again set equal to "0".
The method then proceeds to step 202, where the sample count variable is again set equal to "0".
After this, the method ends.

As described above, the information calculated by the method described in FIG. 4 has a duty cycle proportional to two values, the word count average value and the empty word count average value calculated as described above. Is pulse-width modulated and output. Thus, the average fill level of the input buffer 18 may be communicated to various systems associated with the audio data processing system 10 to allow for regulation of the rate at which the input data is transmitted to the system 10 and specifically the input buffer 18. By thus providing the feedback signal associated with the value calculated by the method described in FIG. 4, the underflow or overflow of the input buffer 18 and the error caused by this underflow or overflow can be avoided. .

Auxiliary Pointer Check FIG. 5 illustrates the system 10 for determining whether a break point between auxiliary data and audio data in a particular frame is always resident in the input buffer 18. 3 is a flow chart representing the method used by. As described previously, the auxiliary pointer check operation is performed on each block of data to ensure that no auxiliary data has been lost and that audio data processing is not interrupted.

The method begins at step 204, where the auxiliary pointer flag is checked. If the beginning of the auxiliary data in the data stream is within the bounds of the input buffer 18, then the auxiliary pointer flag is set equal to "1". If the auxiliary pointer flag is already set equal to "1", the method ends. If the auxiliary pointer flag is not set equal to "1", the method proceeds to step 206 where a determination is made as to whether the difference between the size of the audio data and the bit count is less than the size of the buffer. . As explained earlier, the size of audio data indicates the amount of audio data in a particular frame,
It is determined from header information, bit allocation information, and scale factor selection information. The bit count variable indicates the number of bits already read in a particular frame. The difference between the size of the audio data and the bit count indicates the number of bits of audio data that has not yet been read. If this amount is not less than the size of the buffer, the method ends. If the difference is less than or equal to the size of the buffer, the breakpoint between the audio data and auxiliary data in the particular frame resides within the boundaries of the input buffer 18, and the method proceeds to step 208. In step 208, the auxiliary data pointer is set equal to the difference between the size of the audio data and the bit count.

The auxiliary data pointer serves as a tap point for the auxiliary data handler 20 to move auxiliary data from the input FIFO buffer 18 and output the auxiliary data. The method then proceeds to step 210, where the auxiliary count variable is set equal to the previously calculated auxiliary data size. The auxiliary count variable is decremented by the auxiliary data handler 20. When the auxiliary count variable is set equal to "0", the auxiliary data handler 20 resets the auxiliary pointer flag to "0" and the rest of the system 10 receives the auxiliary data in the latest frame from the input FIFO buffer 18. It is taken out and is output to a system associated with the system 10. The method proceeds to step 212, where the auxiliary data pointer flag is set equal to "1". The method then ends.

As described above, the audio data processing system 10 is designed to process the auxiliary data resident in the compressed data frame with high efficiency. The auxiliary data is output as soon as it is taken out of the input buffer 18 and prevents the interface for processing the auxiliary data and the audio data in the frame from disappearing.

With reference to the various processes involved in decoding compressed audio data, the system 10 according to the present invention is described.
I have explained. However, it should be understood that the scheme according to the invention is equally applicable to other data processing applications. For example, by modifying the microcoded operations that control the control processor 12, the scheme according to the invention can be used for encoding and compression of audio data. Thus, while the invention has been described in detail, various modifications, substitutions, and partial alterations to the embodiments described herein may be made without departing from the spirit and scope of the invention as defined by the appended claims. You have to understand that it can be reworked.

With respect to the above description, the following items will be further disclosed. (1) A data processing system capable of processing a data stream, the input buffer capable of receiving and storing an input data stream, and capable of being coupled to the input buffer and extracting audio data from the input buffer. A control processor, an execution controller coupled to the control processor, capable of receiving data from the control processor and instructing processing of data received from the control processor; and coupling to the execution controller, to the execution controller A multiplier / accumulator capable of performing the processing of data received from the control processor as instructed, coupled to the input buffer, extracting auxiliary data from the input buffer, and extracting the extracted auxiliary data. Auxiliary hand that can output Data processing system comprising: the chromatography, the.

(2) The system according to the first item, wherein the processing includes dequantization, conversion, and filtering of the data stream to decode the audio data.

(3) The system according to the first item, wherein the processing includes quantization and conversion of the data stream to encode the data stream.

(4) The system of claim 1, further comprising an output buffer coupled to the control processor and capable of receiving and storing processed data from the control processor. system.

(5) The system according to the first aspect, further comprising a microcode memory coupled to the control processor and capable of storing an instruction sequence for instructing an operation of the control processor. System to do.

(6) The system according to the first aspect, further comprising a microcode memory coupled to the execution controller and capable of storing an instruction sequence for instructing an operation of the execution controller. System to do.

(7) The system of claim 1, wherein the status register is coupled to the control processor and is capable of storing and outputting status information including information indicating a synchronization status of the system related to the data stream. A system further comprising:

(8) A data processing system capable of processing a data stream including multiplexed audio data and auxiliary data, wherein the data processing system is coupled to the input buffer and extracts audio data from the input buffer. A control processor capable of performing the above-mentioned control processor, an execution controller coupled to the control processor, capable of receiving data from the control processor and instructing dequantization, conversion, and filtering of the data received from the control processor; A multiplier / accumulator that is combined and is capable of performing the inverse quantization, transforming, and filtering of data received from the control processor as directed by the execution controller;
An auxiliary handler, coupled to the input buffer, capable of extracting auxiliary data from the input buffer, and outputting the extracted auxiliary data, coupled to the control processor and receiving processed data from the control processor, And an output buffer that can store
A first microcode memory coupled to the control processor and capable of storing an instruction sequence for instructing an operation of the control processor; and an instruction sequence coupled to the execution controller and instructing an operation of the execution controller. A microcode memory capable of storing a status register, and a status register coupled to the control processor, capable of storing and outputting status information including information indicating a synchronization status of the system related to the data stream. A data processing system comprising:

(9) A method for processing a data stream, which comprises receiving a data stream in an input buffer, detecting that synchronization with the data stream has been lost,
Instructing the execution controller to provide a predetermined data set corresponding to the muted output to the execution controller in response to the detecting step and to continue operation on the predetermined data set until synchronization is restored. To the execution controller,
A method comprising recovering synchronization in the data stream.

(10) The method according to item 9, wherein the data in the data stream is processed by dequantizing, transforming, and filtering after the synchronization is restored. The method further comprising the step of outputting the data.

(11) The method according to the ninth item, wherein a tap point is set in the input buffer by determining whether there is auxiliary data in the input buffer and using an auxiliary data handler responsive to the step of determining. Then, the method further comprises the steps of: extracting auxiliary data starting from the tap point from the input buffer, and outputting the extracted auxiliary data.

(12) A method of processing an encoded data stream, wherein a CRC word is arranged in the data stream, the CRC word is used to determine whether the data stream is valid, and If the stream does not have a valid sync word, the method further comprises using the step of determining whether the data stream is valid to determine synchronization with the data stream.

(13) A method according to item 12, further comprising the step of retrieving the data stream for a valid sync word.

(14) The method described in the twelfth item, wherein the data stream does not include a dedicated synchronization word.

(15) An audio data processing system (10) is described that includes a control processor (12) coupled to an execution controller (22) via a bus (21). The control processor (12) is an execution controller (2
2) Acts as a master processor to control
The execution controller then controls the multiplier / accumulator (28). An auxiliary data handler (20) is provided to retrieve auxiliary data from the input FIFO buffer (18). Audio data is retrieved from the input FIFO buffer (18) by the control processor (12),
The processed audio data is output via the output block (30).

[Brief description of drawings]

FIG. 1 is a schematic block diagram of an audio data processing system designed in accordance with the teachings of the present invention.

FIG. 2 is a flow chart diagram for explaining the operation of the audio data processing system according to the present invention, in which a is a flow chart diagram for explaining the operation of the audio data processing system according to the present invention, and b is the operation of the audio data processing system according to the present invention. FIG.

FIG. 3 is a flow chart for explaining the operation of the audio data processing system according to the present invention.

FIG. 4 is a flowchart diagram for explaining the operation of the audio data processing system according to the present invention.

FIG. 5 is a flow chart for explaining the operation of the audio data processing system according to the present invention.

[Description of Reference Signs] 10 audio data processing system 12 control processor 14 microcode read-only memory for control processor 16 random access memory for control processor 18 input FIFO buffer 20 auxiliary data handler 21 address data bus 22 execution controller 24 execution controller micro Code read only memory 26 Random access memory for execution controller 28 Multiplier / accumulator 30 Output block 32 Status register

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H04N 5/91 5/92

Claims (2)

[Claims] 1. A data processing system capable of processing a data stream, the input buffer being capable of receiving and storing an input data stream, coupling to the input buffer and extracting audio data from the input buffer. A control processor capable of performing, an execution controller coupled to the control processor, capable of receiving data from the control processor and instructing processing of data received from the control processor, coupled to the execution controller, and executing the execution A multiplier / accumulator capable of performing the processing of the data received from the control processor as instructed by the controller; extracting auxiliary data from the input buffer; Can output data Data processing system which comprises a and a co handler. 2. A method for processing a data stream, the method comprising: receiving a data stream in an input buffer; detecting loss of synchronization with the data stream; Providing a predetermined data set corresponding to the output that has been clocked and providing a signal to the execution controller to instruct the execution controller to continue operation on the predetermined data set until synchronization is restored, Recovering synchronization in the method.