JPH0862575A - Method for driving picture display device - Google Patents

Abstract

PURPOSE: To reduce fricker caused in the display device in a state where plural rows are simultaneously selected and driven. CONSTITUTION: On the assumption that selection pulse sequence is obtained by time-sequentially arranging the column of selection pulse vector impressed on a scanning electrode simultaneously selected with respect to entire rows electrode, the selection pulse sequence is constituted by repeating a subsequence unit having the cycle of 1/n(n is the integer of n2) for one frame (cycle of finishing address).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a liquid crystal display device suitable for a liquid crystal which responds at high speed. Particularly, the present invention relates to a method for simultaneously selecting a plurality of lines (Japanese Patent Laid-Open No. 6-2790)
7, U.S. Pat. No. 5,262,881), and a method for driving a simple matrix type liquid crystal display device.

[0002]

2. Description of the Related Art Hereinafter, in the present specification, scanning electrodes are referred to as row electrodes, and data electrodes are referred to as column electrodes.

With the progress in the advanced information age, the need for information display media is ever increasing. Liquid crystal displays have advantages such as thinness, light weight, and low power consumption, and are well compatible with semiconductor technology, and are expected to become even more popular. On the other hand, with the spread, the demand for larger screens and higher definition has started, and the search for a method for large-capacity display has begun. Among them, the STN (super twisted nematic) method is the TFT (thin film transistor).
Since the manufacturing process is simpler than that of the conventional method, and it can be produced at low cost, it is considered to be the mainstream of future liquid crystal displays.

In order to display a large capacity in the STN system, line sequential multiplex driving has been conventionally performed. This method selects each row electrode one by one, and selects the column electrodes corresponding to the pattern to be displayed.
The display of one screen is completed by selecting all the row electrodes.

However, it is known that the line-sequential driving method causes a problem called frame response as the display capacity increases. In the line-sequential driving method, a relatively high voltage is applied to the pixels when selected, and a relatively low voltage is applied when the pixels are not selected. This voltage ratio generally increases as the number of row lines increases (higher duty driving). Therefore, when the voltage ratio is small, the liquid crystal that responds to the voltage effective value responds to the applied waveform.

That is, the frame response is a phenomenon in which the transmittance at the time of OFF increases because the amplitude of the selection pulse is large, and the transmittance at the time of ON decreases because the cycle of the selection pulse is long, resulting in a decrease in contrast. is there.

A method is known in which the frame frequency is increased in order to suppress the occurrence of the frame response and thereby the period of the selection pulse is shortened, but this has a serious drawback. That is, when the frame frequency is increased, the frequency spectrum of the applied waveform becomes high, which causes non-uniformity of display and increases power consumption. In addition, the upper limit of the frame frequency is limited to prevent the selection pulse width from becoming too narrow.

In order to solve this problem without increasing the frequency spectrum, a new driving method has recently been proposed. A method such as a multiple line simultaneous selection method for simultaneously selecting a plurality of row electrodes (selection electrodes). This method is a method in which a plurality of row electrodes can be simultaneously selected and the display pattern in the column direction can be independently controlled, and the frame period can be shortened while keeping the selection width constant. That is, high contrast display with suppressed frame response can be performed.

[0009]

In the multiple line simultaneous selection method, in order to control the column display pattern independently,
A constant voltage pulse train is applied to each row electrode applied simultaneously. In the drive method that selects multiple lines simultaneously,
Since voltage pulses are simultaneously applied to a plurality of row electrodes, it is necessary to apply pulse voltages having different polarities to the row electrodes in order to simultaneously and independently control the display pattern in the column direction. This set of voltage pulses applied simultaneously is referred to as a selection pulse vector. A pulse having a polarity is applied to the row electrode several times, and an effective voltage corresponding to ON / OFF is applied to each pixel in total.

The selection pulse voltage group applied to each row electrode simultaneously selected within one address period can be expressed as a matrix of L rows and K columns (hereinafter referred to as a selection matrix (A)).
Since the selection pulse voltage series corresponding to each row electrode can be represented as a vector group orthogonal to each other within one address period, the matrix including these as column elements is an orthogonal matrix. That is,
Each row vector in the matrix is orthogonal to each other. At this time,
The number L of rows corresponds to the number of simultaneous selections, and each row corresponds to each line. For example, the first line of the L simultaneous selection lines corresponds to the element of the first row of the selection matrix (A). Then, the selection pulse is applied in the order of the elements in the first column and the elements in the second column. In the present specification, in the notation of the selection matrix (A), 1 means a positive selection pulse, and -1 means a negative selection pulse.

A voltage level corresponding to each column element of this matrix and a column display pattern is applied to the column electrode. That is, the column electrode voltage series is determined by the matrix and the display pattern that determine the row electrode voltage series.

The sequence of voltage waveforms applied to the column electrodes is determined as follows. FIG. 8 is an explanatory diagram showing the concept. An example will be described in which a Hadamard matrix of 4 rows and 4 columns is used as a selection matrix. It is assumed that the display data of the column electrode i and the column electrode j are as shown in FIG. The column display pattern is represented as a vector (d) as shown in FIG. Here, when the column element is -1, it indicates ON display, and 1 indicates OFF display.

Assuming that the row electrode voltages are sequentially applied to the row electrodes in the order of the columns of the matrix, the column electrode voltage levels are as shown in FIG.
It becomes like the vector (v) shown in (b), and its waveform becomes as shown in FIG. 8 (c). In FIG. 8C, the vertical axis and the horizontal axis are arbitrary units.

In the case of partial line selection, in order to suppress the frame response of the liquid crystal display element, it is preferable that the selection pulse is dispersed and the voltage is applied within one display cycle. Specifically, for example, after applying the first element of the vector (v) to the first simultaneously selected row electrode group (hereinafter referred to as a subgroup), the second simultaneously selected row electrode group is selected. The first element of the vector (v) for the row electrode group is applied, and the same sequence is performed thereafter.

Therefore, the sequence of voltage pulses actually applied to the column electrodes is how the voltage pulses are distributed within one display cycle, and what selection matrix is applied to the row electrode groups which are simultaneously selected. It is determined by whether (A) is selected.

Here, for the purpose of the following description, how the voltage pulse sequence actually applied to the column electrodes in the multiple line simultaneous selection method is described.

In the case of simultaneously selecting a part of all the row electrodes (partial line selection), there are basically three ways of thinking from the viewpoint of when to advance the selection pulse sequence. One is a selection pulse sequence method (1) in which the selection pulse sequence of the row electrodes is advanced by one at the time point when one subgroup is selected and the next subgroup is selected, that is, a selection pulse sequence in units of subgroups. One is when all lines are selected (for all subgroups)
The method (2) is to advance the selection pulse sequence, and the other is an intermediate method (3) between the methods (1) and (2).

In the case of the schemes (1) and (2), the vector indicating the selection pulse is shown for each subgroup as shown in Equation 1. Here, each column vector of the selection matrix (A) is A ₁ , A ₂ , ..., A _M , and the number of subgroups is N.
_S.

[0019]

[Equation 1]

The sequence of voltages applied to the column electrodes is
If the column electrode voltage level can be represented by a vector (v) = (v ₁ , v ₂ , v ₃ , ...) As in the case of FIG. 8B, in the case of the method (1), (v ₁ , V ₂ , v ₃ , ...
, V ₂ , v ₃ , v ₄ , ...), and in the case of the method (2), (v ₁ , v ₁ , ... v ₁ , v ₂ , v ₂ , ...
., V ₂ , v ₃ , ...). The number of repetitions for each is the number of subgroups.

These relations can be generally written by a formula composed of a vector and a matrix, as in the equation (2).

[0022]

[Equation 2]

The vector (x), vector (y), and matrix (S) are as follows. The column electrode display pattern vector (x) = (x ₁ , x ₂ , ..., X _M ) has the same number of elements as the number of row electrodes M and is a display pattern corresponding to the row electrodes on a specific column electrode. Is an element. Here, it is set to 1 when it is off and -1 when it is on. Column electrode voltage sequence vector (y) = (y ₁ , y ₂ , ..., y
_N ) has the same number of elements as the number of pulses N applied in one display cycle, and the voltage level for a specific column electrode is arranged in time series in one display cycle.
The row electrode pulse sequence matrix (S) is a matrix of M rows and N columns, and has a column vector composed of row electrode voltage levels for a specific column electrode arranged in time series within one display cycle as an element. Elements corresponding to non-selected row electrodes are set to 0.

For example, the row electrode pulse sequence matrix S in the scheme (1) is the column vector A _i of the selection matrix A,
And the zero vector Z _e is written as

[0025]

(Equation 3)

By the way, flicker may occur when a general display such as VGA is performed by the multiple line simultaneous selection method. Flicker significantly degrades the quality of image display. In particular, when gradation display is performed by frame rate control, a flicker becomes a more serious problem because a component having a relatively long period is generated in the drive waveform.

[0027]

As a result of intensive studies on the solution of this problem, the inventors of the present invention have obtained the following findings and arrived at the present invention.

That is, the inventors have already proposed that it is effective to drive using a plurality of different selection matrices in order to prevent display unevenness between lines. However, in such a driving method, a strong frequency component appears in a region of an integral multiple of one frame.

As a result of analyzing the selection pulse sequence that has been conventionally used, the present inventors have a frequency component of one frame or more, which interacts with the frequency component due to the use of different selection matrices, and causes flicker. It has been found that this seems to be the cause of becoming remarkable. Further, such flicker occurs even when a plurality of different selection matrices are not used.

According to the present invention, in a driving method for simultaneously driving a plurality of row electrodes of an image display device having a plurality of row electrodes and a plurality of column electrodes, a row electrode selection pulse completes one address. In the cycle, the sequence in which the selection pulse vectors that are distributedly applied and that are simultaneously applied to the scanning electrodes are arranged in time series for all row electrodes is 1 / n of the cycle for completing one address. (N is n ≧
It is a method of driving an image display device, characterized in that it is configured by repeating a subsequence having a period of (an integer of 2) as a unit.

In addition, the repeating unit of the application sequence of the selection pulse vector with one selection pulse as one unit is s, the number of row electrode groups (subgroups) simultaneously selected is m, and selection pulse vectors of the same kind are continuous. The number of times used
Then, m ′ = m / p and s ′ = s / p are integers, and the remainder obtained by dividing m ′ by s ′ is an odd number, and the driving method of the image display device is provided. To do.

Further, in this case, there is provided a driving method of the image display device, wherein K · m ′ is a multiple of s ′, where K is the number of selection pulse vectors.

Further, the repeating unit of the application sequence of the selection pulse vector in which one selection pulse is one unit is s, the number of row electrode groups (subgroups) simultaneously selected is m, and the selection pulse for a specific subgroup is selected. It is characterized in that s ″ = s / g is an integer and m is an odd remainder when s ″ = s / g is an integer, where g is the number of times the vector is not dispersed in a cycle and is used almost continuously. A driving method of the image display device is provided.

An important aspect of the present invention is characterized in that a group of row electrodes that are simultaneously selected is virtually provided and driven.

That is, the present invention reduces flicker by reducing the frequency component peculiar to the selected pulse sequence to 1/2 or less of one frame.

In order to construct a selection pulse sequence by repeating a unit of a subsequence having a period of 1 / n (n is an integer of n ≧ 2) of one frame (address completion period), a certain constraint is imposed. The condition exists. The cycle of the repeating unit needs to be a divisor of the cycle of one frame. By doing so, the cycle of the repeating unit becomes the longest cycle in the selection pulse sequence.

Further, s is the repeating unit of the application sequence of the selection pulse vector in which one selection pulse is one unit, m is the number of sets (subgroups) of row electrodes simultaneously selected, and K is the number of selection pulse vectors. When the number of times the same kind of selection pulse vector is continuously used is p, it is preferable that there is a specific relationship between them.

However, it is not easy to satisfy such a condition in general. This is because the number of rows selected simultaneously (row subgroup) is determined from the balance between the actual number of scans and the number of simultaneously selected rows that has the effect of suppressing the liquid crystal relaxation phenomenon. Since the number of select pulse vectors required for the address is also fixed,
This is because there is relatively little freedom to satisfy the above conditions.

Therefore, in one aspect of the present invention, in order to satisfy the above conditions, a group (subgroup) of row electrodes that are simultaneously selected is virtually provided and driven. By doing so, it is possible to perform driving corresponding to all the numbers of scanning lines, the number of simultaneously selected scanning lines, and the number of selection pulse vectors used for addresses.

Next, a specific example of the present invention will be described. First, a case will be described in which the selection pulse is maximally dispersed within one frame. That is, when one selection pulse is applied to one row subgroup, the selection pulse is applied to another row subgroup next.

In the driving method for selecting a plurality of lines at the same time, generally, (i) the selection pulse is defined by a column vector of a matrix (selection matrix) in which each row vector is orthogonal, (ii) one display cycle Two conditions are required that K kinds of selection pulse vectors are applied the same number of times in all subgroups during the period. Therefore, the shortest display cycle refers to a period in which all selection pulses are applied once in each subgroup. In this period, one display screen is completed. Generally, the shorter the display cycle is, the more flicker is prevented.

As a method for always satisfying such a condition, a method of sequentially distributing all selected pulse vectors to each subgroup once in sequence (for example, Japanese Patent Laid-Open No. 6-710).
95), but this method has a discontinuous pulse sequence due to the relationship between the number m of subgroups and the number K of selection pulse vectors, and as a result, a very long repetition period is generated. I will have.

Hereinafter, in this specification, the type of the selection pulse vector will be represented by the position of the column of the corresponding selection matrix. That is, the type of the selection pulse vector is represented by the subscript _i of the column vector A _i of the selection matrix in Expression 3.

Assuming that 245 row electrodes are driven by application of a selection pulse composed of a selection matrix of 7 rows × 8 columns, the number of subgroups is 245/7 = 35. Therefore, in the above method, For each subgroup [1,
2, ...] in the order of application of the selected pulse vector,
The 35th sub-end ends with vector 3. Since the vector 2 starts at the time of the second selection, the sequence of vectors has a discontinuity such as [... 1, 2, 3, 2, 3, 4 ...] Here.

Since such discontinuity always occurs when the selection shifts from the last subgroup to the first subgroup, there is no periodicity until all the selection pulses have been completed eight times. Therefore, in this example, one display cycle in which selection is completed eight times is a repeating cycle.

The present invention provides a drive sequence for avoiding the lengthening of the cycle due to the presence of such discontinuity in the selection pulse sequence.

In order to satisfy the above conditions (i) and (ii), and to eliminate the discontinuity of the pulse sequence and to provide the display cycle length with a short periodicity, several conditions may be simultaneously satisfied. .

That is, K is the type of selection pulse (that is, the number of columns of the selection matrix), s is the repetition unit of the pulse sequence when the selection pulse is the unit, and the number of row groups (subgroups) selected at the same time. Let m be s
It is sufficient if the remainder divided by is an odd number.

This is explained as follows. Since the selection matrix is an orthogonal matrix whose row vectors are orthogonal, the type K of selection pulses (usually composed of elements -1, +1) is generally even. Therefore, in order to periodically select a certain subgroup and satisfy the above condition (ii), it is necessary that the number of the selected pulse vector changes in odd units. Of course, when the element 0 indicating non-selection is included in a part of the selection pulse vector, the above condition does not necessarily have to be satisfied.

Hereinafter, the case where the number of subgroups is 35 and 18 and the type of selection pulse is 8 will be described as an example. This corresponds to the number of row electrodes 245 and 126 when the number L of simultaneous selections is 7. The dispersion of the selection pulse vector in one display cycle by the conventionally proposed drive sequence is as shown in FIGS. 2 (a) and 2 (b). (A)
Has 35 subgroups, (b) has 1 subgroup
This is the case of 8. The numbers in the sequence in the figure indicate the types of selection pulse vectors. Hereinafter, the same applies to FIGS. 1 and 3 to 6.

As described above, in the conventional method, it is possible to perform dispersion by using the selection pulse once for each of the eight selections of each subgroup, but discontinuity occurs in the sequence from the last subgroup to one subgroup. The period of the sequence becomes equal to one cycle.

On the other hand, in the method of the present invention, the sequence is as shown in FIGS. 1 (a) and 1 (b). (A) is the case where the number of subgroups is 35, and (b) is the case where the number of subgroups is 18.

In the case of 35 subgroups, m = 35 and s =
Since it is 8, the remainder of 35 ÷ 8 becomes an odd number of 3 and the above condition is satisfied. Therefore, the sequence of the present invention can be applied as it is. However, when m = 18, the remainder of 18/8 is 2, which is an even number, and therefore the above method cannot be applied as it is. If the number of subgroups is 18,
As shown in (b), the dummy subgroup (19
If the second subgroup is provided so as to satisfy the above relational expression, the above sequence can be adapted. As described above, when the above relationship cannot be directly applied to the number of subgroups derived from the actual number of display rows, provision of dummy subgroups enables driving with sequence continuity maintained.

Next, an extended form of the method of the present invention will be described. In the above example, after selecting one subgroup by a certain selection pulse vector, the selection pulse sequence is advanced by one for the next subgroup. However, it is also possible to advance the selection pulse sequence after applying the same selection pulse over a plurality of subgroups. FIG. 3 illustrates the case. FIG.
In FIG. 3A, when m = 35, in FIG. 3B, m = 1.
The case of 8 is shown.

In FIG. 3, for m = 35, the same selection pulse is successively used p = 5 times, and the sequence is advanced. The repetition cycle is s = 40. In this way, when the pulse is continuously applied to a plurality of subgroups, when m ′ = m / p and s ′ = s / p, the remainder obtained by dividing m ′ by s ′ is the same as described above. By making O be an odd number, it is possible to create a sequence that is closed and does not lengthen. In this example, m '= 7,
Since s' = 8 and the remainder obtained by dividing m'by s'is an odd number of 7, the sequence shown in FIG. 3 can be constructed.

For m = 35, 35 = 5 × 7, and therefore p can be 5 or 7. m
In the case of = 18, 18 = 2 × 3 × 3.
From the condition that m / p is an odd number, p is 2,
6 is possible. In FIG. 3, the case of p = 2 is illustrated. The condition that m / p is odd is that the repetition period s'is usually an even number, so m'must be an odd number in order for the remainder of dividing m'by s'to be an odd number. is there.

In this case as well, similar to the example shown in FIG. 1, dummy subgroups may be provided to drive the above relationships. When one dummy is added when m = 35, m = 36 = 2 × 2 × 3 × 3, and p = 4,1
2 is the number of possible continuations. This method is effective for reducing crosstalk because it can suppress column voltage fluctuations and lower the frequency.

In the present invention, the frequency component can be easily controlled by appropriately adding the polarity inversion of the drive signal.
preferable. In particular, in the present invention, inversion can be performed at a cycle that is an integral multiple of the repeating unit. And in the present invention,
Since the cycle of the repeating unit is short, the degree of freedom of the inversion timing is increased, and as a result, the degree of freedom of controlling the frequency component is increased.

The examples shown in FIGS. 1 and 3 are examples in which the selection pulse is completely dispersed in the cycle. However, even when the selection pulse is not completely dispersed, an optimum sequence can be set by the same idea. Becomes

That is, as another aspect of the present invention, the pulse dispersion may not be completely performed, and different selection pulses may be successively applied to the same scanning line. In particular, it is not necessary to perform pulse dispersion if the application is not for high-speed driving.

In this case, the same idea as in the case of FIG. 1 can be obtained by replacing the cycle s with s ″ = s / g, where g is the number of times the same subgroup is continuously selected. The remainder divided by / g must be an odd number.

FIG. 4 shows this state.
In FIG. 4A, when m = 35, in FIG. 4B, m = 1
The case of 8 is shown. In the example of FIG. 4, s = 8 and g = 2 for m = 35, and the remainder when 35 is divided by 4 is 3
Since it is an odd number, the above sequence becomes possible. m = 18
For, the relational expression is satisfied by adding one dummy subgroup for the reasons described above.

When the dispersion is suppressed, the example of FIG. 4A can be applied as shown in FIG. In this way, it is also possible to drive by providing a sub-sequence for every several sub-groups (two in the example of FIG. 5). In this case, the same subgroup is not completely consecutively selected, but it can be considered in the same way. In the example of FIG. 5, the consecutive number g may be treated as 2. Therefore, in other words, g can be said to be the number of selection pulses that are not dispersed over the entire cycle in selecting the same subgroup.

In all of the above examples, the pulse sequence is a sequence with a cycle s = 8, which is closed by 12 ... 8, and flicker occurs due to the lengthening of the pulse cycle.
Flicker due to beats with other frequency components is suppressed.

As another means for increasing the period, it may be possible to use inversion of the selection pulse sequence together. For example, if a 4 × 4 selection matrix is used and the number of subgroups is 10, the sequence shown in FIG. 6 can also be adopted.

The driving method in the present invention is disclosed in Japanese Patent Laid-Open No. 6-27.
907, using a circuit as described in USP5262881.

A block diagram of one example of the circuit configuration is shown in FIG. This is a circuit for displaying 16 gradations for each of RGB. Data signal, 16 gradation signal MSB
To LSB are input to the data preprocessing circuit 1 as 4-bit signals. The data pre-processing circuit 1 uses the column signal generation circuit 2 with a format and timing suitable for forming the column signal in the subsequent stage.
It is a circuit for outputting a data signal input to.
A data signal output from the data preprocessing circuit 2 and an orthogonal function signal output from the orthogonal function generation circuit 5 are input to the column signal generation circuit 2.

The column signal generating circuit 2 performs a predetermined operation using both signals to form a column signal, and then outputs the column signal to the column driver 3. The column driver 3 uses a predetermined reference voltage to form a column electrode voltage applied to the column electrode of the liquid crystal panel 6 from the input column signal and outputs the column electrode voltage to the liquid crystal panel 6. On the other hand, a row electrode voltage obtained by converting the orthogonal function signal output from the orthogonal function generating circuit 5 by the row driver 4 is applied to the row electrode of the liquid crystal panel 6. These circuits are provided with a timing circuit and the like as necessary, and are controlled and operated at a predetermined timing.

The orthogonal function used in the present invention is generated by the orthogonal function generating circuit 5. The quadrature function generation circuit 5 can also perform calculation every time a quadrature function signal is generated to form a signal. However, it is preferable in terms of simplicity that the orthogonal function signal to be used is stored in the ROM in advance and the signal is read out at an appropriate timing. That is, the pulse that defines the timing of voltage application to the liquid crystal panel 6 is counted, and the orthogonal function signal in the ROM is sequentially read using the counted value as an address signal.

The data pre-processing circuit 1 is specifically shown in FIG.
It has a configuration like 0. The signal processing is performed by dividing 4-bit image data having gradation information into 4 sets of R, G, and B 3 bits. That is, MSB (2 ³ ), 2ndMSB
4 of (2 ² ), 3rdMSB (2 ¹ ), LSB (2 ⁰ ).
The signals are divided into sets and parallel processing is performed.

The input 3-bit data is converted into 15-bit data by the 5-stage serial / parallel converter 11 and is converted into the memory 12.
Sent to Specifically, serial data is input to the input terminal of the 5-stage shift register, and each of the five tap outputs is input to the memory 12.

As the memory 12, a VRAM having a data width of 16 bits was used. Writing to the memory 12 is performed as follows using the direct access mode. That is, the data on the row electrodes corresponding to the same column electrode is stored in seven adjacent addresses for the seven row electrodes selected at the same time. By doing so, reading from the memory in the subsequent stage can be performed at high speed, and the operation becomes easy.

Reading from the memory 12 is performed in accordance with the LCD drive timing in the high-speed sequential access mode.
The four sets of 15-bit data are sent to the data format conversion circuit 16.

The data format conversion circuit 16 converts the data sent in parallel with a 15-bit width for each gradation into RGB.
This is a circuit for rearranging parallel signals each having a 20-bit width, and it is usually sufficient to perform appropriate wiring on the circuit board.

The data format conversion circuit 16 uses RGB
After being converted into three sets of 20-bit data, the data is sent to the gradation determining circuit 15. The gradation determination circuit 15 converts 4-bit gradation data per dot into ON / OFF 1-bit data to form a video signal for a sub-screen, and the sub-screen is subjected to, for example, 15 cycles to perform frame modulation for realizing gradation display. Circuit.

Specifically, a demultiplexer for distributing 20-bit width data into 5-bit width data at a predetermined timing was used. Which bit corresponds to which sub-screen is determined by counting by the frame counter. In this way, the 20-bit data corresponding to the gradation data for 5 dots is converted into 5-bit serial data without gradation and is output to the vertical / horizontal conversion circuit 13.

The vertical / horizontal conversion circuit 13 is a circuit for transferring display data of 5 pixels seven times and storing the display data, and reading this as data of 7 pixels in five times. 2 sets of 5x
It consists of a 7-bit register. Vertical-to-horizontal conversion circuit 13
To the column signal generating circuit 2.

The column signal generation circuit 2 has the structure shown in FIG. Exclusive OR gate 2 for 7-bit data signal
Input to 3, 23, .... Exclusive OR gate 23
A signal from the orthogonal function generating circuit 5 is also input to each. The outputs of the exclusive OR gates 23 are added to the row electrodes simultaneously selected by the adder 21.

The column driver 3 has a structure as shown in FIG. It is composed of a shift register 31, a latch 32, a decoder 33, and a voltage divider 34. A demultiplexer is used as the voltage level selector 33,
When the data for one row is sent to the shift register 31, the display data is converted into the column voltage.

Further, the row driver 4 has a structure as shown in FIG. It includes a drive pattern register 41, a selection signal register 42, and a decoder 43. The simultaneously selected rows are determined by the contents of the selection signal register 42,
The polarity of the selection signal to be output to each selected row is determined by the contents of the drive pattern register 41. 0V is output to the non-selected rows.

9 to 13 are shown as an example of a circuit, and various circuits can be adopted without impairing the essence of the present invention.

[0082]

【Example】

[Example 1] The liquid crystal display panel 7 was driven in the following manner using the circuits shown in Figs. The LCD panel is a 9.4 inch VGA module (480 x 6 pixels).
40 × 3 (RGB)) with a back light. The response time of the liquid crystal display panel is 60 ms on average of rising and falling. It was driven by a method of advancing the columns of the selection matrix by one (method 1) by selecting 7 rows at the same time and selecting each subgroup. Since two-screen drive (upper and lower division) was performed, the number of subgroups became 35.
The bias is adjusted so that the contrast ratio is almost maximum, the display contrast ratio is 30: 1, and the maximum brightness is 10.
It became 0 cd / m ² .

As the selection matrix, an orthogonal matrix of 7 rows and 8 columns in which the row vectors shown in FIG. 7 are orthogonal is used, and the column vectors are shown as A ₁ , A ₂ , ..., A ₈ in FIG. Driven in sequence. The gradation method was performed by frame rate control using 4 display cycles, and 16 gradation display was performed in combination with the dither method. In addition, the polarity was inverted every 40 selection pulses, and the voltage applied to the liquid crystal was changed to alternating current.

The display was a display with almost no crosstalk, and no image flicker occurred in both the binary display and the halftone display.

Comparative Example A liquid crystal display device was driven in substantially the same manner as in Example 1. However, the selection pulse sequence is
It is shown in FIG. In the display, crosstalk was considerably suppressed, but a slight flicker was seen in the binary display, and further in the gradation display, the flicker was increased and the display quality was degraded.

[Examples 2 and 3] A liquid crystal display device was driven in substantially the same manner as in Example 1. However, the sequence of the selection pulse is as shown in FIG. 3A (Example 2) and FIG. 4A (Example 3). In Example 2, the solid pattern crosstalk was suppressed, and the flicker level was almost the same as in Example 1. In Example 3, since the pulse dispersion was suppressed, the contrast was about 10% lower than that in Example 1, and the crosstalk was slightly increased.
The flicker level was almost the same as in Example 1.

[Embodiment 4] A liquid crystal display panel was driven in the following manner basically using the circuit shown in FIG. The liquid crystal display panel is a 9.4-inch VGA module (the number of pixels is 480 × 640 × 3 (RGB)) and has a back light. The response time of the liquid crystal display panel is 60 ms on average of rising and falling. The four rows were selected at the same time, and the selection matrix was driven by the method of advancing the selection matrix column by one (method 1). Since two-screen drive (upper and lower division) was performed, the number of subgroups was 60. The bias was adjusted so that the contrast ratio became almost maximum, and the adjustment method was performed by spatial modulation frame rate control. The display contrast ratio was 40: 1, and the maximum brightness was 100 cd / m ² . As the selection matrix,
The matrix shown in Equation 4 was used.

[0088]

[Equation 4]

Four virtual lines were added to 240 lines to make 244 lines, which were driven by 61 subgroups.

In the vector sequence, as shown in Table 1 (1 frame) below, the subgroups to be selected are associated with the selected column vectors. In the table, "selection vector" is the number 4
It shows how many columns in the matrix the corresponding selection pulse is applied. The polarity inversion was performed by driving every 23 pulses of the selection signal.

[0091]

[Table 1]

In the present embodiment, uniform display is obtained, flicker is significantly reduced, and even when the video display is displayed in the window on the Windows screen,
The level was almost unnoticeable.

[0093]

According to the present invention, when the image display device is driven, it is possible to prevent the frequency component from becoming too large by the method of simultaneously selecting a plurality of rows, and particularly when the gradation display is performed by the frame rate control. It is possible to suppress the occurrence of remarkable flicker.

Further, it is preferable to appropriately add the polarity inversion of the drive signal because it becomes easy to control the frequency component. In particular, in the present invention, inversion can be performed at a cycle that is an integral multiple of the repeating unit. Further, in the present invention, since the cycle of the repeating unit is short, the degree of freedom of inversion timing is increased, and as a result, the degree of freedom of controlling the frequency component is increased.

[Brief description of drawings]

1A and 1B are conceptual diagrams showing an example of a selection pulse vector application sequence according to the present invention.

2A and 2B are conceptual diagrams showing a conventional selection pulse vector application sequence.

3 (a) and 3 (b) are conceptual diagrams showing another example of the sequence of applying the selective pulse vector of the present invention.

4A and 4B are conceptual diagrams showing another example of the sequence of applying the selective pulse vector of the present invention.

FIG. 5 is a conceptual diagram showing another example of the sequence of applying the selective pulse vector of the present invention.

FIG. 6 is a conceptual diagram showing another example of the sequence of applying the selective pulse vector of the present invention.

FIG. 7 is an explanatory diagram showing an example of a selection matrix.

8A to 8C are conceptual diagrams and waveform diagrams illustrating a voltage application method in the multiple line simultaneous selection method.

FIG. 9 is a block diagram showing an example of the configuration of a circuit for implementing the present invention.

FIG. 10 is a block diagram showing a data preprocessing circuit 1.

FIG. 11 is a block diagram showing a column signal generation circuit 2.

FIG. 12 is a block diagram showing a column driver 3.

FIG. 13 is a block diagram showing a row driver 4.

[Explanation of symbols]

 1: Data preprocessing circuit 2: Column signal generation circuit 3: Column driver 4: Row driver 5: Orthogonal function generation circuit 6: Liquid crystal panel

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Takeshi Kuwata 1150 Hazawa-machi, Kanagawa-ku, Yokohama, Kanagawa Prefecture Asahi Glass Co., Ltd. Central Research Laboratory

Claims (5)

[Claims] 1. In a driving method for simultaneously selecting and driving a plurality of row electrodes of an image display device having a plurality of row electrodes and a plurality of column electrodes, a row electrode selection pulse has a cycle of completing one address. In the above, the sequence in which the selection pulse vectors applied to the simultaneously selected scanning electrodes while being distributedly distributed are arranged in time series for all row electrodes is 1
A method for driving an image display device, which is configured by repeating a subsequence having a period of 1 / n (n is an integer of n ≧ 2) as a unit for completing one address. 2. The length of the sub-sequence with one selection pulse as one unit is s, the number of sets of row electrodes simultaneously selected is m, and the number of times the same kind of selection pulse vector is continuously used is p. 2. The driving of the image display device according to claim 1, wherein m '= m / p and s' = s / p are integers, and a remainder obtained by dividing m'by s'is an odd number. Law. 3. The method of driving an image display device according to claim 2, wherein K · m ′ is a multiple of s ′, where K is the number of types of selection pulse vectors. 4. The length of the sub-sequence in which one selection pulse is one unit is s, the number of row electrode sets that are simultaneously selected is m, and a selection pulse vector is set for a specific simultaneously selected row electrode set. When the number of times that is continuously applied is g,
4. The method for driving an image display device according to claim 1, wherein s ″ = s / g is an integer, and a remainder obtained by dividing m by s ″ is an odd number. 5. The method of driving an image display device according to claim 1, wherein a group of row electrodes that are simultaneously selected is virtually provided for driving.