JP3576231B2 - Driving method of image display device - Google Patents

Description

【００４２】
列電極に印加される電圧のシーケンスは、列電極電圧レベルを図４（ｂ）に示すのと同様にベクトル（ｖ）＝（ｖ_１ ，ｖ_２ ，ｖ_３ ，・・）で表されるとすると、方式（１）の場合、（ｖ_１ ，ｖ_２ ，ｖ_３ ，・・・，ｖ_２ ，ｖ_３ ，ｖ_４ ，・・）となり、方式（２）の場合、（ｖ_１ ，ｖ_１ ， ・・ｖ_１ ，ｖ_２ ，ｖ_２ ， ・・・，ｖ_２ ，ｖ_３ ， ・・）となる。それぞれの繰り返し回数はサブグループの数である。
【００４３】
これらの関係は一般的に数３のように、ベクトルとマトリクスとからなる数式で書くことができる。
【００４４】
【数３】

【００４５】
ベクトル（ｘ）、ベクトル（ｙ）、行列（Ｓ）は以下のようなものである。列電極表示パターンベクトル（ｘ）＝（ｘ_１ ，ｘ_２ ，・・・，ｘ_Ｍ ）は、行電極本数Ｍと同じ数の要素を持ち、特定の列電極上の行電極に対応する表示パターンを要素とする。ここで、オフの場合が１、オンの場合が−１とする。列電極電圧シーケンスベクトル（ｙ）＝（ｙ_１ ，ｙ_２ ，・・・，ｙ_Ｎ ）は、１表示サイクル内に印加されるパルス数Ｎと同じ数の要素を持ち、特定の列電極に対する電圧レベルを１表示サイクル内で時系列で並べたものを要素とする。行電極パルスシーケンス行列（Ｓ）は、Ｍ行Ｎ列の行列であり、特定の列電極に対する行電極電圧レベルからなる列ベクトルを１表示サイクル内で時系列で並べたものを要素とする。非選択の行電極に対応する要素は０とされる。たとえば、方式（１）における行電極パルスシーケンス行列Ｓは、選択行列Ａの列ベクトルＡ_ｉ 、ならびにゼロベクトルＺ_ｅ により数４のように書かれる。
【００４６】
【数４】

【００４７】
方式（２）のシーケンスは、周波数が低くなり過ぎるため、フリッカー発生のおそれがある。したがって、各サブグループに選択パルスを少なくとも１回印加し終える前に選択パルスシーケンスを進める方が好ましい場合が多い。そこで、以下は、典型的な場合として、主に方式（１）のシーケンスを採用した場合を例にとって本発明を説明することにする。もちろん、方式（２）および方式（３）のシーケンスを採用した場合も同様に考えることができる。
【００４８】
方式（１）のシーケンスを採用した場合は、行電極パルスシーケンス行列（Ｓ）は、極性反転する場合や最後のサブグループから最初のサブグループに移る場合を除くと、選択行列（Ａ）を（Ａ）（Ａ）・・（Ａ）のように、並べた行列を考えれば充分である。これは、数２または数４に示したように、選択されるサブグループについて注目すると、Ａ_１ 、Ａ_２ ・・・、Ａ_Ｋ に対応する電圧が繰り返し印加されているためである。
【００４９】
つまり、方式（１）のシーケンスを採用するとすれば、どのような選択行列Ａ（Ｌ行Ｋ列）が採用されるかによって、本発明の条件が満たされるかどうかがほぼ決まることになる。すなわち、互いに直交な行成分によってなる任意行列を適当に列成分を並び変えることによって適当な行列を選択すれば、好ましい列電極波形を作ることができる。以下、どのような選択行列を採用するのが良いかについて具体的に説明する。
【００５０】
本発明によれば、時間軸（シーケンスを進める順）における最大電圧変動幅という観点で最適な列波形を選ぶための基準として行列（Ｓ）は数５によって評価される。
【００５１】
【数５】

【００５２】
ところで、すべての表示パターンでΔｙ_ｉ を一定値以下に抑えることが好ましいが、Δｙ_ｉ は列電極表示パターンベクトル（ｘ）に依存する値なので、これは実際上難しい。たとえば、全面オンの表示と、市松模様の表示とでは、Δｙ_ｉ の値はまったく異なる。
【００５３】
発明者らは、以下のような要因が各種クロストークを支配する因子であることを見い出した。
【００５４】
（１）選択行列の種類
（２）選択パルスシーケンス（選択パルスの分散方式）
（３）選択行列の行・列入れ替え
ベタ表示、動画など数多くのパターンでクロストークを抑制するには、上記（１）〜（３）の条件を、適切に決める必要がある。本発明では、上記（１）〜（３）の条件を詳細に検討した結果、構成される行列Ｓによるデータ変換に着目し、表示品位向上、特にクロストークの抑制を効果的に行うために、いかなる基準でＳが決定されるべきか、すなわち、そのもととなる選択行列Ａと選択パルスシーケンスがいかに決定されるべきかを見い出した。
【００５５】
本発明では、基準となる列電極表示パターンベクトル（ｘ）として、（ｘ）＝（１，１，・・・，１）（基準パターン１）ならびに（１，−１，１，−１，・・・）（基準パターン２）の２種類を選ぶ。通常の２値表示では、全オンもしくは全オフに近い状態（たとえば、均一なベタパターン上に、ブロックまたはラインの表示が存在するパターン）が支配的であり、階調表示や動画表示では、はるかに空間周波数の高い表示状態が支配的となる。これらの、空間周波数の全く異なるパターンに関して、クロストークを低減するには、上記の２つの基準ベクトルを用い、（１）〜（３）を決めることが重要であり、これにより画像の種類によらずクロストークの抑制された画像が提供できることが見い出された。
【００５６】
一般に、上記の基準ベクトルに対して、Δｙ_ｉ ＋Δｙ_ｉ ’＜１．４・Ｌ（これを以後、条件Ａという）とすることにより、最大電圧変動差を実用可能な程度に抑えることができる。特に好ましくは、Δｙ_ｉ ＋Δｙ_ｉ ’≦Ｌ（これを以後、条件Ｂという）である。ここで、Δｙ_ｉ は基準パターン１に対する変動差、Δｙ_ｉ ’は基準パターン２に対する変動差を示す。
【００５７】
次に、従来まで用いられてきたアダマール関数を用いた列電極波形について調べる。ここで、選択パルスシーケンスは方式（１）を例にとる。図５（ｃ）は７行８列のアダマール行列であり、基準パターン１に対しては、（ｘ）＝（１，１，・・・，１）に対し、（ｙ）＝（７，−１，−１，・・，−１，７，−１，・・・）となり、最大変位（Δｙ_ｉ の最大）は８である。また、基準パターン２に対しては、（ｘ）＝（１，−１，１，−１・・・）に対し、（ｙ）＝（１，７，１，−１，１，−１，１，−１，１，７，１，・・・）となり、最大変位（Δｙ_ｉ の最大）は６である。一方、Ｌ＝７なので条件Ａは、Δｙ_ｉ ＋Δｙ_ｉ ’＜９．８となる。したがって、この場合、Δｙ_ｉ ＋Δｙ_ｉ ’＝１４であり、最大変位時に条件Ａは満足されない。すなわち、選択行列として、アダマール行列を用いると、低周波の表示パターンに対しても高周波の表示パターンに対しても最大電圧変動は大きく、これが主に波形歪による実効値減少をもたらすことになる。
【００５８】
この場合の波形パターンは図２のようになる。図２は全オン表示のときの列電圧波形を任意単位で示したものである。周期的に大きな電圧変動のあることがわかる。
【００５９】
２つの基準パターンは空間周波数的に全く異なるものであるが、次のように最適な行列Ｓを決めることが可能である。まず基準となる選択行列（直交関数）を作製する。この時の基準は、隣り合う列要素の符号ができるだけ一致するように取ることが望ましい。これは、隣り合う列同士の符号が一致する際にはカラム電圧シーケンスに与えるパターン依存性が抑制されるためである。このための条件としては、行列Ａの隣り合う列同士（１と２、２と３、・・、Ｋと１）の同符号となる要素の数の合計Ｆが、行列のサイズＬ×Ｋに対して、
Ｆ≧Ｌ×Ｋ／２
の関係を満たすことが望ましい。
【００６０】
この条件により、最適化された４×４行列の一例が、図１である。この行列においては、基準パターン１に対しては全く同一のレベルをとり、基準パターン２に対しては、＋２と−２の間で１回変動するだけの、きわめて電圧変動の少ない列信号を生成する。本行列のもう１つの特徴は、各行ベクトル内で符号の数が同等になっている点（上記の例では正が３、負が１）にある。これは、同時に選択される行電極の組（サブグループ）内の各ラインにおいて、位相だけが違う同一な選択波形が送られることを意味しており、各ライン間に明暗のムラが発生することを根本的に抑制することができる。これ以外の直交行列において、このように各行ベクトルのシーケンスが位相の差のみであるようなものはなく、何らかの補正によりライン間のムラの補正が必要であった。本発明では、同時選択数を４とし、各行ベクトルの要素の符号の個数の比を１：３（または３：１）とすることにより、各ラインが位相以外完全に等価な駆動が可能となる。その具体例が上記の行列であり、その行入れ替え、列入れ替え、行または列の極性反転などにより類似の適した行列を得ることができる。
【００６１】
Ｌ＝４であることのもう一つの特徴は、ベタの表示パターンに関して、電圧の変動を全くなくすことができることにある。上記の行列では、それぞれの列ベクトル中要素の符号の数が一致しているので、列信号電圧は４つの列ベクトルすべてに共通となる。このすべての列ベクトルに対して列電圧の変動がないことは、全くこのベクトルシーケンスとは非同期に極性反転などの操作が可能であることを意味している。他のディメンションの直交行列を用いた場合、直交行列の列ベクトルごとに列信号の電圧レベルが変動するために、送られる列ベクトルのシーケンスに同期してしか極性反転をかけることができなかった。このことは、駆動の柔軟性を著しく阻害し、駆動を複雑なものにし、かつ回路構成も複雑なものとしていた。
【００６２】
本発明では、非同期の極性反転が可能なため、簡単なカウンター機能だけで極性反転が行え、かつ、極性反転の周期も非常に広い範囲で任意に選ぶことができる。実際には、極性反転がすべてのサブグループで成立するための周期などの観点により、選択パルスの３以上５０未満の奇数倍が望ましく、特には、３以上２３以下の奇数とされる。偶数が好ましくないのは、Ｌ＝４が偶数であり、各サブグループに１フレーム４回の選択パルスが送られることと関連し、交流化駆動が損なわれる危険性が高いためである。特に望ましい反転周期としては、５、７、９、１１、１３、２３などがあげられる。
【００６３】
極性反転と選択ベクトルシーケンスに関して、ＭとＬが適切な関係を満たしていることが重要である。たとえば、行ライン数Ｍが２４０、Ｌ＝４では、２４０／４＝６０となりサブグループは６０個となる。この場合、極性反転周期を５パルスごととすると、６０／５＝１２となり固定の場所で反転が起こり、かつ交流化が成立しないこととなる。したがって、２４０ラインを極性反転５パルスごとで駆動するには、仮想のラインを加え、上記のような関係を崩すことが必要である。たとえば、サブグループ数を６１（ライン数＝２４４）として極性反転５パルスごとで行えばよい。
【００６４】
必要な条件は、このように、サブグループ数Ｎｓと極性反転周期（Ｒパルスごと）が、一方が一方の約数ではないこと、であり、仮想ラインを加えるなどしてこの条件を達成することが必要である。もう一つの必要条件は、ベクトルシーケンスと極性反転の周期が異なること、が必要であり、極性反転周期Ｒは、４の倍数であってなならない。
【００６５】
本発明における駆動法は、特開平６−２７９０７、ＵＳＰ５２６２８８１に記載されているような回路を用いて実現できる。
【００６６】
回路の構成の一例のブロック図を図６に示した。これは、ＲＧＢそれぞれ１６階調表示を行うための回路である。データ信号を、１６階調の信号をＭＳＢからＬＳＢまで４ビットの信号としてデータ前処理回路１に入力する。データ前処理回路１は後段の列信号形成に適したフォーマットとタイミングで列信号発生回路２に入力されるデータ信号を出力するための回路である。列信号発生回路２には、データ前処理回路２から出力されるデータ信号と直交関数発生回路５から出力される直交関数信号とが入力される。
【００６７】
列信号発生回路２は両信号を用いて所定の演算を行い列信号を形成した後、列ドライバ３に出力する。列ドライバ３は所定の基準電圧を用いて、入力される列信号から液晶パネル６の列電極に印加する列電極電圧を形成して液晶パネル６に出力する。一方、液晶パネル６の行電極には、直交関数発生回路５から出力される直交関数信号を行ドライバ４で変換した行電極電圧が印加される。これらの回路は、必要に応じてタイミング回路等を備え、所定のタイミングにコントロールされて動作する。
【００６８】
本発明で用いられている直交関数は、直交関数発生回路５が発生する。直交関数発生回路５は、直交関数信号発生のたびに演算を行い信号形成することもできる。しかし、あらかじめ、使用する直交関数信号をＲＯＭに保存しておき、それを適当なタイミングで読み出すほうが簡便性の点で好ましい。すなわち、液晶パネル６への電圧印加タイミングを規定するパルスを計数し、計数値をアドレス信号としてＲＯＭ内の直交関数信号を順次読み出すようにする。直交関数発生器には極性反転端子があり、その論理により極性を切り替える。直交関数の極性切り替えにより同時に列信号も反転される。
【００６９】
図７はデータ前処理回路の構成の一例を示すブロック図である。データ前処理回路１では、入力データをフレーム変調の階調方式に対応した各色１ビットデータに変換しメモリ１２に格納する。メモリ１２としてはデータ幅１６ビットのＶＲＡＭを用いた。メモリ１２への書き込みは直接アクセスモードを用いて以下のように行う。すなわち、同じ列電極に対応した行電極上のデータは、同時選択される４本の行電極について隣り合う４個のアドレスに格納する。このようにすることにより、後段のメモリからの読み出しを高速に行えるとともに、演算が容易になる。
【００７０】
メモリ１２からの読み出しは高速な順次アクセスモードでＬＣＤの駆動タイミングに応じて行い、４組のデータをデータフォーマット変換回路１６へ送る。
【００７１】
データフォーマット変換回路１６は、各階調ごとに並列に送られたデータをＲＧＢごとの並列信号に整理し直す回路であり、通常は、回路基板上で適宜の配線を行うことにより足りる。
【００７２】
図８は、列信号発生回路２の構成の一例を示すブロック図である。データフォーマット変換回路１６で変換されたデータは列信号発生回路２に送られる。４ビットのデータ信号を排他的論理和ゲート２３、２３、・・・に入力する。排他的論理和ゲート２３にはそれぞれ直交関数発生回路５からの信号も入力される。排他的論理和ゲート２３の出力は加算器２１で同時選択される行電極について加算される。
【００７３】
図９は、列ドライバ３の構成の一例を示すブロック図である。シフトレジスタ３１、ラッチ３２、デコーダー３３、および電圧分割器３４からなっている。電圧レベル選別器３３としてはデマルチプレクサを用い、１行分のデータをシフトレジスタ３１に送り込んだ段階で表示データの列電圧への変換を行う。
【００７４】
図１０は、行ドライバ４の構成の一例を示すブロック図である。駆動パターンレジスタ４１、選択信号レジスタ４２、およびデコーダー４３からなる。選択信号レジスタ４２の内容によって同時選択行が決められ、駆動パターンレジスタ４１の内容によって選択された各行にどちらの極性の選択信号をを出力するかが決められる。非選択行は０Ｖが出力される。
【００７５】
図６〜図１０は回路の一例として示したものであり、本発明の本質を損しない限り、さまざまな回路の採用が可能である。
【００７６】
【実施例】
図６〜図１０に示した回路を用いて、液晶パネル６を以下の要領で駆動した。液晶パネルは９．４インチのＶＧＡモジュール（画素数４８０×６４０×３（ＲＧＢ））でバックライトを備える。液晶パネルの応答時間は立ち上がりと立ち下がりとの平均で６０ｍｓである。４本の行を同時選択するとともに、サブグループごとの選択で、選択行列の列を１つ進める方式（方式１）で駆動した。２画面駆動（上下分割）を行ったので、サブグループの数は６０となった。バイアスはコントラスト比がほぼ最大となるように調整し、階調は空間変調フレームレートコントロール方式で行った。
【００７７】
表示のコントラスト比は４０：１、最大輝度は１００ｃｄ／ｍ^２ となった。
【００７８】
選択行列としては、図１に示した行列を用いた。
【００７９】
ベクトルシーケンスは、下記の表１（１フレーム）で示すように選択するサブグループと選択列ベクトルとを対応させた。
【００８０】
【表１】

【００８１】
また、極性反転は行選択パルスが５パルス印加されるごとに行って、駆動した。
【００８２】
本実施例においては、均一な表示が得られ、著しくクロストークが低減され、ウインドウズの画面表示でビデオ表示をウィンドウ表示した場合においても、ほとんど気にならないレベルであった。
【００８３】
【発明の効果】
本発明においては、複数ライン同時選択法による液晶表示装置の駆動方法において、全画面がオンまたはオフに近い状態で発生するクロストークとともに、中間調表示におけるクロストークを低減することができる。また、特定のウインドウ内でビデオ表示を表示する場合にも鮮明な画像が得られる。
【００８４】
さらに、回路コストが低いにもかかわらず、フレーム応答抑制効果の高い液晶表示装置が得られる。
【図面の簡単な説明】
【図１】本発明の駆動方法に適した選択行列を示す説明図。
【図２】従来の駆動方法における全オン表示のときの列電圧波形を示した波形図。
【図３】クロストークを説明するための概念図。
【図４】（ａ）〜（ｃ）はＭＬＳ法での電圧印加方法を説明する概念図および波形図。
【図５】（ａ）〜（ｃ）はアダマール行列を示す説明図。
【図６】本発明を実施するための回路の構成の一例を示すブロック図。
【図７】データ前処理回路１を示すブロック図。
【図８】列信号発生回路２を示すブロック図。
【図９】列ドライバ３を示すブロック図。
【図１０】行ドライバ４を示すブロック図。
【符号の説明】
１：データ前処理回路
２：列信号発生回路
３：列ドライバ
４：行ドライバ
５：直交関数発生回路
６：液晶パネル[0001]
[Industrial applications]
The present invention relates to a method for driving a liquid crystal display device suitable for a liquid crystal which responds at high speed. In particular, the present invention relates to a driving method of a simple matrix type liquid crystal display device that performs multiplex driving by an MLS method (simultaneous selection method of a plurality of lines, see JP-A-6-27907, US Pat. No. 5,226,881).
[0002]
[Prior art]
Hereinafter, in this specification, a scanning electrode is referred to as a row electrode, and a data electrode is referred to as a column electrode.
[0003]
Demand for information display media is increasing with the progress of the advanced information age. Liquid crystal displays have advantages such as thinness, light weight, and low power consumption, and are expected to become more and more popular with semiconductor technology. On the other hand, with the spread of the screen, a larger screen and a higher definition are required, and a search for a method of displaying a large capacity has been started. STN (super twisted nematic Chi-click) scheme among the is manufacturing process compared to TFT (thin film transistor) method is simple, is considered to be the mainstream in the future liquid crystal display so can be produced at low cost.
[0004]
Conventionally, line-sequential multiplex driving has been performed to perform large-capacity display by the STN method. In this method, each row electrode is sequentially selected one by one, and a column electrode is selected corresponding to a pattern to be displayed. When all the row electrodes are selected, the display of one screen is completed.
[0005]
However, in the line sequential driving method, it is known that a problem called a frame response occurs as the display capacity increases. In the line sequential driving method, a relatively large voltage is applied to a pixel when selected and a relatively small voltage is applied to a pixel when not selected. This voltage ratio generally increases as the number of row lines increases (higher duty driving). Therefore, when the voltage ratio is small, the liquid crystal responding to the effective voltage value responds to the applied waveform. In other words, the frame response is a phenomenon in which the transmittance in the off state increases because the amplitude of the selection pulse is large, and the transmittance in the on state decreases because the cycle of the selection pulse is long, resulting in a decrease in contrast.
[0006]
It is known to increase the frame frequency in order to suppress the occurrence of a frame response, thereby shortening the period of the selection pulse. However, this has a serious drawback. That is, when the frame frequency is increased, the frequency spectrum of the applied waveform is increased, which causes non-uniform display and increases power consumption. Therefore, there is a limit on the upper limit of the frame frequency in order to prevent the selection pulse width from becoming too narrow.
[0007]
In order to solve this problem without increasing the frequency spectrum, recently a new driving method has been proposed. This is a method such as the MLS method for simultaneously selecting a plurality of row electrodes (selection electrodes). This method is a method in which a plurality of row electrodes can be simultaneously selected and the display pattern in the column direction can be independently controlled, and the frame period can be shortened while keeping the selection width constant. That is, high-contrast display with suppressed frame response can be performed.
[0008]
[Problems to be solved by the invention]
In the MLS method, a constant voltage pulse train is applied to each of the simultaneously applied row electrodes in order to independently control a column display pattern. In the driving method of simultaneously selecting a plurality of lines, a voltage pulse is applied to a plurality of row electrodes at the same time. At this time, in order to simultaneously and independently control the display patterns in the column direction, it is necessary to apply pulse voltages having different polarities to the row electrodes. A pulse having polarity is applied to the row electrode several times, and a voltage corresponding to the data is applied to the column electrode. Thus, an effective voltage corresponding to ON and OFF is applied to each pixel as a whole .
[0009]
The selection pulse voltage group applied to each row electrode can be represented as a matrix of L rows and K columns (hereinafter referred to as a selection matrix (A)). Since the selection pulse voltage sequence can be expressed as a vector group orthogonal to each other, a matrix including these as column elements is an orthogonal matrix. At this time, each row vector in the matrix is orthogonal to each other. The number L of rows corresponds to the number of simultaneously selected rows, and each row corresponds to each line. For example, the element of the first row of the selection matrix (A) is applied to the line 1 of the L selection lines, and the selection pulse is applied in order of the element of the first column and the element of the second column.
[0010]
In this specification, in the notation of the selection matrix (A), 1 means a positive selection pulse, and -1 means a negative selection pulse. FIG. 5 shows a Hadamard matrix as a typical example of the selection matrix (A). 5 (a) is a 4-row, 4-column configuration, FIG. 5 (b) is an 8-row, 8-column configuration, and FIG. 5 (c) is a 8-row, 8-column configuration with a 7-row, 8-column configuration excluding the first row. It is.
[0011]
A voltage level corresponding to each column element of the matrix and the column display pattern is applied to the column electrodes. That is, the column electrode voltage sequence is determined by the matrix that determines the row electrode voltage sequence and the display pattern.
[0012]
The sequence of the voltage waveform applied to the column electrode is determined as follows. FIG. 4 is an explanatory diagram showing the concept. A Hadamard matrix of 4 rows and 4 columns will be described as an example. It is assumed that the display data on the column electrode i and the column electrode j are as shown in FIG. The column display pattern is represented as a vector (d) as shown in FIG. Here, when the column element is -1, on display is shown, and 1 indicates off display. Assuming that the row electrode voltage is sequentially applied to the row electrodes in the order of the columns of the matrix, the column electrode voltage level becomes a vector (v) shown in FIG. 4B, and the waveform is shown in FIG. become that way. In FIG. 4C, the vertical and horizontal axes are arbitrary units.
[0013]
In the case of selecting a partial line, in order to suppress the frame response of the liquid crystal display element, it is preferable to apply voltages in a distributed manner within one display cycle. Specifically, for example, after the first element of the vector (v) for the first simultaneously selected row electrode group (hereinafter, referred to as a subgroup) is applied, the second simultaneously selected row electrode group is called a subgroup. The first element of the vector (v) for the group of row electrodes to be applied is applied, and so on.
[0014]
Therefore, the voltage pulse sequence actually applied to the column electrodes determines how the voltage pulses are dispersed in one display cycle, and what selection matrix (A) is used for each of the simultaneously selected row electrode groups. Is selected.
[0015]
By the way, when displaying a window pattern that is used very frequently recently, a phenomenon called crosstalk occurs, which is a display problem.
[0016]
The case where the influence of crosstalk is the most remarkable appears when a bar is displayed as shown in FIG. Display unevenness appears in the area B below the bar. This is because, when Δε> 0, when full ON display is performed, the capacitance component of the liquid crystal becomes maximum and the column electrode voltage waveform becomes the most distorted state. That is, regardless of the same ON state, a luminance difference of region A <region B appears as display unevenness. This indicates that the effective voltage applied to the liquid crystal also satisfies region A <region B. A display pattern such as a window display is a combination of the displays in FIG. 3 and is assumed to be used most frequently, and reducing display unevenness (crosstalk) is a major issue.
[0017]
The size of the cross-talk, the bar width W or of by varying the length L, a change. As the width W of the bar of the display pattern increases, the luminance difference between the area A and the area B decreases. The luminance difference between the bar length L greatly to take the region A and the region B increases.
[0018]
These phenomena Ru can be explained on the basis of the distortion of the column electrode waveforms are different between ON waveform and OFF waveform. In other words, the ON waveform is a waveform that is distorted to some extent, whereas the OFF waveform is a waveform that is almost ideal.
[0019]
Cause the on waveform distortion is mainly two-fold. One is that the drive system does not consist of ideal power supplies and ideal drivers. Since most of the display in FIG. 3 is in the ON state, most of the column electrodes output an ON waveform. At this time, in the driving system, a large load is applied to the voltage level for outputting the ON waveform among the column electrode voltage levels, which causes distortion. The other is the effect of the capacitance inside the liquid crystal panel. In the ON state, the capacity of the liquid crystal connected in series to the column electrode is maximized. Therefore, if there are many ON waveforms, the waveform in the liquid crystal panel becomes the most distorted state.
[0020]
On the other hand, a waveform close to the ideal is output as the off waveform. This is because the condition that the waveform is distorted compared to the ON waveform does not apply.
[0021]
In FIG. 3, in the region A, only the substantially ON column electrode waveform is applied, but in the region B, both ON and OFF column electrode waveforms are applied. Therefore, only a very distorted waveform is output as the column voltage waveform in the region A, whereas the column voltage distortion in the region B is not as large as that in the region A as a whole. Therefore, in the region B, the decrease in the effective voltage applied to the liquid crystal is small.
[0022]
As described above, MLS method albeit an extremely effective method to suppress the frame response, among the present inventors have further research, it is often display unevenness due to crosstalk is conspicuous as compared with the conventional driving method I understand that.
[0023]
This is presumed to be due to the feature that the row electrode voltage level is lower in the driving method for simultaneously selecting a plurality of rows than in the line sequential driving. That is, when a plurality of rows are selected at the same time, the bias ratio between the row electrode voltage and the column electrode voltage is reduced, and the effect of the column electrode voltage on the effective voltage is much greater than in the conventional driving method. As a result, if there is a waveform distortion in the column electrode voltage series, the influence on the display quality is greater than that of the conventional one.
[0024]
In fact the power supply is used in the driving system, is distorted voltage waveform always at the input terminal since the ability of the driver is finite. In a liquid crystal panel, a voltage component to be output to a column electrode is considerably output because it is considered that a capacitance component of the liquid crystal itself and an electrode resistance are connected in series. Therefore, when a plurality of rows are selected at the same time, display unevenness due to crosstalk may be conspicuous. This phenomenon becomes remarkable when the number L of simultaneously selected row electrodes becomes 5 or more.
[0025]
Another major problem is crosstalk in halftone display. The halftone display method includes a frame rate control method, an amplitude modulation method, a combination with a dither method, and the like. The frame rate control is most frequently used as a driving method of a liquid crystal display device. At this time, in order to make the occurrence of flicker less noticeable, a combination with spatial modulation that spatially (between adjacent pixels) makes a phase difference and cancels flicker is often used. In this case, unlike the solid display based on the binary display, the spatial frequency of the image may be extremely high for each frame. For this reason, crosstalk occurs and the quality of the image is degraded. Similarly, when the dither method is used, the spatial frequency is high and there is a problem of crosstalk.
[0026]
Further, when displaying a moving image such as a video display, there is a problem of image deterioration. In a video display, unlike a basically geometrical display such as a window, many spatially complicated displays (that is, high spatial frequencies) appear. Therefore, in particular, when trying to display a video display in a specific window, there arises a problem that not only the quality of the video display itself is degraded due to the generated crosstalk but also the surrounding windows are affected.
[0027]
On the other hand, with respect to the relationship between the suppression of the frame response and the circuit size, there is a problem that the frame response is suppressed as the L increases, but the circuit size increases and the cost increases. A method was required.
[0028]
[Means for Solving the Problems]
The present invention provides the following method of driving an image display device in order to solve the above problems. That is, a row electrode of an image display device having a plurality of (M) row electrodes and a plurality of column electrodes is divided into four subgroups, and the subgroups are collectively selected, and the four rows and four columns are selected. A method for driving an image display device, wherein a voltage based on a signal obtained by expanding a selected column vector (A ₁ , A ₂ , A ₃ , A ₄ ) of a selected orthogonal matrix (A) in time series is applied to a row electrode, The sequence of column vectors is A ₁ , A ₂ , A ₃ , A ₄ , A ₁ , A ₂ , A ₃ , A ₄ , A ₁ . A selection pulse corresponding to the code is applied to each row of the selected subgroup, a 0 voltage is applied to the rows of the unselected subgroup, and A ₁ is applied to all the subgroups within one display frame. , A ₂ , A ₃ , A ₄ A corresponding voltage is applied, and a column electrode display pattern vector (x) = (x ₁ ) whose elements are display patterns (off = 1, on−1) corresponding to simultaneously selected row electrodes on a specific column electrode , X ₂ , x ₃ , x ₄ ) and the inner product y _i = (x ₁ , x ₂ , x ₃ , x ₄ ) B _i of the selected column vector (A _{i: i = 1,2,3,4} ) proportional voltage is applied to the column electrode, the selection pulse N times (N is an odd number of 3 or more and less than 50) reversing the polarity of the row and column signal period as a cycle to be applied is periodically performed wherein Rukoto that provides a driving method of an image display device according to.
[0029]
Also, a 4-by-4 selection orthogonal matrix (A) is an orthogonal matrix created by combining one or two or more of the row permutation, column permutation, and column or row polarity inversion of Equation 1. It is another object of the present invention to provide a method of driving the above-mentioned image display device.
[0030]
In addition, the present invention provides the driving method of the image display device described above, wherein the polarities of the row signal and the column signal are inverted before the display cycle is completed.
[0032]
Further, the present invention provides the above-described image display device driving method, wherein a frame rate control method or a dither method with spatial modulation is used as a gradation display method.
[0033]
Further, the present invention provides a driving method of the image display device, wherein the image display device is a liquid crystal display device.
[0034]
The present invention also provides a method for driving an image display device, wherein video display is performed on at least a part of a screen of the image display device.
[0035]
In this specification, one display cycle refers to the shortest time during which the address of all the row electrodes is completed. That is, the minimum time interval at which the effective value is determined. This can be said to be a time interval in which all the orthogonal row vector components of the orthogonal matrix (A) are applied to the selection electrode. Further, in this specification, unless otherwise specified, L is used as the number of row electrodes selected simultaneously, K is used as the number of selection pulses applied to a specific row electrode in one display cycle, and M is used for all rows. N is used as the number of electrodes, and N is used as the number of pulses applied in one display cycle.
[0036]
The present inventors have studied the causes of crosstalk when multiple simultaneous selections are made, and as a result of satisfying specific conditions, it is possible to greatly reduce the above-described various crosstalks simultaneously, and It was found that the drive by the reduced MLS method crosstalk can be achieved with a simple circuit.
[0037]
The number L of simultaneously selecting a plurality of lines is set to L = 4 in the present invention. This memory access speed, frame response inhibition rate is one determined by the point of view of execution and ease of driving with reduced crosstalk. In the driving method of the present invention, a sequence of column vectors of a selection matrix for generating a sequence of row signals having high periodicity is determined, and an orthogonal matrix system optimal for reducing crosstalk is presented. As a result, a high-performance display is realized with a small-scale circuit configuration.
[0038]
The cause of the crosstalk is explained as follows. When L row electrodes are selected at the same time, the variation width of each pulse of the column electrode voltage strongly affects the variation of the effective value of the column electrode waveform. This is a feature different from the line-sequential driving. When the L row electrodes are simultaneously selected, the column electrode voltage level is higher than that in the line-sequential driving. That is, in the line-sequential driving, a large waveform distortion mainly occurs at the time of polarity inversion. However, in the simultaneous multiple-selection driving, it also occurs when the fluctuation width of the column electrode voltage for each pulse is large. In the multiple simultaneous selection drive, column electrode voltage frequently fluctuates depending on the type of selection matrix, so that strong crosstalk occurs.
[0039]
Therefore, it is extremely important to study the voltage pulse sequence actually applied to the column electrodes in order to reduce the crosstalk. Therefore, the following describes how the voltage pulse sequence actually applied to the column electrodes in the MLS method is.
[0040]
When one part of all the row electrodes is selected simultaneously (partial line selection), there are basically three ideas from the viewpoint of when to proceed with the selection pulse sequence. In the first method , when one subgroup is selected and the next subgroup is selected, the selection pulse sequence of the row electrode is advanced by one, that is, the selection pulse sequence in units of subgroups (1) der Ru. The second method is Ru method (2) der that advances (for all subgroups) select a pulse sequence when all lines have been selected. The third method is an intermediate method (3) of the methods (1) and (2). In the case of the method (1) and the method (2), when a vector indicating a selected pulse is indicated for each subgroup, the vector is as shown in Expression 2. Here, each column vector _{A 1, A} 2 ··· _{A K} of the selection matrix (A), the number of subgroups was _{N S.}
[0041]
(Equation 2)

[0042]
The sequence of the voltages applied to the column electrodes is represented by a vector (v) = (v ₁ , v ₂ , v ₃ ,...) In the same manner as the column electrode voltage level shown in FIG. Then, in the case of the method (1), (v ₁ , v ₂ , v ₃ ,..., V ₂ , v ₃ , v ₄ ,...), And in the case of the method (2), (v ₁ , v ₁₎ ,... V ₁ , v ₂ , v ₂ ,..., V ₂ , v ₃ ,. The number of times each of Repetitive returns is the number of sub-groups.
[0043]
These relationships as generally having 3, can be written in a few formula comprising a vector and a matrix.
[0044]
(Equation 3)

[0045]
The vector (x), vector (y), and matrix (S) are as follows. A column electrode display pattern vector (x) = (x ₁ , x ₂ ,..., X _M ) has the same number of elements as the number M of row electrodes, and is a display pattern corresponding to a row electrode on a specific column electrode. Is an element. Here, it is assumed that the value is 1 for off and -1 for on. The column electrode voltage sequence vector (y) = (y ₁ , y ₂ ,..., Y _N ) has the same number of elements as the number N of pulses applied in one display cycle, and the voltage for a specific column electrode. Elements in which the levels are arranged in chronological order within one display cycle are used as elements. The row electrode pulse sequence matrix (S) is a matrix of M rows and N columns, and has a column vector composed of row electrode voltage levels for a specific column electrode arranged in time series within one display cycle as an element. The element corresponding to the unselected row electrode is set to 0. For example, the row electrode pulse sequence matrix S in method (1) is written as the number 4 by the column vector A _i, and zero vector Z _e of the selection matrix A.
[0046]
(Equation 4)

[0047]
In the sequence of the method (2), since the frequency becomes too low, flicker may occur. Therefore, it is often preferable to advance the selection pulse sequence before completing the application of the selection pulse at least once to each subgroup. Therefore, the present invention will be described below by taking, as a typical case, a case where the sequence of the method (1) is mainly employed as an example. Of course, the case where the sequences of the method (2) and the method (3) are adopted can be similarly considered.
[0048]
When the sequence of the method (1) is adopted, the row electrode pulse sequence matrix (S) is obtained by changing the selection matrix (A) to ((A) except when the polarity is inverted or when the last subgroup is shifted to the first subgroup). A) It is sufficient to consider an arranged matrix such as (A)... (A). This is because, as shown in Equation 2 or Equation 4, focusing on the sub-group to be selected is because it is A _1, A ₂ · · ·, Ri Repetitive a voltage corresponding to the A _K returns applied.
[0049]
That is, if the sequence of the method (1) is adopted, it is almost determined whether or not the condition of the present invention is satisfied depending on what selection matrix A (L rows and K columns) is adopted. That is, if an appropriate matrix is selected by appropriately rearranging the column components of an arbitrary matrix composed of mutually orthogonal row components, a preferable column electrode waveform can be produced. Hereinafter, what selection matrix should be used will be specifically described.
[0050]
According to the present invention, the matrix (S) is evaluated by Expression 5 as a criterion for selecting an optimal column waveform in terms of the maximum voltage fluctuation width on the time axis (in the order in which the sequence proceeds).
[0051]
(Equation 5)

[0052]
Incidentally, it is preferable to suppress Δy _i to a certain value or less in all display patterns, but this is practically difficult since Δy _i depends on the column electrode display pattern vector (x). For example, the value of Δy _i is completely different between the display of all-on and the display of the checkered pattern.
[0053]
The inventors have found that the following factors govern various types of crosstalk.
[0054]
(1) Selection matrix type (2) Selection pulse sequence (selection pulse distribution method)
(3) In order to suppress crosstalk in a large number of patterns such as a row / column permutation of a selection matrix and a moving image, it is necessary to appropriately determine the above conditions (1) to (3). In the present invention, as a result of examining the conditions (1) to (3) in detail, focusing on data conversion by the matrix S that is formed, in order to improve display quality, and particularly to effectively suppress crosstalk, should S is determined by any standard, i.e., have found should select pulse sequence and the selection matrix a comprising its original is determined as squid.
[0055]
In the present invention, (x) = (1, 1,..., 1) (reference pattern 1) and (1, -1, 1, -1,.・ ・) (Reference pattern 2) In a normal binary display, a state close to all on or all off (for example, a pattern in which a block or line display exists on a uniform solid pattern) is dominant, and a gradation display or a moving image display is far more. The display state having a high spatial frequency becomes dominant. In order to reduce crosstalk with respect to these patterns having completely different spatial frequencies, it is important to determine (1) to (3) using the above two reference vectors. It has been found that an image with reduced crosstalk can be provided.
[0056]
Generally, by setting Δy _i + Δy _i ′ <1.4 · L (hereinafter, referred to as condition A) with respect to the above-described reference vector, the maximum voltage fluctuation difference can be suppressed to a practical level. Particularly preferably, Δy _i + Δy _i ′ ≦ L (hereinafter, referred to as condition B). Here, Δy _i indicates a variation difference with respect to the reference pattern 1, and Δy _i ′ indicates a variation difference with respect to the reference pattern 2.
[0057]
Next, a column electrode waveform using a Hadamard function that has been used until now will be examined. Here, the selection pulse sequence takes the method (1) as an example. FIG. 5C shows a Hadamard matrix having 7 rows and 8 columns. For reference pattern 1, (x) = (1, 1,..., 1), and for (y) = (7, − 1, -1,... -1, 7, 7, -1,...), And the maximum displacement (the maximum of Δy _i ) is 8. For reference pattern 2, (x) = (1, -1,1, -1,...), While (y) = (1,7,1, -1,1, -1,. 1, -1, 1, 7, 1,...), And the maximum displacement (the maximum of Δy _i ) is 6. On the other hand, since L = 7, the condition A is Δy _i + Δy _i ′ <9.8. Therefore, in this case, Δy _i + Δy _i ′ = 14, and the condition A is not satisfied at the time of the maximum displacement. That is, when a Hadamard matrix is used as the selection matrix, the maximum voltage fluctuation is large for both the low-frequency display pattern and the high-frequency display pattern, and this causes a decrease in the effective value mainly due to waveform distortion.
[0058]
The waveform pattern in this case is as shown in FIG. FIG. 2 shows a column voltage waveform in an all-on display in an arbitrary unit. It can be seen that there is a large voltage fluctuation periodically.
[0059]
Although the two reference patterns are completely different in spatial frequency, the optimal matrix S can be determined as follows. First, a reference selection matrix (orthogonal function) is prepared. It is desirable that the criterion at this time be set so that the signs of adjacent column elements match as much as possible. This is because the pattern dependency given to the column voltage sequence is suppressed when the codes of the adjacent columns match. The condition for this is that the sum F of the number of elements having the same sign between adjacent columns (1 and 2, 2 and 3,..., K and 1) of the matrix A is equal to the matrix size L × K. for,
F ≧ L × K / 2
It is desirable to satisfy the relationship
[0060]
FIG. 1 shows an example of a 4 × 4 matrix optimized under these conditions. In this matrix, a column signal which has exactly the same level with respect to the reference pattern 1 and which fluctuates only once between +2 and -2 with respect to the reference pattern 2 is generated with extremely small voltage fluctuation. I do. Another feature of this matrix is that the number of codes is equal in each row vector (in the above example, 3 is positive and 1 is negative). This means that, for each line in a set (subgroup) of row electrodes that are selected at the same time, the same selected waveform that is different only in phase is sent, and unevenness in brightness between the lines occurs. Can be fundamentally suppressed. In other orthogonal matrices, there is no such thing that the sequence of each row vector is only a phase difference, and it is necessary to correct unevenness between lines by some correction. In the present invention, by setting the number of simultaneous selections to 4 and the ratio of the numbers of codes of the elements of each row vector to 1: 3 (or 3: 1), it becomes possible to drive each line completely equivalent except for the phase. . A specific example is the above-described matrix, and a similar suitable matrix can be obtained by performing row replacement, column replacement, row or column polarity inversion, and the like.
[0061]
L = 4 Another feature of it is, with respect to solid display pattern is to be able to eliminate the fluctuation of the voltage at all. In the above matrix, since the numbers of the codes of the elements in the respective column vectors match, the column signal voltage is common to all four column vectors. The absence of column voltage fluctuations for all column vectors means that operations such as polarity inversion can be performed completely asynchronously with this vector sequence. When an orthogonal matrix of another dimension is used, since the voltage level of the column signal varies for each column vector of the orthogonal matrix, the polarity can be inverted only in synchronization with the sequence of the transmitted column vectors. This flexibility of the drive significantly inhibited, and the drive to the complex, and was also a complicated circuit configuration.
[0062]
In the present invention, since the polarity inversion can be performed asynchronously, the polarity can be inverted only with a simple counter function, and the period of the polarity inversion can be arbitrarily selected within a very wide range. In practice, an odd multiple of 3 to less than 50 of the selection pulse is desirable, particularly an odd number of 3 or more and 23 or less from the viewpoint of the period for the polarity inversion to be established in all the subgroups. The reason why the even number is not preferable is that L = 4 is an even number, and there is a high risk that the AC driving is impaired in connection with the fact that four selection pulses are sent to each subgroup four times per frame. Particularly desirable inversion periods include 5, 7, 9, 11, 13, 23 and the like.
[0063]
With respect to polarity reversal and selection vector sequence, it is important that M and L satisfy an appropriate relationship. For example, when the number M of row lines is 240 and L = 4, 240/4 = 60, and the number of subgroups is 60. In this case, assuming that the polarity inversion cycle is every 5 pulses, 60/5 = 12, inversion occurs at a fixed location, and AC conversion is not established. Therefore, in order to drive 240 lines every 5 pulses of polarity inversion, it is necessary to add a virtual line and break the above relationship. For example, the number of subgroups may be set to 61 (the number of lines = 244), and may be performed for every five pulses of polarity inversion.
[0064]
The necessary condition is that one of the number of subgroups Ns and the polarity reversal period (for each R pulse) is not a divisor of one, and this condition is achieved by adding a virtual line or the like. is necessary. Another requirement is that the vector sequence and the period of the polarity inversion are different, and the polarity inversion period R must not be a multiple of four.
[0065]
Driving method of the present invention, JP-A 6-27907, Ru can be realized by using a circuit as described in USP5262881.
[0066]
FIG. 6 is a block diagram illustrating an example of a circuit configuration. This is a circuit for displaying 16 gradations for each of RGB. The data signal is input to the data pre-processing circuit 1 as a signal of 16 gradations as a 4-bit signal from MSB to LSB. The data pre-processing circuit 1 is a circuit for outputting a data signal to be input to the column signal generation circuit 2 in a format and timing suitable for forming a column signal in a subsequent stage. The data signal output from the data preprocessing circuit 2 and the orthogonal function signal output from the orthogonal function generation circuit 5 are input to the column signal generation circuit 2.
[0067]
The column signal generation circuit 2 performs a predetermined operation using both signals to form a column signal, and outputs the column signal to the column driver 3. The column driver 3 forms a column electrode voltage to be applied to a column electrode of the liquid crystal panel 6 from an input column signal using a predetermined reference voltage, and outputs the column electrode voltage to the liquid crystal panel 6. On the other hand, a row electrode voltage obtained by converting the orthogonal function signal output from the orthogonal function generation circuit 5 by the row driver 4 is applied to the row electrodes of the liquid crystal panel 6. These circuits are provided with a timing circuit and the like as necessary, and operate at a predetermined timing.
[0068]
The orthogonal function used in the present invention is generated by the orthogonal function generation circuit 5. The orthogonal function generating circuit 5 can also perform a calculation every time an orthogonal function signal is generated to form a signal. However, it is preferable from the viewpoint of simplicity that the orthogonal function signal to be used is stored in the ROM in advance and read out at an appropriate timing. That is, pulses that define the timing of voltage application to the liquid crystal panel 6 are counted, and the orthogonal function signals in the ROM are sequentially read using the count value as an address signal. The orthogonal function generator has a polarity inversion terminal, and switches the polarity according to its logic. By switching the polarities of the orthogonal function, the column signal is also inverted at the same time.
[0069]
FIG. 7 is a block diagram showing an example of the configuration of the data preprocessing circuit. The data pre-processing circuit 1 converts the input data into 1-bit data for each color corresponding to the gradation method of frame modulation and stores it in the memory 12. As the memory 12, a 16-bit data width VRAM was used. Writing to the memory 12 is performed as follows using the direct access mode. That is, the data on the row electrodes corresponding to the same column electrode is stored in four adjacent addresses for the four row electrodes selected at the same time. By doing so, reading from the memory at the subsequent stage can be performed at high speed, and the operation becomes easy.
[0070]
Reading from the memory 12 is performed in a high-speed sequential access mode according to the drive timing of the LCD, and four sets of data are sent to the data format conversion circuit 16.
[0071]
The data format conversion circuit 16 is a circuit for rearranging the data sent in parallel for each gradation into parallel signals for RGB, and usually suffices to perform appropriate wiring on a circuit board.
[0072]
FIG. 8 is a block diagram showing an example of the configuration of the column signal generation circuit 2. The data converted by the data format conversion circuit 16 is sent to the column signal generation circuit 2. A 4-bit data signal is input to exclusive OR gates 23, 23,... The signals from the orthogonal function generator 5 are also input to the exclusive OR gates 23. The output of the exclusive OR gate 23 is added for the row electrodes selected simultaneously by the adder 21.
[0073]
FIG. 9 is a block diagram illustrating an example of the configuration of the column driver 3. It comprises a shift register 31, a latch 32, a decoder 33, and a voltage divider 34. A demultiplexer is used as the voltage level selector 33, and the display data is converted into a column voltage when data for one row is sent to the shift register 31.
[0074]
FIG. 10 is a block diagram illustrating an example of the configuration of the row driver 4. It comprises a driving pattern register 41, a selection signal register 42, and a decoder 43. The content of the selection signal register 42 determines the simultaneously selected row, and the content of the drive pattern register 41 determines which polarity of the selection signal is output to each selected row. 0V is output to the non-selected rows.
[0075]
6 to 10 are shown as examples of circuits, and various circuits can be adopted as long as the essence of the present invention is not impaired.
[0076]
【Example】
Using the circuit shown in FIGS. 6 to 10, the liquid Akirapa panel 6 is driven in the following manner. Liquid Akirapa panel comprises 9.4 inch VGA module (number of pixels 480 × 640 × 3 (RGB) ) Device backlight. Response time of the liquid Akirapa channel is 60ms in average of the rising and falling. In addition to the simultaneous selection of four rows, the selection was performed in each subgroup, and the column of the selection matrix was driven by one (scheme 1). Since the two-screen drive (up and down division) was performed, the number of subgroups was 60. Bias was adjusted so that the contrast ratio becomes substantially maximum, gradation was performed in the spatial modulation frame rate control method.
[0077]
The display contrast ratio was 40: 1, and the maximum luminance was 100 cd / m ² .
[0078]
The matrix shown in FIG. 1 was used as the selection matrix.
[0079]
Vector sequence were made to correspond to the selected column vector and subgroups selected as indicated in table 1 (1 frame) below SL.
[0080]
[Table 1]

[0081]
The polarity was inverted every time five row selection pulses were applied, and driving was performed.
[0082]
In the present embodiment, uniform display was obtained, crosstalk was significantly reduced, and even when video display was displayed in a window on Windows screen display, the level was hardly noticeable.
[0083]
【The invention's effect】
According to the present invention, in a method of driving a liquid crystal display device by a multiple line simultaneous selection method, it is possible to reduce crosstalk in halftone display as well as crosstalk that occurs when the entire screen is close to on or off. Also, when displaying a video display in a specific window, a clear image can be obtained.
[0084]
Further, a liquid crystal display device having a high frame response suppressing effect despite the low circuit cost can be obtained.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram showing a selection matrix suitable for a driving method according to the present invention.
FIG. 2 is a waveform diagram showing a column voltage waveform at the time of all-on display in a conventional driving method.
FIG. 3 is a conceptual diagram for explaining crosstalk.
FIGS. 4A to 4C are a conceptual diagram and a waveform diagram illustrating a voltage application method in the MLS method.
FIGS. 5A to 5C are explanatory diagrams showing Hadamard matrices.
FIG. 6 is a block diagram illustrating an example of a configuration of a circuit for implementing the present invention.
FIG. 7 is a block diagram showing a data preprocessing circuit 1;
FIG. 8 is a block diagram showing a column signal generation circuit 2.
FIG. 9 is a block diagram showing a column driver 3.
FIG. 10 is a block diagram showing a row driver 4.
[Explanation of symbols]
1: data preprocessing circuit 2: column signal generation circuit 3: column driver 4: row driver 5: orthogonal function generation circuit 6: liquid crystal panel

Claims (6)

A row electrode of an image display device having a plurality of (M) row electrodes and a plurality of column electrodes is divided into four subgroups, and the subgroups are collectively selected. A method for driving an image display device, wherein a voltage based on a signal obtained by expanding a selected column vector (A ₁ , A ₂ , A ₃ , A ₄ ) of a matrix (A) in a time series is applied to a row electrode,
Sequence _{A 1, A 2, A 3} , A 4, A 1, A 2, A 3, A 4, A 1 subgroup sequentially selected ... made repeated cycles of selection column vectors,
A selection pulse corresponding to the sign of the element of the selected column vector is applied to each row of the selected subgroup, zero voltage is applied to the rows of the non-selected subgroup, and one voltage is applied to all subgroups. In the display frame, voltages corresponding to all selected column vectors of A ₁ , A ₂ , A ₃ , and A ₄ are applied,
A column electrode display pattern vector (x) = (x ₁ , x ₂ , x ₃ ) having a display pattern (off = ₁ , on = −1) corresponding to simultaneously selected row electrodes on a specific column electrode. x ₄ ) and the inner product y _i = (x ₁ , x ₂ , x ₃ , x ₄ ) A _{i of} the selected column vector (A _{i: i = 1,2,3,4} )
Is applied to the column electrodes ,
The driving method of the selection pulse N times (N is an odd number of 3 or more and less than 50) an image display apparatus inverted polarity row and column signals, characterized in Rukoto performed periodically as cycle period for applying. A 4-by-4 selection orthogonal matrix (A) is

2. The driving method according to claim 1, wherein the matrix is an orthogonal matrix formed by combining one or more of the row permutation, column permutation, and column or row polarity inversion. Method. 3. The method according to claim 1, wherein the polarities of the row signal and the column signal are inverted before the display cycle is completed. As the gradation display method, according to claim 1, 2 or the driving method of an image display apparatus according to 3, which comprises using a frame rate control method or a dither method involving spatial modulation. The method according to claim 1 , 2, 3, or 4 , wherein the image display device is a liquid crystal display device. The method for driving an image display device according to any one of claims 1 to 5 , wherein video display is performed on at least a part of a screen of the image display device.

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