JPH085676A - Voltage application current measuring circuit - Google Patents

Voltage application current measuring circuit

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Publication number
JPH085676A
JPH085676A JP6156699A JP15669994A JPH085676A JP H085676 A JPH085676 A JP H085676A JP 6156699 A JP6156699 A JP 6156699A JP 15669994 A JP15669994 A JP 15669994A JP H085676 A JPH085676 A JP H085676A
Authority
JP
Japan
Prior art keywords
current
load
voltage
amplifier
operational amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6156699A
Other languages
Japanese (ja)
Other versions
JP3390533B2 (en
Inventor
Yoshihiro Hashimoto
好弘 橋本
Kenji Izawa
憲治 伊澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
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Filing date
Publication date
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Priority to JP15669994A priority Critical patent/JP3390533B2/en
Publication of JPH085676A publication Critical patent/JPH085676A/en
Application granted granted Critical
Publication of JP3390533B2 publication Critical patent/JP3390533B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE:To obtain a current measuring circuit in which the DC characteristics of static current can be measured at a relatively high speed by providing a diode connected in reverse parallel with a current amplifier thereby stabilizing the voltage and current at a relatively high speed even for a load where the ratio between the stationary current and inverting operation current is high. CONSTITUTION:When a load 1 pulsates and a load current IL of several amperes flows, a discharge current IC2 flows from a bias capacitor C2. A current amplifier A3 then supplements the charging current quickly thus resetting the steady state quickly. Since noise and drift of the high current amplifier A3 have no effect on the external circuit, DC characteristics of the load 1 can be measured accurately. Since the amplifier A3 only requires a simple emitter follower, the response rate is increases by a factor of about 100, the transient time is reduced by a factor of several tens, and the measuring time of the load 1 increases by a factor of 10 or more. Consequently, economical effect is great.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、例えばCMOS構造
のLSI(大規模集積回路)のように静止時と動作時と
で流れる電流の比が大きいIC(半導体集積回路)等の
直流特性を測定する場合に用いる電圧印加電流測定回路
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention measures the DC characteristics of an IC (semiconductor integrated circuit) or the like, such as an LSI (large-scale integrated circuit) having a CMOS structure, in which the ratio of currents flowing at rest and during operation is large. The present invention relates to a voltage applied current measuring circuit used when performing.

【0002】[0002]

【従来の技術】図4に一例として高集積半導体テスタに
用いられている従来の電圧印加電流測定回路の構成を示
す。図中1は直流特性を測定しようとする負荷を示す。
負荷1には並列にバイパスコンデンサC2を接続してい
る。負荷1には演算増幅器A1から直流電圧Voを与え
る。演算増幅器A1には、帰還回路3を通じて負荷1に
与える電圧Voを帰還させ、負荷1に与える電圧Voの
変動を抑制する構造としている。この直流電圧Voは直
流電圧源2の電圧をViとした場合、定常状態では V
o=Vi で与えられる。
2. Description of the Related Art FIG. 4 shows, as an example, the configuration of a conventional voltage applied current measuring circuit used in a highly integrated semiconductor tester. In the figure, reference numeral 1 indicates a load whose DC characteristics are to be measured.
A bypass capacitor C2 is connected in parallel to the load 1. A DC voltage Vo is applied to the load 1 from the operational amplifier A1. The operational amplifier A1 has a structure in which the voltage Vo applied to the load 1 is fed back through the feedback circuit 3 to suppress the fluctuation of the voltage Vo applied to the load 1. This DC voltage Vo is V in the steady state when the voltage of the DC voltage source 2 is Vi.
Given by o = Vi.

【0003】演算増幅器A1から負荷1に与えられる電
流を検出するために電流検出回路4が設けられる。この
電流検出回路4は、電流検出用の抵抗器R1と、この抵
抗器R1に並列接続した位相補正用コンデンサC1と、
逆並列接続されたダイオードD1、D2とによって構成
される。電流検出用の抵抗器R1に発生する電圧をアナ
ログ減算回路(差動増幅器)5で取り出しA/D変換器
6でデジタル信号に変換し負荷1の直流特性が測定され
る。つまり直流電圧源2の電圧Viを順次変化させたと
き、各電圧毎に負荷1に流れる電流を測定し、負荷1の
例えば電源端子の直流特性を測定する事ができる。この
とき、CMOSセルに異常等があると、電源電流が規定
値より増加あるいは減少するのでデバイスの良否判定が
できる。
A current detection circuit 4 is provided to detect the current supplied from the operational amplifier A1 to the load 1. The current detection circuit 4 includes a resistor R1 for current detection, a phase correction capacitor C1 connected in parallel with the resistor R1, and
It is composed of diodes D1 and D2 connected in antiparallel. The voltage generated in the resistor R1 for current detection is taken out by the analog subtraction circuit (differential amplifier) 5 and converted into a digital signal by the A / D converter 6, and the DC characteristic of the load 1 is measured. That is, when the voltage Vi of the DC voltage source 2 is sequentially changed, the current flowing through the load 1 can be measured for each voltage, and the DC characteristics of the load 1, for example, the power supply terminal can be measured. At this time, if there is an abnormality in the CMOS cell, the power supply current will increase or decrease from the specified value, so that it is possible to judge the device quality.

【0004】負荷1と並列にバイパスコンデンサC2を
接続している。更にまた電流検出用の抵抗器R1にはこ
れと並列に位相補正用コンデンサC1を接続している。
ここでバイパスコンデンサC2と位相補正用コンデンサ
C1の存在理由を簡単に説明する。負荷1が例えばCM
OS構造のVLSIの場合、静止時は数μA(マイクロ
アンペア)の電流しか流れないのに対し、反転動作には
数百mA(ミリアンペア)程度の大きい電流IL がパ
ルス状に流れる場合がある。負荷1に流れる電流が大き
く変動する場合に、その電流変動を演算増幅器A1が検
知して応答するまでの時間遅れの期間中にバイパスコン
デンサC2が負荷1に流れる電流変動を補償する動作を
行う。つまり、負荷1に流れる電流がパルス状に急増す
る場合はバイパスコンデンサC2から放電電流を放出さ
せ、演算増幅器A1の遅れを補償する。また負荷1に流
れる電流が急減する場合は、バイパスコンデンサC2は
演算増幅器A1の遅れ動作によって流れ続ける大きい電
流を充電電流として吸収し、演算増幅器A1の遅れを補
償する。
A bypass capacitor C2 is connected in parallel with the load 1. Furthermore, a phase correction capacitor C1 is connected in parallel with the resistor R1 for current detection.
Here, the reason why the bypass capacitor C2 and the phase correction capacitor C1 are present will be briefly described. Load 1 is CM
In the case of the VLSI having the OS structure, only a current of several μA (microampere) flows at rest, whereas a large current IL of about several hundred mA (milliampere) may flow in a pulse shape in the reversing operation. When the current flowing through the load 1 largely fluctuates, the bypass capacitor C2 performs an operation of compensating for the current fluctuation flowing through the load 1 during the time delay until the operational amplifier A1 detects and responds to the current fluctuation. That is, when the current flowing through the load 1 suddenly increases in a pulse shape, the discharge current is discharged from the bypass capacitor C2 to compensate the delay of the operational amplifier A1. When the current flowing through the load 1 suddenly decreases, the bypass capacitor C2 absorbs a large current that continues to flow due to the delay operation of the operational amplifier A1 as a charging current and compensates for the delay of the operational amplifier A1.

【0005】一方位相補償用コンデンサC1はバイパス
コンデンサC2を接続したことにより演算増幅器A1の
動作が不安定になることを阻止するために設けられてい
る。つまり、演算増幅器A1のオープンループゲイン
は、素子固有の一定周波数を越えると−6dB/オクタ
ーブの安定(発振等の動作が起きない)した減衰特性を
呈する。然るにバイパスコンデンサC2を接続すると、
バイパスコンデンサC2と電流検出用の抵抗器R1によ
って決まる周波数f1 =1/(2πR1 ・C2 )
以上の周波数では−12dB/オクターブの減衰特性と
なる。この減衰特性のまま0dBを横切ると発振等の現
象を起こし、不安定な動作となる。このため0dBに至
る手前の周波数で、減衰特性を再び元の−6dB/オク
ターブに戻す必要が有り、そのために位相補正用コンデ
ンサC1を挿入する。その折点の周波数はf2 =1/
(2πR1 ・C1 ) となる。
On the other hand, the phase compensating capacitor C1 is provided to prevent the operation of the operational amplifier A1 from becoming unstable due to the connection of the bypass capacitor C2. That is, the open loop gain of the operational amplifier A1 exhibits a stable attenuation characteristic of -6 dB / octave (no operation such as oscillation occurs) when it exceeds a constant frequency peculiar to the element. However, if the bypass capacitor C2 is connected,
Frequency f1 = 1 / (2πR1 · C2) determined by bypass capacitor C2 and resistor R1 for current detection
At the above frequencies, the attenuation characteristic is -12 dB / octave. If 0 dB is crossed with this attenuation characteristic, a phenomenon such as oscillation occurs and the operation becomes unstable. Therefore, it is necessary to return the attenuation characteristic to the original −6 dB / octave at a frequency before reaching 0 dB, and therefore the phase correction capacitor C1 is inserted. The frequency at that break point is f2 = 1 /
(2πR1 · C1)

【0006】この回路構造によれば直流電圧源2から与
える電圧Viを変化させることにより負荷1に与えられ
る電圧Voを変化させることができる。定常状態では負
荷1に流れる電流IL と電流検出回路4の抵抗R1を
流れる電流Ioとが等しいのでA/D変換器6から出力
される電圧値Vmにより、Io=IL =Vm/R1を
得る。よって、負荷1の内部抵抗RX は、RX =V
o/Io=Vi・R1 /Vmで求めることができ、印
加電圧Voの変化に対する内部抵抗RXの変化つまり直
流特性を測定することができる。
According to this circuit structure, the voltage Vo applied to the load 1 can be changed by changing the voltage Vi applied from the DC voltage source 2. In the steady state, the current IL flowing through the load 1 and the current Io flowing through the resistor R1 of the current detection circuit 4 are equal, so that the voltage value Vm output from the A / D converter 6 gives Io = IL = Vm / R1. Therefore, the internal resistance RX of the load 1 is RX = V
It is possible to obtain o / Io = Vi · R1 / Vm, and it is possible to measure the change in the internal resistance RX with respect to the change in the applied voltage Vo, that is, the DC characteristic.

【0007】ところでMOS型のLSIでは、図5Aに
示すように静止時に流れる電流Ioと反転動作時に流れ
るIL との比が大きい。前述のように、例えば静止時
には数μA程度のIoしか流れないのに対し、反転動作
時には、その反転動作する素子の数に比例して電流が流
れ、大きい場合には数百mAのIL に達し、その電流
比は1000倍以上になることが多い。この高電流IL
は電流検出用の抵抗器R1に並列接続したダイオード
D1またはD2を通じて流れ、抵抗器R1とコンデンサ
C1から成る時定数に影響されずに演算増幅器A1から
バイパスコンデンサC2に充放電電流を供給できる構造
としている。以上の説明により静止時に流れる電流I
oが微少値の場合には電流検出抵抗器R1の抵抗値が大
きいこと、この電流検出用の抵抗器R1と並列に位相
補正用コンデンサC1を接続しなければならないこと、
バイパスコンデンサC2が必要であること、ダイオ
ードD1とD2を設けたこと等が理解できる。
By the way, in the MOS type LSI, as shown in FIG. 5A, the ratio of the current Io flowing at rest to the IL flowing at reversal operation is large. As described above, for example, only Io of about several μA flows at rest, while current flows in proportion to the number of elements performing the reversal operation at the time of reversal operation, and reaches IL of several hundred mA when the current is large. The current ratio is often 1000 times or more. This high current IL
Flows through the diode D1 or D2 connected in parallel with the resistor R1 for current detection, and the charging / discharging current can be supplied from the operational amplifier A1 to the bypass capacitor C2 without being affected by the time constant of the resistor R1 and the capacitor C1. There is. From the above description, the current I flowing at rest
When o is a small value, the resistance value of the current detection resistor R1 is large, and the phase correction capacitor C1 must be connected in parallel with the current detection resistor R1.
It can be understood that the bypass capacitor C2 is necessary and the diodes D1 and D2 are provided.

【0008】ここでバイパスコンデンサC2の放電と充
電及びVoとIoの様子を図5を用いて説明する。図5
Aに示すように負荷1にパルス状の電流IL が流れた
場合、演算増幅器A1の遅れを補うためにバイパスコン
デンサC2は負荷1に電流Ic2(図5B)を放電す
る。このためバイパスコンデンサC2の電圧Voが低下
する(図5C)。バイパスコンデンサC2の電圧の低下
は帰還回路3のより演算増幅器A1に帰還されて、演算
増幅器A1側からバイパスコンデンサC2に充電電流I
o(図5D)が流れ始める。この充電電流Ioは、当初
電流検出用の抵抗器R1と位相補償用のコンデンサC1
を通じて流れる。
Here, the discharge and charge of the bypass capacitor C2 and the states of Vo and Io will be described with reference to FIG. Figure 5
When a pulsed current IL 1 flows through the load 1 as shown by A, the bypass capacitor C2 discharges the current Ic2 (FIG. 5B) into the load 1 to compensate for the delay of the operational amplifier A1. Therefore, the voltage Vo of the bypass capacitor C2 decreases (FIG. 5C). The decrease in the voltage of the bypass capacitor C2 is fed back to the operational amplifier A1 by the feedback circuit 3, and the charging current I is supplied from the operational amplifier A1 side to the bypass capacitor C2.
o (FIG. 5D) begins to flow. This charging current Io is initially a resistor R1 for current detection and a capacitor C1 for phase compensation.
Flowing through.

【0009】この電流の増加により抵抗器R1に発生す
る電圧V1が上昇し、ダイオードD1又はD2の何れか
一方(この例ではD1)がオンになり充電電流Ioの大
部分はダイオードD1を通じて流れる。従って、やや時
間が遅れてIoは最大となり、その後 τ=R1・C1
で減少し、遅延時間Td後に定常状態に達する。遅延
時間Tdはτより大きな値となる。
Due to this increase in current, the voltage V1 generated in the resistor R1 rises, either one of the diodes D1 or D2 (D1 in this example) is turned on, and most of the charging current Io flows through the diode D1. Therefore, Io becomes maximum with a slight delay, and then τ = R1 · C1
Decreases and reaches a steady state after a delay time Td. The delay time Td becomes a value larger than τ.

【0010】[0010]

【発明が解決しようとする課題】上述のように、CMO
S構造のLSIの場合には、静止時と反転動作時での負
荷電流が1000倍以上となるので定常状態に達する遅
延時間Tdが長くなり、精密測定ではその後に測定を開
始するので測定に時間がかかり、多量のICを試験する
場合に障害になっている。しかも近年は益々CMOS・
LSIの集積度が向上し、反転動作時には負荷電流が数
A(アンペア)以上要するようになり、その電流比は数
万倍以上になることがある。そこでバイパスコンデンサ
の容量も10μF(マイクロファラド)と大きなコンデ
ンサを用いるようにもなり、益々測定の高速化の障害に
なってくる。しかもゲートアレイやマイクロコントロー
ラのように複雑なロジック回路を持つデバイスでは、試
験するための組み合わせが多いため高速で静止電流を測
定する要求が多い。
As described above, the CMO
In the case of an S-structured LSI, the load current at rest and at reversing operation becomes 1000 times or more, so the delay time Td to reach the steady state becomes long, and in the precision measurement, the measurement is started after that, so the measurement time This is an obstacle to testing a large number of ICs. Moreover, in recent years,
The integration degree of the LSI is improved, the load current is required to be several amperes (A) or more at the time of the reversing operation, and the current ratio thereof may be tens of thousands times or more. Therefore, the capacity of the bypass capacitor is as large as 10 μF (microfarad), and it becomes an obstacle to speeding up the measurement. In addition, in devices with complicated logic circuits such as gate arrays and microcontrollers, there are many combinations for testing, and there is a great demand for measuring quiescent current at high speed.

【0011】また高速測定のためには、演算増幅器のノ
イズも問題となってきて、演算増幅器には低ノイズで高
速動作で大電流のものが要求されている。ダイオードに
は低リークで大電流のものが要求される。例えば、電圧
Voに100kHzで10μVのノイズ電圧Vonが重
畳しているとすると、バイパスコンデンサの容量を10
μFとして、電流Ioに流れるノイズ電流Ionは、I
on=Von/Zc2=10×10−6×2π×105
×10×10−6=62.8μA と大きなノイズ電
流Ionが電流検出用抵抗器に流れる。しかも演算増幅
器で大電流動作をさせると、発熱による温度ドリフトが
生じ、これがまた誤測定の原因ともなってきている。
For high-speed measurement, the noise of the operational amplifier has become a problem, and it is required that the operational amplifier has low noise, high-speed operation and large current. The diode is required to have low leakage and large current. For example, assuming that the noise voltage Von of 10 μV at 100 kHz is superimposed on the voltage Vo, the capacity of the bypass capacitor is 10
As μF, the noise current Ion flowing in the current Io is I
on = Von / Zc2 = 10 × 10−6 × 2π × 105
A large noise current Ion of × 10 × 10−6 = 62.8 μA flows through the current detection resistor. Moreover, when a large current operation is performed by the operational amplifier, temperature drift due to heat generation occurs, which is also a cause of erroneous measurement.

【0012】本発明の目的は、負荷電流の静止時と反転
動作時の電流比が大きい負荷であっても、比較的高速度
に電圧電流が安定となり、比較的高速度に静止電流の直
流特性を測定できる電圧印加電流測定回路を提供しよう
とするものである。
An object of the present invention is to stabilize the voltage / current at a relatively high speed even if the load has a large current ratio between the quiescent current and the inverting operation, and the DC characteristics of the quiescent current at a relatively high speed. The present invention intends to provide a voltage applied current measuring circuit capable of measuring

【0013】[0013]

【課題を解決するための手段】上記目的を達成するため
に、本発明は演算増幅器の出力端と負荷との間に、電流
増幅器と、その電流増幅器と直列に逆並列に接続したダ
イオードを接続する構成とする。電流増幅器はわずかな
電圧電流で大きな電流を吐き出し、あるいは吸い込むも
のであれば良いので、大電流の供給と吸収を行うエミッ
タ・フォロアでよい。従って、上記のダイオードがオン
すると、負荷に大量の電流を速やかに供給できる。そこ
で演算増幅器には大電流供給能力は不要である。そして
静止電流測定時にはダイオードがオフ状態であるので、
上記電流増幅器にノイズがあってもそのノイズ電流は電
流供給線には流れない。また電流増幅器にドリフト等が
生じても、その電圧変動は負荷側には伝わらない。た
だ、上記電流増幅器は高速動作で大電流供給能力があれ
ばよいだけである。
In order to achieve the above object, the present invention connects a current amplifier and a diode connected in series and antiparallel to the current amplifier between an output terminal of an operational amplifier and a load. The configuration is The current amplifier may be one that emits or absorbs a large current with a slight voltage current, so an emitter follower that supplies and absorbs a large current may be used. Therefore, when the diode is turned on, a large amount of current can be quickly supplied to the load. Therefore, the operational amplifier does not need a large current supply capability. And since the diode is off when measuring the quiescent current,
Even if there is noise in the current amplifier, the noise current does not flow in the current supply line. Further, even if drift or the like occurs in the current amplifier, the voltage fluctuation is not transmitted to the load side. However, the current amplifier only needs to operate at high speed and have a large current supply capability.

【0014】[0014]

【実施例】本発明の一実施例を図1に示す。図4に対応
する部分には同一符号を付す。全体的には図4の従来の
回路と似ているが、従来の回路に加え、演算増幅器A1
の出力端子に電流増幅器A3を接続し、電流増幅器A3
の出力電流を並列に逆接続された対のダイオードD3及
びD4を通して負荷1側に電流を供給あるいは吸収す
る。大電流を速やかに負荷1側に供給あるいは吸収する
ためである。従って、従来の対のダイオードD1とD2
は不要になる。大電流は全てこの電流増幅器A3とダイ
オードD3とD4で行うようにする。
FIG. 1 shows an embodiment of the present invention. Parts corresponding to those in FIG. 4 are designated by the same reference numerals. Although generally similar to the conventional circuit of FIG. 4, in addition to the conventional circuit, operational amplifier A1
The current amplifier A3 is connected to the output terminal of
Output current is supplied or absorbed to the load 1 side through a pair of diodes D3 and D4 reversely connected in parallel. This is because a large current is quickly supplied or absorbed to the load 1 side. Therefore, the conventional pair of diodes D1 and D2
Becomes unnecessary. A large amount of current is supplied by the current amplifier A3 and the diodes D3 and D4.

【0015】回路の動作もほぼ従来の回路(図4)と同
じであるが、大電流を速やかに供給あるいは吸収するの
で、回路全体での過渡状態の時間が非常に短くなり、速
やかに定常状態に収束する。しかも演算増幅器A1は通
常の演算増幅器でよく、大電流供給の必要は無く、従っ
てノイズの問題もドリフトの問題も解消する。
The operation of the circuit is almost the same as that of the conventional circuit (FIG. 4), but since a large current is rapidly supplied or absorbed, the transient state time of the entire circuit becomes very short, and the steady state is quickly achieved. Converge to. Moreover, the operational amplifier A1 may be a normal operational amplifier, and it is not necessary to supply a large current, so that the problem of noise and the problem of drift are solved.

【0016】電流増幅器A3には大電流供給が要求され
るが、その構成は図3に示すエミッタフォロアで充分で
あり、簡単な回路で解決できる。大電流供給が要求され
るために電流増幅器A3でのドリフトやノイズが生じて
くるが、これは一気に大電流を供給し瞬時に回路全体が
定常状態に近くなると、ダイオードD3もD4も遮断状
態となるので、その影響は電流供給線には現れず、供給
電流Ioや負荷電流IL には影響を与えない。
The current amplifier A3 is required to supply a large amount of current, but the emitter follower shown in FIG. 3 is sufficient for its configuration and can be solved by a simple circuit. Since a large current is required to be supplied, drift and noise occur in the current amplifier A3. However, when a large current is supplied all at once and the entire circuit instantly approaches a steady state, both the diodes D3 and D4 are cut off. Therefore, the influence does not appear on the current supply line, and does not affect the supply current Io or the load current IL.

【0017】図2に図1の回路の電圧電流の波形図を示
す。負荷1が反転動作すると、図2Aに示すように数ア
ンペアの負荷電流IL が流れる。これに必要な電流は
当初はバイパスコンデンサC2から電流Ic2を放電す
る(図2B)。これにより負荷1の電源電圧Voが低下
し(図2C)、その電圧Voが演算増幅器A1に帰還し
て演算増幅器A1からの電流Ioが増加し始める(図2
D)。よって電流検出用抵抗器R1の電圧降下 R1・
Io が大きくなり、ダイオードD3が導通状態となり
電流増幅器A3から大電流I1が一気に負荷1側に流れ
出し、電流不足分を迅速に補充する(図2E)。
FIG. 2 shows a waveform diagram of the voltage and current of the circuit of FIG. When the load 1 inverts, a load current IL of several amps flows as shown in FIG. 2A. The current required for this initially discharges the current Ic2 from the bypass capacitor C2 (FIG. 2B). As a result, the power supply voltage Vo of the load 1 decreases (FIG. 2C), the voltage Vo is fed back to the operational amplifier A1, and the current Io from the operational amplifier A1 starts to increase (FIG. 2).
D). Therefore, the voltage drop across the current detection resistor R1
Io becomes large, the diode D3 becomes conductive, and the large current I1 suddenly flows from the current amplifier A3 to the load 1 side to quickly supplement the current shortage (FIG. 2E).

【0018】従って、バイパスコンデンサC2は直ちに
充電され(図2B)、負荷電圧Voは復帰し、その電圧
Voが演算増幅器A1に帰還されてその出力電流Ioが
減少し(図2D)、電流検出用抵抗器R1の電圧降下が
小さくなるとダイオードD3は遮断状態となり、大電流
I1の供給を停止する(図2E)。その後、全体的に定
常状態に復帰する。この定常状態に復帰する過渡時間
は、電流増幅器A3を付けることにより従来の回路の数
拾分の1位になり、応答速度は100倍近く速くなる。
よって、測定速度が非常に速くなる。
Therefore, the bypass capacitor C2 is immediately charged (FIG. 2B), the load voltage Vo is restored, and the voltage Vo is fed back to the operational amplifier A1 to reduce its output current Io (FIG. 2D) for current detection. When the voltage drop of the resistor R1 becomes small, the diode D3 is cut off and the supply of the large current I1 is stopped (FIG. 2E). After that, the overall state returns to the steady state. By adding the current amplifier A3, the transient time to return to the steady state becomes one of several places of the conventional circuit, and the response speed becomes nearly 100 times faster.
Therefore, the measurement speed becomes very high.

【0019】[0019]

【発明の効果】以上詳細に説明したように、本発明は、
負荷1がパルス状に反転動作して数アンペアの負荷電流
IL が流れたときに、バイパスコンデンサC2から放
電電流Ic2が流れるが、これに対し電流増幅器A3か
ら大電流で迅速にその充電電流を補充し、速やかに定常
状態に復帰させる。しかも大電流増幅器A3のノイズや
ドリフトの影響が外部に現れず、負荷1の直流特性を高
速に正確に測定するものである。しかも電流増幅器A3
は簡単なエミッタフォロアで充分であり、応答速度は1
00倍近く速くなり、過渡時間は数10分の1となり、
負荷1の測定時間は10倍以上高速になる。従って、本
発明は非常に有用であり、その技術的効果もさることな
がら、経済的効果も非常に大である。。
As described in detail above, the present invention provides
When the load 1 performs a pulse-shaped inverting operation and a load current IL of several amperes flows, a discharge current Ic2 flows from the bypass capacitor C2, whereas the charge current is quickly replenished with a large current from the current amplifier A3. Then, quickly return to the steady state. Moreover, the influence of noise and drift of the large current amplifier A3 does not appear outside, and the DC characteristics of the load 1 can be measured accurately at high speed. Moreover, the current amplifier A3
Is a simple emitter follower, and the response speed is 1
It is nearly 00 times faster, the transition time is several tenths,
The load 1 measurement time is 10 times faster. Therefore, the present invention is very useful and has not only a technical effect but also an economic effect. .

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の構成図である。FIG. 1 is a configuration diagram of an embodiment of the present invention.

【図2】図1の実施例の動作を説明するための波形図で
ある。
FIG. 2 is a waveform chart for explaining the operation of the embodiment of FIG.

【図3】電流増幅器A3の一例の構成図である。FIG. 3 is a configuration diagram of an example of a current amplifier A3.

【図4】従来の電圧印加電流測定回路の構成図である。FIG. 4 is a configuration diagram of a conventional voltage applied current measuring circuit.

【図5】図4の回路の動作を説明するための波形図であ
る。
5 is a waveform diagram for explaining the operation of the circuit of FIG.

【符号の説明】[Explanation of symbols]

1 負荷 2 直流電圧源 3 帰還回路 4 電流検出回路 5 アナログ減算器 6 A/D変換器 A1 演算増幅器 A3 電流増幅器 D1、D2 ダイオード D3、D4 ダイオード R1 電流検出用抵抗器 C1 位相補償用コンデンサ C2 バイパスコンデンサ 1 load 2 DC voltage source 3 feedback circuit 4 current detection circuit 5 analog subtractor 6 A / D converter A1 operational amplifier A3 current amplifier D1, D2 diode D3, D4 diode R1 current detection resistor C1 phase compensation capacitor C2 bypass Capacitor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 電流電圧特性を測定すべき負荷(1)に
演算増幅器(A1)を通じて所定の直流電圧を与える直
流電圧源(2)と、上記負荷(1)に並列に接続された
バイパスコンデンサ(C2)と、上記負荷(1)に与え
た電圧を上記演算増幅器(A1)に帰還させる帰還回路
(3)と、上記演算増幅器(A1)の出力端子と上記負
荷(1)との間に接続されて電流を検出する電流検出用
の抵抗器(R1)及びこの電流検出用の抵抗器(R1)
に並列に接続された位相補正用のコンデンサ(C1)と
から成る電流検出回路(4)と、上記電流検出回路
(4)に発生する電圧を取り出すアナログ減算回路
(5)とによって構成される電圧印加電流測定回路にお
いて、 上記演算増幅器(A1)の出力端子と上記負荷との間
に、電流増幅器(A3)と、上記電流増幅器(A3)に
直列に接続され逆並列に接続されたダイオード対(D
3、D4)と、を具備することを特徴とする電圧印加電
流測定回路。
1. A DC voltage source (2) for applying a predetermined DC voltage to a load (1) whose current-voltage characteristic is to be measured through an operational amplifier (A1), and a bypass capacitor connected in parallel to the load (1). (C2), a feedback circuit (3) for feeding back the voltage applied to the load (1) to the operational amplifier (A1), and between the output terminal of the operational amplifier (A1) and the load (1). Resistor for current detection (R1) connected to detect current and resistor for current detection (R1)
Voltage composed of a current detection circuit (4) consisting of a capacitor (C1) for phase correction connected in parallel to the above, and an analog subtraction circuit (5) for extracting the voltage generated in the current detection circuit (4). In the applied current measuring circuit, between the output terminal of the operational amplifier (A1) and the load, a current amplifier (A3) and a diode pair (connected in series and antiparallel to the current amplifier (A3) are connected. D
3, D4), and a voltage applied current measuring circuit.
JP15669994A 1994-06-15 1994-06-15 Voltage applied current measurement circuit Expired - Fee Related JP3390533B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15669994A JP3390533B2 (en) 1994-06-15 1994-06-15 Voltage applied current measurement circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15669994A JP3390533B2 (en) 1994-06-15 1994-06-15 Voltage applied current measurement circuit

Publications (2)

Publication Number Publication Date
JPH085676A true JPH085676A (en) 1996-01-12
JP3390533B2 JP3390533B2 (en) 2003-03-24

Family

ID=15633410

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15669994A Expired - Fee Related JP3390533B2 (en) 1994-06-15 1994-06-15 Voltage applied current measurement circuit

Country Status (1)

Country Link
JP (1) JP3390533B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002541432A (en) * 1999-02-05 2002-12-03 テラダイン・インコーポレーテッド Low cost configuration for monitoring and controlling parametric measurement units in automated test equipment
JP2007127568A (en) * 2005-11-07 2007-05-24 Advantest Corp Measuring instrument and measuring method
JP2009074900A (en) * 2007-09-20 2009-04-09 Yokogawa Electric Corp Voltage application current measurement circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002541432A (en) * 1999-02-05 2002-12-03 テラダイン・インコーポレーテッド Low cost configuration for monitoring and controlling parametric measurement units in automated test equipment
JP2007127568A (en) * 2005-11-07 2007-05-24 Advantest Corp Measuring instrument and measuring method
JP4729384B2 (en) * 2005-11-07 2011-07-20 株式会社アドバンテスト Measuring apparatus and measuring method
JP2009074900A (en) * 2007-09-20 2009-04-09 Yokogawa Electric Corp Voltage application current measurement circuit

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