JPH0855216A - Image processor - Google Patents

Abstract

PURPOSE:To immediately display an original image from an image after image processing at need by reading the original image data out of a storage means on the basis of set value data and outputting the data. CONSTITUTION:Image data generated by a scanner part 10 or video input part 11 are supplied to an image processing block 12 and stored in a frame memory 1. A CPU 8 stores the size and position of the inputted image side in a set value memory 30c as the set value data for reading the original image data out. With an FIT key 13a operated, the CPU 8 reads the set value data out of the set value memory 30c and reads the original image data out of the frame memory 1 on the basis of the read set value data. The original image data read out of the frame memory 1 are displayed on a monitor device 15 through a superposing circuit 30b and a D/A converter 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for subjecting still image data to image processing such as enlargement processing, reduction processing, rotation processing and dissolve processing, and outputting the same. The present invention relates to an image processing device capable of immediately outputting image data of an original image.

[0002]

2. Description of the Related Art Conventionally, there is known an image processing apparatus which performs image processing such as enlargement processing, reduction processing, rotation processing and dissolve processing of a display image based on captured image data.

This image processing apparatus has two memories, a large-capacity main memory and a video memory, and first stores the captured image data in the main memory. Next, the image data is read from the main memory, and the read image data is subjected to image processing such as enlargement processing, reduction processing, rotation processing and dissolve processing,
This is supplied to the video memory. Alternatively, the image data is subjected to image processing such as enlargement processing, reduction processing, rotation processing and dissolve processing in the main memory, and this is supplied to the video memory. Then, the image data which has been subjected to the enlargement processing and the like is read out from the video memory at a video rate and supplied to a monitor device, a printer device and the like.

As a result, enlargement processing is performed on the monitor device.
An image corresponding to image processing such as reduction processing, rotation processing, dissolve processing, etc. is displayed or printed.

[0005]

However, for example, the scanner device, the video tape recorder device, and the like, which are external input devices, have different image data sizes.
For this reason, in the conventional image processing apparatus, for example, when the input external device is switched from the scanner apparatus to the video tape recorder apparatus, the display position, the display size, etc., which have been used for the scanner apparatus until then, are changed to those for the video tape recorder apparatus. It was very troublesome to readjust the display position and display size.

Further, after performing image processing such as enlargement processing and reduction processing, it is sometimes desired to display the original image before the image processing is performed. In such a case, the applied image processing is performed. It was necessary to perform the reverse image processing to restore the original image. For example, when displaying the original image after performing the enlargement process, it is necessary to gradually return to the original image while repeating the reduction process. Therefore, it takes time to display the original image, and the original image cannot be displayed immediately when necessary.

The present invention has been made in view of the above-mentioned problems, and the input is automatically performed according to the data size of the input image data and the data size of an output external device that supplies the image data. In addition to changing the data size of the image data to be optimized,
It is an object of the present invention to provide an image processing device that can immediately display an original image from an image after image processing as necessary.

[0008]

An image processing apparatus according to the present invention temporarily stores image data supplied from the outside in a storage means, reads image data at a designated position from the storage means, and outputs a predetermined image. An image processing apparatus that performs processing and outputs, and has an original image output designating unit for designating output of original image data before the image processing is performed. Further, based on the data size of the image data supplied from the outside, setting value data for reading the original image data stored in the storage means is formed, and the original image output designating means forms the original image data. When the output of the image data is designated, it has a control means for reading and controlling the storage means so as to read and output the original image data stored in the storage means based on the set value data.

Further, the image processing apparatus according to the present invention has a processed image storage designating means for designating storage of the image processed image data, and a processed image storage means for storing the image processed image data. . When the storage of the image data subjected to the image processing by the processing image storage designating means is designated as the control means, the processing image storage means is write-controlled so as to temporarily store the image processed image data. At the same time, based on the data size of the image-processed image data, setting value data for reading the image data stored in the processed image storage means is formed, and the original image output designating means forms the original image. When the output of data is designated, the above-mentioned processing is performed so that the image data subjected to the image processing stored in the processing image storage means is read out and output as the original image data based on the setting value data. It has a means for reading and controlling the image storage means.

Further, the image processing apparatus according to the present invention includes a plurality of connecting means capable of connecting a plurality of external devices to which the image data read from the storage means or the processed image storage means are connected, and the plurality of connecting means. External device selecting means for selecting an external device that supplies the image data from the external devices. As the control means, the set value is set based on the data size of the image data supplied from the outside or the data size of the image processed image data, and the data size of the external device selected by the external device selection means. When data is formed and the output of the original image data is designated by the original image output designating means, it is stored in the storage means or the processed image storage means based on the setting value data corresponding to the selected external device. There is a unit for controlling the reading of the storage means or the processed image storage means so that the stored original image data is read out and output.

Further, the image processing apparatus according to the present invention has, as the control means, means for forming set value data for reading only the original image data.

Further, the image processing apparatus according to the present invention has, as the control means, a means for forming setting value data for reading all the original image data.

[0013]

The image processing apparatus according to the present invention temporarily stores the image data supplied from an external input device such as a video tape recorder device or a scanner device in the storage means, and stores the image data stored in the storage means. This is an image processing apparatus that reads out all or a specified range of image data, performs image processing such as enlargement processing and reduction processing, and supplies the output to external devices such as a monitor device, a printer device, and a disk recording / reproducing device.

Specifically, the image processing apparatus is connected to a monitor device, a printer device, a disk recording / reproducing device, etc., which are the output external devices, through a plurality of connecting means, and outputs the image data. The former is selected by the user operating the external device selecting means.

For example, if the user operates the external device selection means to select a monitor device from the output external devices, the control means detects this and sets the output destination of the image data to the monitor device. Switch. In this state, when image data is supplied from an external device such as the video tape recorder device or the scanner device, the control means controls the writing of the storage means so as to temporarily store the image data, and the external device. Setting value data for reading only the original image data stored in the storage means is formed based on the data size of the image data supplied from the device and the data size of the selected monitor device. Then, for example, when an image enlarging process or a reducing process is designated by the user, the image data in the designated range is read out from the storage unit according to the instruction, and the image data such as the enlarging process or the reducing process is applied to the image data. Supply to the monitor device. As a result, the image subjected to the image processing is displayed on the monitor device.

Next, there is a case where it is desired to restore the display image from the image processed image to the original image and display it.

In such a case, the user operates the original image output designating means. When the original image output designating means is operated, the control means detects it and controls the reading out of the storing means so as to read out the original image data from the storing means based on the set value data. In this case, the original image data is supplied to the monitor device.

Since the image processing apparatus is configured to perform image processing on the image data read from the storage means and output the image data, the original image data remains in the storage means even if the image processing is performed. Remembered Therefore,
When the original image output designating means is operated, the image processing is performed by reading the image data stored in the storage means based on the set value data of the original image data according to the external device. Even in this case, the original image can be immediately displayed if necessary.

Further, as described above, since the set value data formed by the control means is formed so as to read only the original image data, the monitor device is provided with a margin (black and white) above and below or to the left and right of the image. It is possible to display an image without a screen.

Further, since the control means forms the set value data based on the input image data and the output external device, the input image data is irrespective of the data size of the input image data. The data size can be stored in the storage means as image data having an optimum data size according to the output external device.

For this reason, it is possible to omit the troublesome work of processing the data so that the data size of the image data input by the user matches the data size of the external device for output, and also care about the data size. It is possible to continuously input image data from different input external devices without the need.

Here, the control means may form setting value data for reading all the original image data.

In this case, a margin (black screen or the like) may be displayed on the image displayed on the monitor device, for example, vertically or horizontally depending on the aspect ratio of the monitor device. There is an advantage that the entire image corresponding to the data can be displayed and confirmed.

The method of forming the set value data in such a control means may be determined as either one at the time of designing, or may be provided with a changeover switch so as to be changed by the user's intention.

Next, a reference image is selected from the images subjected to the image processing, and the image data of the reference image (image data subjected to the reference image processing) is output when necessary. You may want to display it.

For such a case, the image processing apparatus has a processed image storage designating means for designating storage of the image processed image data and a processed image storage means for storing the image processed image data. And have.

That is, the user wants the image to be returned and displayed as necessary after the image processing to be a desired image after the image processing, not the image according to the input image data as described above. In this case, for example, a desired image is selected from the image-processed images displayed on the monitor device, and the processed image storage designating means is operated.

When the processed image storage designating means is operated, the control means detects it and controls the writing of the processed image storage means so as to temporarily store the image data subjected to the image processing at the present time. Further, the control means reads the image data stored in the processed image storage means based on the data size of the image-processed image data and the data size of an external device supplying the image data. To form set value data for.

When the output of the original image data is designated by the original image output designating means, the image processing stored in the processed image storing means is performed based on the set value data. The processing image storage means is read out and controlled so that the image data is read out and output as the original image data.

With this, it is possible to output the reference image-processed image data selected by the user as required, and for example, the monitor device can immediately output the reference image-processed image data. The displayed image can be displayed.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of an image processing apparatus according to the present invention will be described in detail below with reference to the drawings.

The image processing apparatus according to the embodiment of the present invention records image data supplied from the outside on an optical disc, reproduces it, displays it on a monitor device, and prints it on a print sheet, as shown in FIG. It can be applied to various still image recording / playback systems.

This still image recording / reproducing system, as shown in FIG. 1, includes a frame memory 1, a memory controller 2 for controlling writing and reading of image data to and from the frame memory 1, and an operation of the entire image processing apparatus. A central processing circuit (CPU) 8 for controlling, and an operation unit 13 provided with keys for designating image processing such as enlargement processing and reduction processing, and a FIT key 13a for designating output of original image data described later. have.

Further, the still image recording / reproducing system stores set values for outputting the original image data formed by the CPU 8 based on the input image data and an external device for outputting the image data. Setting value memory 3
0c, a frame generation circuit 30a for generating an image frame corresponding to the external device to clearly indicate an image area corresponding to the external device that outputs the image data, and the frame for the image data read from the frame memory 1. And a superimposing circuit 30b for superimposing and outputting the image frame from the generating circuit 30a.

In the still image recording / reproducing system, the image processing block 12 for subjecting the image data read from the frame memory 1 to the image processing, and the scanner unit for capturing an image from, for example, a negative film or a photograph. 1
0, a video input unit 11 that captures image data from a camera device, a video tape recorder device, and the like, a monitor device 15 that displays the captured image, a printer unit 16 that prints the captured image, and a capture unit Storage unit 1 for recording and reproducing the recorded image on the optical disc 28
8 is provided.

As shown in FIG. 2, the image processing block 12 has an integer part described later for each storage area of the frame memory 1 based on the write control data and the read control data from the memory controller 2. An address generation circuit 3 that forms a write address and a read address formed of a decimal part and supplies the write address and a read address of the integer part to the frame memory 1, and the decimal part supplied from the address generation circuit 3. Write address, read address, and
It has an arithmetic circuit 4 for performing the arithmetic operation of the image processing based on the image data read from the frame memory 1.

Further, the image processing apparatus selects a color adjustment circuit 5 for performing color tone conversion processing on the image data image-processed by the arithmetic circuit 4 and image data supplied from a plurality of external devices. It has a first bus selector 6 for supplying to the arithmetic circuit 4 and a second bus selector 7 for selecting and outputting an external device for supplying image data from the color adjusting circuit 5.

The frame memory 1 reads and writes red (R) image data, an R frame memory, a green (G) image data is read and written, and a blue (B) image data is read and written. It is composed of a B frame memory.

That is, the frame memory for each color is
Logically, for example, vertical × horizontal × depth is 1024 pixels × 10
Four DRAMs (Dynamic RAMs) each having a storage area of 24 pixels × 4 bits and a total of 4 Mbits are arranged so as to form a square shape, and the four DRAMs arranged in the square shape are arranged in the depth direction. By stacking in stages, a total of 8 DRAMs can be obtained from 2048 × 2048 × 8
Each is configured to have a bit storage area.

The frame memory 1 is logically constructed by stacking the frame memories for the respective colors having the storage area of 2048 × 2048 × 8 bits in the depth direction in the order of RGB, for example. ing. Therefore,
The frame memory 1 has a storage area of 2048 × 2048 × 24 bits.

Next, the operation of the still image recording / reproducing system having such a configuration will be described.

First, when recording desired image data on the optical disk 28 of the storage unit 18, the user operates the operation unit 13 to specify a capture destination of the image data (the scanner unit 10 or the video input unit 11). With
The storage unit 18 is the output destination of the captured image data.
Set to.

As a result, the CPU 8 controls the scanner unit 10 or the video input unit 11 in the operating state, and controls the image processing block 12 and the interface block 17 so that the image data is output to the storage unit 18. .

The scanner section 10 can read both images of a reflective original and a transparent original. Specifically, for example, an E-size photograph, an L-size photograph, and an A6 size photograph can be read as the reflection original, and the transparent original, for example, 3
5mm, Brownie size negative film can be read. As the reflection original, the above 35
It is also possible to read originals printed with the same size of negative film of mm, Brownie size.

When the film, photograph, etc. are mounted on the document reading table, the scanner section 10 CCs the document.
It is read by the D line sensor 10a. The CCD line sensor 10a forms a still image signal corresponding to the read image and supplies it to the A / D converter 10b. The A / D converter 10b forms image data by digitizing the still image signal supplied from the CCD line sensor 10a, and supplies the image data to the correction system 10c. When the image is read from the 35 mm film, for example, the correction system 10c corrects the image data into image data having a size of 1200 pixels × 1700 pixels in vertical × horizontal size and outputs the image data. Also, the scanned document is a Brownie size film, E size photograph, L
12 for each size photo and A6 size photo
98 pixels x 975 to 1875 pixels, 1050 x 1450
Pixels, 1120 pixels x 1575 pixels, 1325 pixels x 1
The image data having a size of 825 pixels is corrected and output.

The video input section 11 is a composite video signal from a video tape recorder or the like, Y
It is possible to input video signals in three formats: a video signal supplied in the (luminance) / C (chroma) separate format and a video signal supplied in the RGB format. These video signals are respectively input. It is supplied to the video processing system 11d via the input terminals 11a to 11c.

The video processing system 11d uses the pixels of the video signal of each format as pixels of a square lattice and sets the image size to 480 pixels × 640 pixels, and supplies this to the A / D converter 11e. The A / D converter 1
1e forms and outputs image data corresponding to the video signal of each format by digitizing the video signal.

The scanner unit 10 or the video input unit 1
The image data formed by 1 is supplied to the image processing block 12, respectively. The image processing block 12
When image processing such as enlargement processing, reduction processing, rotation processing, dissolve processing, etc., which will be described later, is specified, such image processing is performed on the image data, and image processing related to the image processing is performed on the image data. Add information and output. This image data (and image processing information) is supplied to the superposition circuit 30b and also to the interface circuit 21 of the storage unit 18 via the interface block 17.

Here, the aspect ratio of the image data handled by the monitor device 15 and the aspect ratio of the image data handled by the scanner unit 10 and the video input unit 11 which are external input devices for inputting the image data are: Each is different. Further, while the aspect ratio of the monitor device 15 is 3: 4, the printer unit 16 and the storage unit 1 which are output external devices for supplying image data.
The aspect ratios of 8 are 4: 5 and 2: 3, respectively.

Therefore, when the image data fetched from the scanner section 10 or the video input section 11 is displayed on the monitor device 15, borders (black areas without image data) are added and displayed above and below the display image. It Further, if printing is performed by the printer unit 16 in this state, an image not displayed on the monitor device 15, that is, an image not intended by the user may be printed.

In order to eliminate such inconvenience, the above C
When the storage unit 18 is designated as the output destination of the captured image data by the user, the PU 8 has an image frame with an aspect ratio of 2: 3 which is the data size (image data size) of the image data handled by the storage unit 18. The frame generation circuit 30a is controlled so as to generate As a result, the frame generation circuit 30a forms image frame data indicating the image frame and supplies it to the superposition circuit 30b.

The superimposing circuit 30b superimposes the image frame data from the frame generating circuit 30a on the image data from the image processing block 12, and supplies the superimposed data to the D / A converter 14.

The D / A converter 14 forms a superimposed signal by converting the superimposed data into an analog signal and supplies it to the monitor device 15. As a result, FIG.
As shown in, the image frame P of the image data size handled by the storage unit 18 is displayed together with the still image corresponding to the image data captured from the film or photograph. Note that in FIG. 18A, the image outside the image frame indicated by the diagonal lines has, for example, a monotone, a halftone, or a predetermined pattern, and indicates that it is an area that is not recorded in the storage unit 18.

On the other hand, the user looks at the still image displayed on the monitor device 15 and selects a desired still image, and the selected image is displayed in the image frame P as shown in FIG. 18B. Image processing such as enlargement processing or reduction processing described later is performed so that Then, when the desired image is contained in the image frame P, the operation unit 13 is operated to specify the output of the image data currently displayed, and the operation unit 19 of the storage unit 18 is operated. Specify recording of still images.

Accordingly, the CPU 8 outputs the image data in the image frame P together with the image processing information (image processing information) corresponding to the image processing such as the enlargement processing or the reduction processing. The frame memory 1 is controlled to be read out via 2. The image data read from the frame memory 1 is supplied to the interface circuit 21 of the storage unit 18 via the interface block 17.

Further, the system controller 20 of the storage section 18 controls the interface circuit 21 so as to fetch the image data read from the frame memory 1.

The image data fetched through the interface circuit 21 is added with the image processing information relating to the image processing performed by the image processing block 12 in addition to the image data as described above. For this reason,
The interface circuit 21 separates the image data and the image processing information, and the image data is buffered by the buffer circuit 2.
2 and supplies image processing information to the system controller 2
Supply 0.

The buffer circuit 22 amplifies the image data with a predetermined gain and supplies it to the raster-block conversion circuit 23 and the non-compression circuit 25. The non-compression circuit 25 supplies the image data as it is to the selector 29 as high resolution image data without performing compression processing on the image data. Further, the raster-block conversion circuit 23 forms a compression block having a predetermined number of pixels, which is one unit of compression processing, based on the image data, and supplies this to the compression / expansion circuit 24. The compression / expansion circuit 24 performs, for example, two types of compression processing with different resolutions on each of the compression blocks to form intermediate resolution image data and low resolution image data, and supplies these to the selector 29. .

The selector 29 is controlled to be switched by the system controller 20, and the high resolution, intermediate resolution and low resolution image data via the selector 29 are so-called EFM circuits (8- 14 modulation circuit 26 and converted into a format suitable for recording and supplied to the disc recording / reproducing unit 27.

The disc recording / reproducing unit 27 adds information (image processing information, printer control information, etc.) relating to each image data to the image data of each resolution, and records this on the optical disc 28.

Specifically, the optical disc 28 is a magneto-optical disc having a diameter of, for example, 64 mm, and the disc recording / reproducing unit 27 records the low resolution image data on the inner circumference side and has a high resolution. Image data is recorded on the outer peripheral side, and image data of intermediate resolution is divided into an intermediate region between the inner peripheral side and the outer peripheral side for magneto-optical recording.

Image data of, for example, 200 sheets can be recorded on the optical disc 28. The image data for 200 sheets is 1 image data for 50 sheets.
As one album, it is managed by being divided into a total of four albums. Therefore, when recording the image data, the user uses the operation unit 19 to select an album in which the image data is recorded. This allows
The system controller 20 controls the disc recording / reproducing unit 27 so as to record the image data supplied to the album selected by the user in the order of capturing. At this time, the low resolution image data is recorded as an index for displaying a plurality of still images recorded in the album on one screen, and the intermediate resolution image data is recorded in the album. The desired high-resolution image data is recorded for display to display a desired still image, and the high-resolution image data is recorded for printing.

Next, the operation of the still image recording / reproducing system in the case of reproducing the image data recorded on the optical disk 28 and displaying it on the monitor device 15 will be described.

In this case, the user first specifies the album in which the desired still image is recorded from the above four albums. As a result, the system controller 20 controls the reading and writing of the disc recording / reproducing unit 27 so as to reproduce the low resolution image data of the designated album.

As described above, one album is composed of image data for 50 images, and these 50 still images may be displayed on the display screen at a time, but inevitably one image will be displayed. The display area becomes narrow, which may make it difficult for the user to select a desired still image. Therefore, the system controller 20 controls the reading and writing of the disc recording / reproducing unit 27 so as to read the low-resolution image data for 25 sheets by one designation. As a result, the disc recording / reproducing unit 27 first reads the 25 low resolution image data from the inner circumference side of the optical disc 28, and the compression / expansion circuit 24 through the EFM circuit 26 and the selector 29. Supply to.

The compression / expansion circuit 24 applies low-resolution expansion processing to the image data, and the interface block 17 is processed by the raster-block conversion circuit 23, the buffer circuit 22 and the interface circuit 21.
Supply to.

When the low resolution image data is supplied to the interface block 17, the system controller 2 supplies the low resolution image data to the D / A converter 14 via the image processing block 12. The D / A converter 14
Converts the low-resolution image data into an analog signal to form a low-resolution still image signal and supplies it to the monitor device 15. As a result, 25 still images are displayed as an index on the display screen of the monitor device 15.

When the user wants to display the remaining 25 still images, the user operates the operation unit 19 to display the remaining 25 still images.
Specifies the display of one still image. As a result, the system controller 20 controls the disc recording / reproducing device 27 so as to reproduce the remaining 25 low-resolution image data. As a result, the remaining 25 low-resolution image data are processed by the above-mentioned route and supplied to the monitor device 15, and the remaining 25 still images are displayed on the monitor device 15.

Next, the user operates the operation unit 19 so as to select a desired still image from the still images displayed by 25 sheets for the index. The system controller 20 controls the reading and writing of the disc recording / reproducing unit 27 so as to read the image data of the intermediate resolution corresponding to the selected still image. As a result, the disc recording / reproducing unit 27 reads out the image data having the intermediate resolution for display recorded in the intermediate area of the optical disc 28 and supplies it to the compression / expansion circuit 24 via the EFM circuit 26 and the selector 29. .

The compression / decompression circuit 24 subjects the image data to decompression processing for intermediate resolution, and supplies this to the interface block 17 via the raster-block conversion circuit 23, the buffer circuit 22 and the interface circuit 21. .

When the interface block 17 is supplied with the image data for the intermediate resolution, the system controller 2 supplies it to the D / A converter 14 via the image processing block 12. The D / A converter 1
Reference numeral 4 forms the still image signal for intermediate resolution by converting the image data for intermediate resolution into analog, and supplies this to the monitor device 15. As a result, the still image selected by the user is displayed on the display screen of the monitor device 15.

Next, the operation of the still image recording / reproducing system in the case of printing a still image captured via the scanner unit 10 or the video input unit 11 or a still image recorded on the optical disc 28 will be described.

First, when printing a still image captured via the scanner unit 10 or the video input unit 11, the user operates the operation unit 13 to perform the same operation as described above with respect to the scanner unit 10 or the video input unit 11. The image data is captured via the printer, and the printer unit 16 is designated as the output destination of the captured image data.

When the printer unit 16 is designated as the output destination of the image data, the CPU 8 sends the image data to the printer unit 1.
The image frame generation circuit 30a is controlled so as to generate an image frame that matches the image data size handled by the control unit 6. As a result, from the image frame generation circuit 30a, the image data size handled by the printer unit 16 (for example, the aspect ratio is 4:
Image frame data indicating an image frame that matches 5) is output and supplied to the superimposing circuit 30b.

Further, the CPU 8 controls the reading of the frame memory 1 via the memory controller 2 so as to read the fetched image data. The image data read from the frame memory 1 is supplied to the superimposing circuit 30b.

The superimposing circuit 30 superimposes image frame data on the image data, and the superimposing data is applied to the D / A converter 14.
Is supplied to the monitor device 15 via.

As a result, as shown in FIG. 17A, an image frame P corresponding to the image data size handled by the printer section 16 is displayed on the monitor device 15 together with the image corresponding to the image data.

The user performs image processing such as enlargement processing and reduction processing so that the image fits within the image frame P as shown in FIG. 17B. Then, when the image is contained in the image frame P, the operation unit 13 is operated to designate the printing of the image.

When the print is designated, the CPU 8 reads out the image data corresponding to the image data size of the printer section 16 from the image data stored in the frame memory 1. The frame memory 1 is read and controlled via the memory controller 2. The image data read from the frame memory 1 is supplied to the data conversion circuit 16a of the printer unit 16.

The data conversion circuit 16a subjects the image data read from the frame memory 1 to data conversion processing suitable for printing. That is, when the image data is supplied in the form of R, G, B or Y, Cr, Cb, it is supplied as Y (yellow), M (magenta), C.
Image data for printing is formed by performing color coordinate conversion in the form of (cyan).
supply to b.

The thermal head 16b prints a still image corresponding to the image data on, for example, A6 size print paper 16c at about 300 DPI. As a result, it is possible to print a still image corresponding to the image data captured via the scanner unit 10 or the video input unit 11.

Next, when printing the still image recorded on the optical disc 28, the user designates the printer section 16 as the output destination of the image data, and at the same time, displays the still image for index recorded on the optical disc 28. It is displayed on the monitor device 15 by the above operation. Then, a desired still image is selected from the still images for the index. Accordingly, as described above, the image frame P that matches the selected still image and the image data size of the printer unit 16 is displayed on the monitor device 15.

Next, the user performs the image processing so that the selected image fits within the image frame P displayed on the monitor device 15, and when the selected image fits within the image frame P. Then, the user operates the operation unit 13 to designate printing of the still image.

As a result, the CPU 8 forms and outputs print control data designating the reading of the image data for printing the still image currently displayed on the monitor device. This print control data is stored in the image processing block 1
2 and the interface block 17 to be supplied to the interface circuit 21 of the storage unit 18, and to the system controller 20 via the interface circuit 21.

As described above, the optical disc 28 has
Three types of image data are stored: low-resolution image data for index, intermediate-resolution image data for monitor display, and high-resolution image data for printing.

When the print control data is supplied, the system controller 20 controls the disc recording / reproducing section 27 so as to read out the high resolution image data for printing designated by the print control data. As a result, high-resolution image data corresponding to the still image displayed on the monitor device 15 is read from the optical disc 28. Since this high resolution image data is not compressed at the time of recording, it is supplied to the buffer circuit 22 via the non-compression circuit 25, and the interface circuit 21, the interface block 17,
It is supplied to the image processing block 12.

When the high resolution image data read from the optical disk 28 is supplied to the image processing block 12, the CPU 8 controls the writing of the frame memory 1 via the memory controller 2 so as to temporarily store the image data. To do. Then, the image data stored in the frame memory 1 is read out, and the user performs image processing so that the image displayed on the monitor device 15 fits within the image frame P. Conversion circuit 16a
Is supplied to.

The data conversion circuit 16a performs the above-described color coordinate conversion processing and the like on the high resolution image data read from the frame memory 1 and supplies it to the thermal head 16b. As a result, a still image corresponding to the image data read from the optical disc 28 is printed on the print paper 16c.

As described above, since the still image recording / reproducing system displays the image frame according to the image data size handled by the external device for outputting the image data on the monitor device 15, the user can By looking at the image displayed on the image frame, the image to be recorded and printed before recording and before printing can be recognized in advance.
Therefore, it is possible to prevent erroneous recording, misprinting, and the like.

Next, the operation of image processing such as enlargement processing, reduction processing, rotation processing, dissolve processing, etc. of the image data fetched from the scanner section 10, the video input section 11 or the storage section 18 in the image processing block 12 will be described. do.

First, as described above, the scanner unit 10,
The image data from the video input unit 11 or the storage unit 18 is supplied to the first bus selector 6 shown in FIG.

When the user operates the operation unit 13 to specify a device (the scanner unit 10, the video input unit 11 or the storage unit 18) which captures image data, the CPU 8 detects the device and detects it. The first bus selector 6 is switched and controlled so as to select the input of the device. The image data via the first bus selector 6 is supplied to the frame memory 1 via the arithmetic circuit 4.

As described above, the frame memory 1 is
The inside is divided into first to fourth storage areas AR1 to AR4 as shown in FIG. The CPU 8 is
For example, when image data having pixels indicated by ◯ in FIG. 3A is supplied, the image data is supplied via the memory controller 2 so that adjacent pixels are stored in different storage areas as shown in FIG. 3B. The frame memory 1 is controlled to be written.

In FIG. 3 (a), 00, 01, 02.
.. indicates the address of the pixel, the first numerical value indicates the row (row), and the next numerical value indicates the vertical column (row). Therefore, “00” indicates the address of the pixel in the 0th row and the 0th column, “11” indicates the pixel in the 1st row and the 1st column, and “12” indicates the pixel in the 1st row and the 2nd column. Will be shown.

Specifically, the image data supplied to the frame memory 1 is the first image data as shown in FIG.
Address 00, 02, 20, 2 in the memory area AR1 of
The image data of each pixel of 2 ...
In the memory area AR2 of the address 01, 03, 21, 23
The image data of each pixel of ... Is written. Further, the addresses 10, 12, 3 are stored in the third storage area AR3.
Image data of each pixel of 0, 32, ... Is written, and the addresses 11, 13, 3 are written in the fourth storage area AR4.
Image data of each pixel of 1, 33 ... Is written.

As will be described later, each storage area A
The image data written in R1 to AR4 is read separately for each of the storage areas AR1 to AR4, and the physical address of each of the storage areas AR1 to AR4 is as shown in FIG. Each is independent. Therefore, even if the write control is performed so that the adjacent pixels become different storage areas as described above, the data is read sequentially from the address 00 for each of the storage areas AR1 to AR4 at the time of reading.

When desired image data is loaded into the frame memory 1 as described above, image processing of the image data becomes possible.

First, when performing electronic zoom for enlarging and reducing the image data, the user operates the operation unit 1
The plus key (+) or the minus key (-) provided in 3 is turned on. In this electronic zoom, for example, the magnification gradually increases or decreases corresponding to the time during which the plus key or the minus key is continuously operated. Therefore, the CPU 8 detects the time during which the plus key or the minus key is continuously operated, and determines the enlargement ratio or reduction ratio of the still image based on the time during which the plus key or the negative key is continuously operated. calculate.

Specifically, the CPU 8 is, for example,
When the enlargement processing of 1 time is designated (Δ1.1), FIG.
Address data (delta address) indicating an increment value when the read address of the same size (Δ1) shown in (d) is expanded 1.1 times as shown in FIG. And the address generating circuit 3 shown in FIG. 2 via the memory controller 2.
Supply to. Similarly, when the enlargement process of 1.5 times is designated (Δ1.5), the CPU 8 increments the read address of the same size by 1.5 times as shown in FIG. Form the value delta address,
This is supplied to the address generation circuit 3 shown in FIG. 2 via the memory controller 2.

Further, when the reduction processing of 0.4 times is designated (Δ0.4), the CPU 8 reduces the read address of the same magnification to 0.4 times as shown in FIG. 4A. Form a delta address indicating a decreasing value in the case 0.
When the reduction processing of 5 times is designated (Δ0.5), the read address of the same size is 0.5 as shown in FIG.
When a delta address indicating a reduction value in the case of double reduction is formed, and a reduction process of 0.75 times is specified (Δ
0.75), the read address of the same size as above is used in FIG.
2 forms a delta address showing a decrease value when it is reduced to 0.75 times, and supplies these to the address generation circuit 3 shown in FIG. 2 via the memory controller 2.

The delta address indicates a change in the logical address when the enlargement process or the reduction process is performed, and the image data read from the physical address as shown in FIG. Data processing is performed based on the address to form image data corresponding to the logical address.

That is, the CPU 8 forms a delta address according to the enlargement ratio or the reduction ratio, and also forms a start address indicating a read start address of a portion for performing still image enlargement processing or reduction processing,
This is supplied to the address generation circuit 3 shown in FIG. 2 via the memory controller 2.

The horizontal (row) read address forming portion for the memory areas AR1 and AR2 of the address generating circuit 3 has a structure as shown in FIG.
The start address supplied from the PU 8 is once stored in the start address register 31, and the delta address is temporarily stored in the delta address register 32.

The read address forming section in the lateral direction (row) for the storage areas AR3 and AR4 is also the storage area A.
It has the same structure as the horizontal read address forming portion for R1 and AR2. In addition, the storage areas AR1, A
The vertical direction (column) read address forming portion for R2 and the vertical direction (column) read address forming portion for the storage areas AR3 and AR4 are also in the storage areas AR1 and A, respectively.
It has the same configuration as the horizontal read address forming portion for R2.

The start address stored in the start address register 31 is supplied to the integer adder 33 and the initialization selector 37. Further, the delta address supplied to the delta address register 32 is supplied to the adder 34 and the adder 35.

Here, when the target pixel P1 shown by x in FIG. 3 (a) is formed when performing the enlarging process or the reducing process, four pixels adjacent to the target pixel P1 in the arithmetic circuit 4 described later are formed. It is designed to be calculated using.
On the other hand, the pixels adjacent to the target pixel P1 are stored in different storage areas AR1 to AR4 of the frame memory 1, respectively. Further, in order to calculate the pixel of interest in this manner, each pixel read from each of the storage areas AR1 to AR4 requires a temporal front-rear relationship for the convenience of the operation in the operation circuit 4 described later. For this reason, the address generation circuit 3 is controlled so that the read address corresponding to the previous time is output by a predetermined amount.

That is, the integer adder 33 adds "1" to the start address and supplies it to the initialization selector 36. Thus, for example, if "0" is set as the start address, the addresses are supplied to the initialization selector 36 in the order of 1, 2, 3, ... As shown in FIG. Addresses are supplied to the initialization selector 37 in the order of 0, 1, 2, ... As shown in FIG.

The above initialization selectors 36 and 37
Via the input terminal 38, as shown in FIG.
Common selection control data that is inverted at the timing when a new address is supplied is supplied to each of the initialization selectors 36 and 37.

The initialization selector 36 supplies the address to the flip-flop 39 only when the high level selection control data is supplied. On the contrary, the initialization selector 37 supplies the address to the flip-flop 40 only when the low level selection control data is supplied.

Each of the flip-flops 39 and 40 has:
The address is latched based on the clock supplied through the input terminal 41, and the flip-flop 39 outputs the selection control data (FIG. 6C) as shown in FIG. 6D. The latched address is output from the rising edge of the pulse to the next rising edge, and the flip-flop 40 operates from the falling edge of the pulse of the selection control data to the next falling edge as shown in FIG. 6 (e). During this period, the latched address is output. As a result, as shown in FIGS. 6 (d) and 6 (e), it is possible to output the read address corresponding to the temporally previous one ahead by a predetermined amount.

The address output from the flip-flop 39 is fed back to the adder 34, and the address output from the flip-flop 40 is fed back to the adder 35.

The adder 34 adds the address fed back from the flip-flop 39 to the delta address indicating the increment value or the decrement value which is set according to the enlargement ratio or the reduction ratio, thereby increasing the enlargement. A read address for the storage area AR1 is formed in accordance with the magnification or reduction magnification, and this is used as the initialization selector 36.
And output via the flip-flop 39.

Similarly, the adder 35 adds the address fed back from the flip-flop 40 to the delta address to form a read address for the storage area AR2 according to the enlargement magnification or reduction magnification. Then, this is output via the initialization selector 37 and the flip-flop 40.

Therefore, by repeating such an operation, the read addresses to which the delta addresses have been added are successively output from the respective flip-flops 39 and 40. This read address is output as a total of 22 bits of data as shown in FIG. 7, for example, and a total of 8 bits of 0th bit to 7th bit of the address corresponding to the enlargement magnification or reduction magnification. Fractional part data indicating an increment value or a decrease value, the 8th bit is memory select data for selecting the storage areas AR1 to AR4, and a total of 13 bits from the 9th bit to the 21st bit is a memory indicating the address of an existing pixel. It is an address.

The decimal part data is a horizontal coefficient (KH) indicating a horizontal increment or decrease value for the address and a vertical coefficient (KV) indicating a vertical increment or decrease value for the address. It is composed of.

Then, as shown in FIG. 2, the storage area (AR1 to AR
4), the memory address is supplied, and the fractional part data (KH, KV) is supplied to the arithmetic circuit 4.

For example, in FIG. 3A, in order to calculate the noted pixel P1, the addresses 00, 01, 1
It is necessary to read the image data of pixels 0 and 11. The image data of the pixels at the addresses 00, 01, 10, 11 are stored in the storage areas AR1 to AR4 as shown in FIG.
All are stored at the address 00.

Therefore, in this case, in the address generation circuit 3, the memory address of the address 00 is formed for each of the storage areas AR1 to AR4 and is supplied to each of the storage areas AR1 to AR4 of the frame memory 1. The Rukoto.

Similarly, the pixel of interest P indicated by x in FIG.
To calculate 2, the addresses 01, 02, 11, 1
It is necessary to read the image data of two pixels. The image data of the pixel of the address 01 is stored in the address 00 of the storage area AR2 and in the address 02 of the storage area AR2 as shown in FIG. 3B.
The image data of the pixel of
The image data of the pixel at the address 11 is stored in the storage area A
The image data of the pixel of the address 12 is stored in the address 00 of R4, and the image data of the pixel of the address 12 is stored in the address 01 of the storage area AR3.

Therefore, in this case, in the address generation circuit 3, the memory addresses of the addresses 01, 00, 01, 00 for the storage areas AR1 to AR4 are formed, and the storage areas AR1 of the frame memory 1 are formed. ~ AR
4 will be supplied.

Similarly, the pixel of interest P indicated by x in FIG.
To calculate 3, the addresses 11, 12, 21, 2
It is necessary to read the image data of two pixels. As shown in FIG. 3B, the image data of the pixel of the address 11 is stored in the address 00 of the storage area AR4 and in the address 12 of the storage area AR4.
The image data of the pixel is the address 01 of the storage area AR3.
The image data of the pixel at the address 21 is stored in the storage area A
The image data of the pixel of the address 22 is stored in the address 10 of R2, and the image data of the pixel of the address 22 is stored in the address 11 of the storage area AR1.

Therefore, in this case, in the address generation circuit 3, the memory addresses of the addresses 11, 10, 01, 00 for the respective storage areas AR1 to AR4 are formed, and the respective storage areas AR1 of the frame memory 1 are formed. ~ AR
4 will be supplied.

When the memory address is supplied to the frame memory 1 as described above, the image data is read from the address designated by the memory address in each of the storage areas AR1 to AR4 and supplied to the arithmetic circuit 4.

The arithmetic circuit 4 is arranged in the frame memory 1
Image data of a still image read from each of the storage areas AR1 to AR4 of, for example, pixels indicated by ◯ in FIG. 8A, and the increment value or decrease of the address formed according to the enlargement ratio or the reduction ratio. Based on the fractional part data (KH, KV) indicating the value, the image data of the still image composed of each pixel indicated by x in FIG.

That is, for example, when calculating the image data of the pixel "Z" which is one of the virtual pixels related to the enlargement processing or the reduction processing shown in FIG. As shown in FIG. 6B, four pixels A to D around the "Z" pixel are detected. Then, as shown in FIG. 8B, based on the horizontal direction coefficient (KH) indicating the increment value or decrease value of the horizontal address, the A pixel and the B pixel are interpolated to detect the X1 pixel, The horizontal coefficient (K
H), the C and D pixels are interpolated to detect the X2 pixel, and the X1 pixel and the X2 pixel are interpolated based on the vertical direction coefficient (KV) to obtain the image of the “Z” pixel. Calculate the data.

Such arithmetic processing is performed based on the following arithmetic expression.

X1 = A (1-KH) + KHB = A + KH (B-A) ... First formula X2 = C (1-KH) + KHD = C + KH (D-C) ... Second formula Z = X1 (1−KV) + KVX2 = X1 + KV (X2−X1) Equation 3 Therefore, the arithmetic circuit 4 is configured to perform the arithmetic processing described above, and as shown in FIG. A first arithmetic unit 45 for performing arithmetic operations, a second arithmetic unit 50 for performing arithmetic operations of the second equation, and a third arithmetic unit 5 for performing arithmetic operations of the third equation.
It is composed of 5 and 5.

Each of the arithmetic units 45, 50 and 55 has the same structure and is composed of a selector, a subtractor, an adder and a multiplier.

In FIG. 9, the frame memory 1
If the image data of the A pixel and the B pixel are read from the first storage area AR1 and the second storage area AR2, respectively, the image data of the A pixel and the B pixel are stored in the first calculation unit 45. Is supplied to the selector 46. The selector 46 adds the image data of the A pixel to the adder 48.
And to the subtractor 47. Further, the image data of the B pixel is supplied to the subtractor 47.

The subtractor 47 subtracts the image data of the A pixel from the image data of the B pixel (BA), and supplies this to the multiplier 49. The multiplier 49 is supplied with the horizontal coefficient (KH) via the input terminal 43. The multiplier 49 multiplies the subtracted data from the subtractor 47 by the horizontal coefficient (KH) (KH).
(B-A)), and supplies this to the adder 48. The adder 48 adds the multiplication data from the multiplier 49 to the image data of pixel A from the selector 46 (A
+ KH (B-A) ... First expression), and supplies this to the selector 56 of the third calculation unit 55 as the image data of the X1 pixel.

On the other hand, when the image data of the C pixel and the D pixel are read from the third storage area AR3 and the fourth storage area AR4 of the frame memory 1, respectively, the image data of the C pixel and the D pixel are read. Are supplied to the selector 51 of the second arithmetic unit 50. Above selector 5
1 supplies the image data of the C pixel to the adder 54 and the subtractor 52. Further, the image data of the D pixel is supplied to the subtractor 52.

The subtractor 52 subtracts the image data of C pixel from the image data of D pixel (D-C), and supplies this to the multiplier 53. The multiplier 53 is supplied with the horizontal coefficient (KH) via the input terminal 43. The multiplier 53 multiplies the subtracted data from the subtractor 52 by the horizontal coefficient (KH) (KH).
(D-C)), and supplies this to the adder 54. The adder 54 adds the multiplication data from the multiplier 53 to the C pixel image data from the selector 51 (C
+ KH (D−C) (second equation), which is supplied to the selector 56 of the third calculation unit 55 as the image data of the X2 pixel.

The selector 56 of the third arithmetic unit 55 is
The image data of the X1 pixel is added to the adder 57 and the subtractor 58.
Supply to. Further, the image data of the X2 pixels is supplied to the subtractor 58.

The subtracter 58 subtracts the image data of the X1 pixel from the image data of the X2 pixel (X2-X
1), and supplies this to the multiplier 59. The vertical coefficient (KV) is supplied to the multiplier 59 via the input terminal 54. The multiplier 59 multiplies the subtracted data from the subtractor 58 by the vertical coefficient (KV) (KV (X2-X1)) and supplies it to the adder 57. The adder 57 uses the X from the selector 56.
The multiplication data from the multiplier 59 is added to the image data of one pixel (X1 + KV (X2-X1) ...
Equation), which is output via the output terminal 60 as image data of Z pixels according to the enlargement processing or the reduction processing.

The image data thus formed by the arithmetic processing is supplied to the color adjusting circuit 5 as 24-bit image data, for example.

The color adjustment circuit 5 is composed of, for example, a matrix calculation section and a color palette section composed of SRAM. The image data from the calculation circuit 4 is subjected to color tone conversion processing, and this is subjected to the color tone conversion processing. 2 to the bus selector 7.

The second bus selector 7 is switched and controlled by the CPU 8 according to the device selected by the user. Therefore, for example, when the user selects the monitor device 15 as the output destination of the image data subjected to the enlargement processing or the reduction processing, the CPU 8 causes the CPU 8 to supply the image data to the second device. The bus selector 7 is controlled to be switched. As a result, the still image that has been enlarged or reduced can be displayed on the monitor device 15.

Alternatively, when the user selects the storage unit 18 as the output destination of the image data that has been subjected to the enlargement processing or the reduction processing, the CPU 8 causes the storage unit 18 to be supplied with the image data. The bus selector 7 of No. 2 is switched and controlled. This allows the storage unit 18 to record image data corresponding to the still image that has been subjected to the enlargement process or the reduction process.

Alternatively, when the user selects the printer unit 16 as the output destination of the image data that has been subjected to the enlargement process or the reduction process, the CPU 8 causes the image data to be supplied to the printer unit 16. The bus selector 7 of No. 2 is switched and controlled. As a result, the printer unit 16 can print the still image that has been enlarged or reduced on the print paper 16c.

As described above, in the still picture recording / reproducing system, the storage area of the single frame memory 1 is divided into four storage areas AR1 to AR4, and writing is performed so that adjacent pixels are stored in different storage areas. Control. Then, four pixels adjacent to the pixel to be formed according to the enlargement ratio or the reduction ratio are read out from each of the storage areas AR1 to AR4, and the read four pixels and the address increment by the enlargement ratio or the reduction ratio. Pixels corresponding to the enlargement ratio or the reduction ratio are formed based on the value or the reduction value.

That is, since the enlargement processing or the reduction processing is performed based on the image data read from the frame memory 1, the original image is stored in the frame memory 1. Therefore, when the display of the original still image is designated, the original still image can be displayed immediately.

Further, since the image data stored in each of the storage areas AR1 to AR4 of the frame memory 1 is read out simultaneously from each of the storage areas AR1 to AR4 and the image processing is performed, a single data is stored. Although an inexpensive memory called DRAM is used, it is possible to perform real-time processing at a video rate.

Since an inexpensive DRAM can be used, the cost of the still picture recording / reproducing system can be reduced.

The storage area of the frame memory 1 is divided into four areas, which is, for example, 9 areas.
You may make it divide | segment into arbitrary numbers like division | segmentation and 16 division | segmentation. In this case, it is possible to perform image processing at a higher speed than when the above-described four divisions are performed.
Interpolation accuracy can be improved by point interpolation or 16-point interpolation.

Next, the rotation processing for rotating and displaying the still image displayed on the monitor device 15 by a predetermined amount will be described.

In this case, the user operates the operation unit 13 as described above to display the still image captured from the scanner unit 10, the video input unit 11 or the storage unit 18 on the monitor device 15. Then, the rotation designation key provided on the operation unit 13 is turned on. CPU above
8 detects the number of times the rotation designation key is turned on, and displays a display image 9 every time the rotation designation key is turned on.
The image data stored in the frame memory 1 is rewritten or read out so as to be rotated and displayed in the order of 0 degree, 180 degrees, 270 degrees, and 360 degrees.

That is, the image processing block 12 is
As shown in FIG. 10, first and second registers 65 for temporarily storing the image data read from the frame memory 1,
It has 66. When the CPU 8 detects that the rotation designation key has been turned on once, first, the CPU 8 of FIG.
As shown in (a), rewriting control is performed such that the image data stored in the frame memory 1 is replaced with the diagonal line T as a boundary. The rewriting control with the diagonal line T as a boundary is performed based on the flowchart of FIG.

In FIG. 12, assuming that the frame memory 1 has a storage area of N pixels × N pixels,
When performing rewrite control with the diagonal line T as a boundary, the CPU 8 first sets 1 in the row address counter in step S1, and proceeds to step S2. In the step S2, the CPU 8 sets the column address counter to N and proceeds to step S3. In the step S3, the CPU 8 reads the image data from the frame memory 1 shown in FIG. 10 based on the set row address and column address, writes the image data in the first register 65, and controls it to proceed to step S4. .

In step S4, the CPU 8
The set row address and column address are exchanged, and the process proceeds to step S5. In the step S5, the image data is read from the frame memory 1 shown in FIG. 10 based on the exchanged row address and column address, and the image data is controlled to be written in the second register 66, and the process proceeds to step S6.

In step S6, the CPU 8
The image data written in the first register 65 is controlled to be written in the frame memory 1 and the process proceeds to step S7. In step S7, the CPU 8 exchanges the row address and the column address again (returns to the original), and proceeds to step S8.

In step S8, the CPU 8
The image data written in the second register 66 is controlled to be written in the frame memory 1 and the process proceeds to step S9. In the step S9, the CPU 8 decrements the column address and proceeds to step S10.

In step S10, the CPU 8
However, it is determined whether or not the value of the column address has become larger than the value of the row address. If YES, the process returns to step S3 to repeat the above routine, and if NO, the process proceeds to step S11.

In step S11, the CPU 8
However, the row address is incremented and step S12
Proceed to.

In step S12, it is determined whether or not the row address is smaller than N. If YES, the process returns to step S2 and the above routine is repeated. If NO, the diagonal line T is left as it is. The image data replacement routine ends.

When such a replacement operation is performed, FIG.
As shown in, the image data stored in the frame memory 1 is rewritten with the diagonal line T as a boundary. Therefore, the still image as shown in FIG. 11A becomes a still image rotated by 270 degrees as shown in FIG. 11B.

Next, the CPU 8 reads out image data from the direction opposite to the normal reading direction as shown in FIG. 11B after rewriting with the diagonal line T as the boundary. As described above, the frame memory 1 is read out and controlled, and the frame memory 1 is rewritten so that the image data is rewritten in the reverse reading order. As a result, the frame memory 1 shown in FIG.
As shown in (c), the image data rotated by 90 degrees with respect to the original still image shown in (a) of FIG. Then, the CPU 8 reads this image data and supplies it to the monitor device 15.

As a result, a still image rotated by 90 degrees can be displayed on the monitor device 15.

Next, when the CPU 8 detects that the rotation designating key has been turned on twice, the CPU 8 of FIG.
The above-mentioned rewriting control with the diagonal line T as a boundary is performed on the still image shown in FIG. As a result, the still image stored in the frame memory 1 as shown in FIG. 11C is rewritten with the diagonal line T as a boundary, and thus the still image shown in FIG. 1 for image
It becomes a still image rotated by 80 degrees. Therefore, the still image rotated by 180 degrees can be displayed on the monitor device 15.

Next, when the CPU 8 detects that the rotation designation key has been turned on three times, the CPU 8 of FIG.
The above-mentioned rewriting control is performed on the still image shown in FIG. As a result, the frame memory 1
In this case, a still image rotated by 90 degrees with respect to the original still image as shown in FIG. After performing such rewriting control, the CPU 8 controls the reading of the frame memory 1 so as to read the image data from the reading direction opposite to the normal reading direction, and in the order of performing the reverse reading. The frame memory 1 is rewritten and controlled so that the image data is rewritten. As a result, in the frame memory 1,
As shown in FIG. 11 (f), image data rotated by 270 degrees with respect to the original still image shown in FIG. 11 (a) will be stored. Then, the CPU 8 reads this image data and supplies it to the monitor device 15.

As a result, the monitor device 15 is provided with 270
It is possible to display a still image that is rotated once.

Next, when the CPU 8 detects that the rotation designating key has been turned on four times, FIG.
The above-mentioned rewriting control is performed on the still image shown in FIG. As a result, the frame memory 1
The image data stored in is returned to the original state as shown in FIG. 11 (g) (which means that the image data has been rotated 360 degrees).
The CPU 8 reads out the image data and supplies it to the monitor device 15.

As a result, the monitor device 15 has 360
It is possible to display a still image that has been rotated once, that is, the original still image.

Here, in the still image recording / reproducing system, when this rotation processing is performed, the above-mentioned rewriting control is performed in the four storage areas AR1 to AR of the frame memory 1.
We went to each 4 individually and at once.

Specifically, the image data in the storage area AR1 is rewritten in the storage area AR1 such that the logical address 02 and the logical address 20 are rewritten. Similarly, the rewriting of the image data in the storage area AR4 can be performed by, for example, the logical address 13 and the logical address 31
And is rewritten in the storage area AR4. On the other hand, for example, as shown in FIG. 3B, the image data of the logical address 03 is stored in the storage area AR2, and the image data of the logical address 30 is stored in the storage area AR2.
It is stored in 3. Therefore, the image data in the storage area AR2 is rewritten with the image data in the storage area AR3.

Therefore, the input buses and output buses of the registers provided in the storage areas AR1 and AR4 are the same storage area AR1 and storage area A, respectively.
Connected to R4. On the other hand, the storage area AR2
The input bus and the output bus of the register provided in the storage area AR3 are connected to the memory bus of the other party.

With such a configuration, it is possible to rewrite four pieces of image data at one time, and an inexpensive DR
Despite using AM, high-speed rotation processing can be performed.

Next, the dissolve processing for converting the display of a still image displayed on the monitor device 15 into a desired still image will be described.

In this case, the user operates the operation unit 13 as described above to specify the dissolve process. After designating the dissolve process, a plurality of still images are captured from the scanner unit 10, the video input unit 11, or the storage unit 18.

When the dissolve process is designated, the CPU 8 detects it and is fetched from the scanner unit 10, the video input unit 11 or the storage unit 18.
For example, the frame memory 1 is write-controlled so that four still images are stored in the respective storage areas AR1 to AR4 of the frame memory 1 as shown in FIG.

In such a state, the storage area A
When displaying the still image stored in R1 on the monitor device 15, the user operates the operation unit 13 to make this designation. The still image data stored in each of the storage areas AR1 to AR4 is 1/4 of the case where one still image data is stored in each of the storage areas AR1 to AR4. Therefore, the CPU 8 has the storage area AR1.
When the display of the still image stored in is specified, the vertical delta address which is the logical address at the time of reading is set to 0.
Set the horizontal delta address to 02.00 and the vertical start address to 00.00.
Is set, the horizontal start address is set to 00.00, and still image data is read. As a result, the still image data stored in the storage area AR1 is read out and supplied to the arithmetic circuit 4.

The arithmetic circuit 4 performs a fourfold enlargement process on the still image data based on the delta address (enlargement by the delta address: vertical × horizontal = 2 × 2) and supplies it to the monitor device 15. . As a result, a still image corresponding to the still image data stored in the storage area AR1 is displayed on the monitor device 15 in the size of the normal display.

Next, when the user performs the dissolve process from the still image stored in the storage area AR1 to the still image stored in the storage area AR2, the user operates the operation unit 13 to execute the dissolve process. specify. As a result, the CPU 8 sets the vertical delta address to 02.00, the horizontal delta address to 02.00, and the vertical start address to 00 in order to perform the above-described enlargement processing of the display image. Set to 0.00 and change the horizontal start address from 00.01 to 00.99. As a result, the still image data is read from each of the storage area AR1 and the storage area AR2 and supplied to the arithmetic circuit 4.

The arithmetic circuit 4 operates from 00.01 to 0.
Interpolation processing is performed on each still image data based on the address that is changed to 0.99, and this is supplied to the monitor device 15. As a result, the still image displayed on the monitor device 15 is dissolved from the still image stored in the storage area AR1 to the still image stored in the storage area AR2.

Next, when the user displays the still image stored in the storage area AR2 on the monitor device 15,
This designation is made by operating the operation unit 13. CPU above
When the display of the still image stored in the storage area AR2 is designated, 8 sets the vertical start address to 00.00, the horizontal start address to 01.00, and the vertical delta address. To 02.00,
The horizontal delta address is set to 02.00 and the still image data is read. As a result, the still image stored in the storage area AR2 as described above is displayed on the monitor device 15.

Next, when the user performs the dissolve process from the still image stored in the storage area AR2 to the still image stored in the storage area AR4, the user operates the operation unit 13 to execute the dissolve process. specify. As a result, the CPU 8 sets the vertical delta address to 02.00, the horizontal delta address to 02.00, the horizontal start address to 01.01, and the vertical start address to 00. Variable from 0.01 to 99.
As a result, the still image displayed on the monitor device 15 is dissolved from the still image stored in the storage area AR2 to the still image stored in the storage area AR4 as described above.

Next, when the user displays the still image stored in the storage area AR4 on the monitor device 15,
This designation is made by operating the operation unit 13. CPU above
When the display of the still image stored in the storage area AR4 is designated, 8 sets the vertical start address to 01.00, the horizontal start address to 01.00, and the vertical delta address. To 02.00,
The horizontal delta address is set to 02.00 and the still image data is read. As a result, the storage area AR
The still image stored in No. 4 is displayed on the monitor device 15.

Next, when the user performs the dissolve process from the still image stored in the storage area AR4 to the still image stored in the storage area AR1, the user operates the operation unit 13 to execute the dissolve process. specify. As a result, the CPU 8 sets the vertical delta address to 02.00, sets the horizontal delta address to 02.00, and changes the vertical start address from 00.99 to 01. Is varied from 00.99 to 01. As a result, the still image displayed on the monitor device 15 is dissolved from the still image stored in the storage area AR4 to the still image stored in the storage area AR1.

Next, when the user displays the still image stored in the storage area AR1 on the monitor device 15,
This designation is made by operating the operation unit 13. CPU above
When the display of the still image stored in the storage area AR1 is designated, 8 sets the vertical start address to 00.00, the horizontal start address to 00.00, and the vertical delta address. To 02.00,
The horizontal delta address is set to 02.00 and the still image data is read. As a result, the storage area AR
The still image stored in No. 1 is displayed on the monitor device 15.

The still image recording / reproducing system can enable the dissolve process under the control of the CPU 8. Note that so-called fade-in and fade-out are one type of this dissolve process. For example, if a white image is dissolved into any of the images stored in the storage areas AR1 to AR4, it becomes a fade-in, and the storage areas AR1 to AR1. If any of the images stored in AR4 is dissolved into a white image, fade-out occurs.

Next, there is a case where it is desired to display the original image from the images displayed on the monitor device 15 after being subjected to such enlargement processing, reduction processing, rotation processing, and dissolve processing. The still image recording / reproducing system calls the operation of displaying such an original image as FIT processing, and the operation up to the FIT processing is as shown in the flowchart of FIG.

That is, the flow chart shown in FIG. 15 starts when the scanner unit 10 captures a desired image, and proceeds to step S21.

As described above, in the scanner section 10,
Images can be read from various originals such as negative films and photographs, but the image data size also differs depending on the type of original to be read. Therefore, when the image data of the same position and the same range in the frame memory 1 is displayed, the displayed range is different depending on the read document, and a certain part is enlarged and displayed or the whole is reduced and displayed. It causes inconvenience such as

Therefore, when the image data is input, the CPU 8 calculates the optimum image data size and position according to the image data size of the input image data.

At step S21, the CPU 8
Determines whether or not the image data size of the input image data needs to be changed. If NO (if the size change is not required), the process proceeds to step S22 and YES.
In the case of, the process proceeds to step S27 and the size changing process is performed so as to obtain the optimum image data size, and the routine shown in FIG.

In step S22, the CPU 8
Determines whether the position of the input image data needs to be changed. If NO, the process proceeds to step S23, and if YES, the process proceeds to step S28 to change the position of the input image data. Then, a moving process is performed to end this routine.

In step S23, the CPU 8
Determines whether or not to store the size and position of the input image data as setting value data for reading the original image data. If NO, the process proceeds to step S24, and if YES, step S29. Then, the process proceeds to step S30 to store the set value data in the set value memory 30c shown in FIG.

In this case, as the set value data stored in the set value memory 30c, set value data is read so that only the original image data is read out without reading the extra data.

At step S24, the CPU 8
Determines whether to call the size and position of the image data. If NO, the process proceeds to step S25 and YES.
In the case of, the process proceeds to step S30, the size and position of the image data is called, and this routine ends.

In step S25, the CPU 8
Is the FIT key 13a provided on the operation unit 13
Is determined, and if NO, step S
26, and if YES, the process proceeds to step S31.

At step S26, the CPU 8
Discriminates whether or not the image frame changing process is designated, and NO
In the case of, this routine is finished as it is, and in the case of YES, the routine proceeds to step S32, where the frame changing process is performed and the routine is finished.

On the other hand, the FIT processing of step S31 is performed based on the flowchart shown in FIG.

That is, when the CPU 8 detects in step S25 that the FIT key 13a has been operated, it proceeds to step S41 shown in FIG.
The set value data stored in the set value memory 30c is read out and the process proceeds to step S42.

In step S42, the CPU 8
However, the set value data read from the set value memory 30c is converted into a ROM table address for reading the original image data, and the process proceeds to step S43.

In step S43, the CPU 8
However, a start address and a delta address for reading the original image data stored in the frame memory 1 are formed based on the ROM table address converted based on the setting value data, and the process proceeds to step S44.

At step S44, the CPU 8
Sets the start address and delta address in the memory controller 2 and proceeds to step S45.

In step S45, the memory controller 2 reads the original image data stored in the frame memory 1 based on the start address and delta address, and ends the routine shown in FIG.

As a result, the original image data read from the frame memory 1 becomes the superimposing circuits 30b and D.
It is supplied to the monitor device 15 via the / A converter 14 and displayed.

Since the still image recording / reproducing system forms the set value data based on the image data size of the input image data, the still image recording / reproducing system outputs the image data size regardless of the input image data size. It can be stored in the frame memory 1 as image data having an optimum data size according to the external device. Therefore, it is possible to omit the troublesome work of processing the data size of the image data input by the user side so as to match the data size of the external device for output, without worrying about the data size. It is possible to continuously input image data from different input external devices.

Since the image data read from the frame memory 1 is subjected to image processing and output, the original image data is stored in the frame memory 1 as it is even if the image processing is performed. ing. Therefore, when the FIT key 13a is operated, image processing is performed by reading the image data stored in the frame memory 1 based on the set value data of the original image data according to the external device. After that, the original image can be displayed immediately if necessary.

Further, as described above, since the set value data for reading only the original image data is used as the set value data, the monitor device 15 is provided with a border (black and white screen) above and below or to the left and right of the image. , Etc.) can be displayed.

As the setting value data, setting value data for reading all the image data stored in the frame memory 1 may be formed. In this case, borders may be displayed above and below or on the left and right of the display image, but there is an advantage that all image data can be confirmed.

Next, a reference image is selected from the images subjected to the image processing, and the image data of the reference image (image data subjected to the reference image processing) is output when necessary. You may want to display it.

For such a case, in the still image recording / reproducing system, the operation section 13 is provided with a processed image storage designating key for designating storage of image-processed image data. Separately, a processed image memory for storing image data subjected to image processing is provided.

In this case, the user selects a desired image from the images which have been subjected to the image processing and displayed on the monitor device 15, and operate the processed image storage designation key.

When the processed image storage designation key is operated, the CPU 8 detects it and controls the writing of the processed image memory so as to temporarily store the image data subjected to the image processing at the present time. In addition, the CPU 8 reads the image data stored in the processed image memory based on the data size of the image-processed image data and the data size of an external device that supplies the image data. The set value data is formed, and the set value memory 30c is write-controlled to store the set value data.

In such a state, the CPU 8
Detects the operation of the FIT key 13a and reads out the set value data from the set value memory 3
0c is read and controlled. Then, based on the read set value data, the processing image memory is read out and controlled so that the image data that has been subjected to the image processing stored in the processing image memory is read and output as original image data. . The image data read from the processed image memory is supplied to the monitor device 15 via the superimposing circuit 30b and the D / A converter 14.

As a result, the image-processed image data serving as the reference selected by the user can be immediately displayed as needed.

In this case, when the reference image is selected, the image data stored in the frame memory 1 is rewritten so as to become the reference image, and the set value is changed from the frame memory 1. You may make it display the original image by reading the image data according to data. As a result, the processing image memory can be omitted, and the cost of the system can be reduced by reducing the number of parts and simplifying the configuration.

[0209]

Since the image processing apparatus according to the present invention forms the set value data for reading the original image data on the basis of the image data size of the input image data, it is inputted. Regardless of the data size of the image data, the data size of the input image data can be stored in the storage means as the image data of the optimum data size according to the output external device.

Therefore, it is possible to omit a troublesome work such as data processing in which the data size of the image data input by the user side is matched with the data size of the external device for output, and the data size is taken into consideration. It is possible to continuously input image data from different input external devices without the need.

Further, since the image data read from the storage means is subjected to image processing and output, the original image data is left as it is in the storage means even if the image processing is performed. be able to. Therefore, when the original image output designating means is operated, by reading the image data stored in the storage means based on the setting value data of the original image data according to the external device,
Even after performing image processing, the original image can be displayed immediately if necessary.

By using the set value data such that only the original image data is read as the set value data, for example, a monitor device or the like which is one of the external devices can display a border (black screen) on the upper and lower sides or the left and right sides of the image. , Etc.) can be displayed.

Alternatively, by using, as the set value data, set value data for reading all the image data stored in the storage means, borders may be displayed above and below or left and right of the display image. All the images can be displayed, and the confirmation of all the images can be facilitated.

Further, the image data of the processed image selected from the image-processed images is stored in the processed image storage means, and the set value data corresponding to the selected processed image is formed to store the processed image. When the designation means is operated, the image data of the selected processed image stored in the processed image storage means is read out based on the set value data, so that the user selected as necessary. Image data of the processed image can be output. Therefore, for example, the selected processed image can be immediately displayed on the monitor device.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment in which an image processing apparatus according to the present invention is applied to a still image recording / reproducing system.

FIG. 2 is a block diagram of an image processing block provided in the still image recording / reproducing system.

FIG. 3 is a schematic diagram for explaining a logical address and a physical address of a frame memory provided in the still image recording / reproducing system.

FIG. 4 is a diagram showing increment and decrement values of a logical address according to enlargement processing and reduction processing of a still image.

FIG. 5 is a block diagram of an address generation circuit provided in the image processing block.

FIG. 6 is a time chart for explaining address data for each storage area, which is generated by the address generating circuit.

FIG. 7 is a diagram showing a format of the address data.

FIG. 8 is a diagram for explaining a calculation operation during an enlargement process and a reduction process of an arithmetic circuit provided in the image processing block.

FIG. 9 is a block diagram of the arithmetic circuit.

FIG. 10 is a schematic block diagram of a part of the still image recording / reproducing system for explaining the operation at the time of rotation processing.

FIG. 11 is a schematic diagram for explaining a frame memory rewriting operation during rotation processing.

FIG. 12 is a flowchart illustrating a rewriting operation of a frame memory during rotation processing.

FIG. 13 is a schematic diagram for explaining a rewriting operation of a frame memory during rotation processing.

FIG. 14 is a diagram showing still images captured in respective storage areas of a frame memory when performing a dissolve process.

FIG. 15 is a block diagram for explaining the operation of the still image recording / reproducing system up to the FIT process.

FIG. 16 is a block diagram for explaining the operation of the still image recording / reproducing system during FIT processing.

FIG. 17 is a diagram showing an image frame displayed on a monitor device when a printer unit is designated as an external device for outputting image data.

FIG. 18 is a diagram showing an image frame displayed on a monitor device when a storage unit is designated as an external device for outputting image data.

[Explanation of symbols]

 1 frame memory 2 memory controller 3 address generation circuit 4 arithmetic circuit 5 color adjustment circuit 6 first bus selector 7 second bus selector 8 CPU 10 scanner unit 11 video input unit 12 image processing block 13 operation unit 13a FIT key 15 monitor Device 16 Printer unit 17 Interface block 18 Storage unit 30a Frame generation circuit 30b Superposition circuit 30c Set value memory 31 Start address register 32 Delta address register 33 Integer addition unit 34,35 Adder 36,37 Initialization selector 39,40 Flip-flop 45th Operation unit 1 46, 51, 56 Selector 47, 52, 58 Subtractor 48, 54, 57 Adder 49, 53, 59 Multiplier 65, 66 First and second registers

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H04N 5/262

Claims (5)

[Claims] 1. An image processing apparatus for temporarily storing image data supplied from the outside in a storage means, reading image data at a designated position from the storage means, performing predetermined image processing, and outputting the image data. Based on the original image output designating means for designating the output of the original image data before being subjected to the image processing, and the data size of the image data supplied from the outside, it is stored in the storage means. When setting value data for reading the original image data is formed and the output of the original image data is designated by the original image output designating means, it is stored in the storage means based on the setting value data. An image processing apparatus having a control unit that controls reading of the storage unit so as to read and output the original image data. 2. A processing image storage designating unit for designating storage of the image-processed image data, and a processing image storage unit for storing the image-processed image data, wherein the control unit has the processing unit. When the storage of the image-processed image data is designated by the image storage designating means, the processing image storage means is write-controlled so as to temporarily store the image-processed image data, and the image-processed image data is also stored. Based on the data size of, the setting value data for reading the image data stored in the processed image storage means is formed, and the output of the original image data is designated by the original image output designating means, Based on the set value data, the image data that has been subjected to the image processing stored in the processed image storage means is read out as original image data. The image processing apparatus according to claim 1, wherein the control reads the processed image storage means so as to force. 3. A plurality of connection means connectable to a plurality of external devices to which the image data read out from the storage means or the processed image storage means are supplied, and the image from the plurality of external devices. An external device selecting unit for selecting an external device supplying data, wherein the control unit has a data size of the image data supplied from the outside or a data size of the image processed image data; When the setting value data is formed based on the data size of the external device selected by the external device selection means, and the output of the original image data is specified by the original image output specifying device, the selected external device is displayed. Based on the corresponding set value data, the storage means or the storage means is arranged to read and output the original image data stored in the storage means or the processed image storage means. The image processing apparatus according to claim 1 or claim 2, wherein the control reads the processed image storage means. 4. The image processing apparatus according to claim 1, wherein the control means forms setting value data for reading only the original image data. 5. The image processing apparatus according to claim 1, wherein the control means forms setting value data for reading all the original image data.