JPH0851556A - Horizontal afc circuit - Google Patents

Abstract

PURPOSE:To obtain the horizontal AFC circuit operated stably in which only a phase of a horizontal output pulse is changed but its duty is unchanged with respect to a change in a phase control voltage and its horizontal output pulse does not receive the effect of a triangle wave caused in the phase control voltage. CONSTITUTION:A frequency control loop being a 1st loop is not different from the configuration of a conventional circuit. A sample-and-hold circuit 8 sampling and holding a phase control voltage with a reference pulse D from a count-down circuit 4a is provided between a 2nd phase detector 5 and a phase shift circuit 6 in a phase controlled loop being a 2nd loop. Thus, the horizontal AFC circuit is realized, in which only a phase of a horizontal output pulse (blanking pulse) is changed with respect to a change in a phase control voltage by excluding the effect of a triangle wave for a phase detection period of the phase control voltage and the duty is not changed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal AFC circuit,
In particular, it relates to a horizontal AFC circuit that obtains a horizontal output pulse (retrace pulse) synchronized with a horizontal synchronizing signal by using two control loops, a frequency control loop and a phase control loop.

[0002]

2. Description of the Related Art A composite sync signal amplitude-separated from a composite video signal includes a horizontal sync signal and a vertical sync signal. The frequency of the horizontal sync signal is high at 15.75 kHz, and the frequency of the vertical sync signal is low at 60 kHz. Therefore, the horizontal sync signal is separated by processing the composite sync signal in a differentiating circuit, and the vertical sync signal is processed by processing the composite sync signal in an integrating circuit. Even if pulse noise with many high frequency components is mixed in the composite synchronizing signal, the vertical synchronizing signal separated by the integrating circuit is not affected. However, if pulsed noise with many high-frequency components is mixed in the composite synchronizing signal, the effect of the horizontal synchronizing signal separated by the differentiating circuit appears as it is. Therefore, the horizontal synchronous deflection circuit
A horizontal AFC circuit using an automatic frequency control (AFC) method is used.

The horizontal AFC circuit compares the phases of the separated horizontal synchronizing signal and the horizontal output (retrace pulse) from the horizontal output stage, generates a control voltage proportional to the phase difference between the two, and thereby oscillates horizontally. It is a circuit that obtains a horizontal output synchronized with the horizontal synchronizing signal by controlling the circuit. This allows the horizontal oscillation frequency and phase to match the horizontal oscillation frequency and phase of the broadcasting station.

By the way, an integrated circuit for a color television receiver includes a horizontal AFC circuit having two control loops. In this horizontal AFC circuit, a frequency control loop that generates a pulse that is synchronized with an input horizontal synchronization signal, and a phase control loop that synchronizes the phase of the horizontal output (retrace pulse) with the phase of the output from the frequency control loop. Is equipped with.

FIG. 3 is a block diagram of a conventional horizontal AFC circuit having two control loops.

In FIG. 3, a horizontal synchronizing signal is input to the input terminal 1, and the horizontal synchronizing signal is supplied to one input end of the first phase detector 2. A reference pulse A from a countdown circuit 4 that divides the oscillation frequency to generate a reference pulse is supplied to the other input end of the first phase detector 2. The first phase detector 2 compares the phase of the reference pulse A from the countdown circuit 4 with the input horizontal synchronizing signal, and outputs a frequency control voltage proportional to the phase difference between the two as a result of the comparison. This frequency control voltage is supplied to the horizontal oscillator 3. Horizontal oscillator 3
Oscillates a signal having a frequency n times the horizontal synchronizing frequency (n is an integer), and the oscillation frequency can be controlled by the frequency control voltage from the phase detector 2. The oscillation signal from the horizontal oscillator 3 is set to 1 by the countdown circuit 4.
The frequency is divided into / n and is supplied to the first phase detector 2 as the reference pulse A. The first phase detector 2, the horizontal oscillator 3, and the countdown circuit 4 form a frequency control loop.

The reference pulse B from the countdown circuit 4 which is synchronously controlled by the frequency control loop is supplied to one input terminal of the second phase detector 5 and the other of the second phase detector 5 is supplied. The retrace pulse from the horizontal output circuit 7 is supplied to the input terminal. Second phase detector 5
Outputs a phase control voltage proportional to the phase difference between the reference pulse B from the countdown circuit 4 and the blanking pulse from the horizontal output circuit 7 as a result of the comparison. This phase control voltage is supplied to the phase shift circuit 6. The phase shift circuit 6 slices a sawtooth wave created based on the reference pulse C from the countdown circuit 4 with the phase control voltage and outputs a horizontal drive pulse to the horizontal output circuit 7. The horizontal output circuit 7 responds to the horizontal drive pulse from the phase shift circuit 6,
While supplying a horizontal deflection current to the horizontal deflection coil, it outputs a horizontal output pulse (retrace pulse). The second phase detector 5, the phase shift circuit 6, and the horizontal output circuit 7 form a phase control loop.

FIG. 4 is a timing chart showing the operation of the phase control loop in FIG.

In FIG. 4, (a) is a horizontal synchronizing signal input to the input terminal 1, (b) is a retrace pulse from the horizontal output circuit 7, (c) is a reference pulse B from the countdown circuit 4, ( d) is a phase control voltage output from the second phase detector 5, (e) is a reference pulse C from the countdown circuit 4, and (f) is generated in the phase shift circuit 6 based on the reference pulse C. Sawtooth wave, (g) is the phase control voltage of (d)
The operation of the phase shift circuit 6 for slicing the sawtooth wave of (f) is shown. The phase control voltage has a high level (phase control voltage −1) and a low level (phase control voltage −
2) shows a slice operation in each case,
(h) and (i) are horizontal drive pulse-1 and horizontal drive pulse-2 output from the phase shift circuit 6 in response to the phase control voltage-1 and the phase control voltage-2 of (g).
The respective phases and duties of the above are shown.

In the phase control loop in the above-mentioned conventional horizontal AFC circuit, as shown in FIG. 4 (g), the phase control voltage obtained as a result of the phase detection with the reference pulse B and the retrace pulse is used for sawtooth. Although the horizontal drive pulse is obtained by slicing the rectangular wave, the phase control voltage produces a triangular wave during the phase detection period. Therefore, if the sawtooth wave is sliced by the voltage of this triangular wave period, that is, the phase detection period, the duty changes together with the phase of the horizontal drive pulse, and the normal duty (normal operation period and blanking period There was a problem that the return pulse could not be obtained.

[0011]

As described above, the conventional 2
In a phase control loop in a horizontal AFC circuit equipped with two control loops, when a sawtooth wave is sliced with a phase control voltage to obtain a horizontal drive pulse, the phase control voltage changes due to the influence of a triangular wave generated in the phase detection period. if you did this,
There is a problem in that the duty changes with the phase of the horizontal drive pulse, and as a result, the duty of the horizontal output pulse (retrace pulse) also changes.

Therefore, in view of such a problem, the present invention has
It is an object of the present invention to provide a horizontal AFC circuit in which the horizontal output pulse is not affected by the triangular wave generated in the phase detection period and the duty of the horizontal output pulse does not change.

[0013]

According to the first aspect of the present invention,
A means for generating a horizontal synchronizing signal, a first phase detector having one input of the horizontal synchronizing signal, and an oscillator whose oscillation frequency is controlled by the phase detection output thereof are provided, and are synchronized with the horizontal synchronizing signal. A frequency control loop that generates a pulse and a pulse from this frequency control loop as one input and a retrace pulse as the other input, and both inputs are phase-detected,
A second phase detector that generates a first voltage level when the level of the retrace pulse is in the first state, and a second voltage level when the level of the retrace pulse is in the second state; , The input from the output from the second phase detector is used to filter an unnecessary voltage component of the first or second voltage level, and the voltage level is maintained at a voltage level during the period in which the retrace pulse is not generated. A sample hold circuit, a phase shift circuit that shifts the phase of the horizontal drive pulse according to the output of the sample hold circuit, and a horizontal deflection current is supplied to the horizontal deflection coil in response to the horizontal drive pulse. A horizontal output circuit for generating the retrace pulse having a repetitive scan period and a retrace period, the phase for maintaining the retrace pulse in synchronization with the output from the frequency control loop. It is characterized in that; and a control loop.

According to a second aspect of the present invention, there is provided a means for generating a horizontal synchronizing signal, and the horizontal synchronizing signal as one input.
The reference pulse of is used as the other input, and both inputs are phase-detected,
A first phase detector that outputs a control voltage according to a phase difference, an oscillator that oscillates a signal having a frequency that is an integral multiple of the horizontal synchronization signal, and the oscillation frequency is controlled by the control voltage; And a countdown circuit for generating first, second, third, and fourth reference pulses of the same frequency as the horizontal synchronizing signal by dividing the oscillation signal of When the frequency control loop to be generated and the second reference pulse of the countdown circuit are one input and the retrace pulse is the other input, both inputs are phase-detected, and the level of the retrace pulse is in the first state A second phase detector that produces a first voltage level and produces a second voltage level when the level of the blanking pulse is in the second state, and the output of the second phase detector as input , The first or second battery A sample and hold circuit that filters an unnecessary voltage component of the level using the third reference pulse from the countdown circuit and holds the voltage level in a period in which the retrace pulse is not generated, and the sample and hold circuit. In response to the horizontal drive pulse, a phase shift circuit that slices a sawtooth wave based on the fourth reference pulse from the countdown circuit and shifts the phase of the horizontal drive pulse according to the output of
A horizontal output circuit for supplying a horizontal deflection current to the horizontal deflection coil, and generating the retrace pulse having a repeating scanning period and a retrace period, wherein the retrace pulse is output from the frequency control loop. And a phase control loop for maintaining a synchronized state.

[0015]

In the present invention, the frequency control loop which is the first loop is the same as the conventional one. In the phase control loop which is the second loop, a sample hold circuit is provided between the second phase detector and the phase shift circuit. The sample hold circuit uses the third reference pulse from the countdown circuit to perform sample hold in order to avoid the influence of the triangular wave in the phase detection period of the phase control voltage from the second phase detector. That is, the sampling period and the holding period for sampling and holding the phase control voltage are switched according to the low level and the high level of the third reference pulse. By designing the timing of the sampling period and the holding period, The sample period of the reference pulse is set to a period that can avoid a triangular wave and other influences, and the hold period is set to be held by the signal obtained in the sample period. This eliminates the influence of the triangular wave in the phase detection period of the phase control voltage, and changes the phase control voltage only in the phase of the horizontal output pulse (retrace pulse) without changing its duty. An AFC circuit can be realized.

[0016]

EXAMPLES Examples will be described with reference to the drawings. FIG. 1 is a block diagram showing a horizontal AFC circuit according to an embodiment of the present invention.

In FIG. 1, the same parts as those in FIG. A horizontal synchronizing signal is input to the input terminal 1, and the horizontal synchronizing signal is supplied to one input end of the first phase detector 2. The other input terminal of the first phase detector 2 is supplied with a reference pulse A from a countdown circuit 4a that divides the oscillation frequency to generate a reference pulse. The first phase detector 2 compares the phase of the reference pulse A from the countdown circuit 4a with the input horizontal synchronizing signal, and outputs a frequency control voltage proportional to the phase difference between the two as a comparison result. This frequency control voltage is supplied to the horizontal oscillator 3. The horizontal oscillator 3 is
It oscillates a signal having a frequency n times the horizontal synchronizing frequency (n is an integer), and its oscillation frequency can be controlled by the frequency control voltage from the phase detector 2. The oscillation signal from the horizontal oscillator 3 is 1 /
It is divided into n and supplied to the first phase detector 2 as the reference pulse A. The first phase detector 2, the horizontal oscillator 3, and the countdown circuit 4a form a frequency control loop.

The reference pulse B from the countdown circuit 4a, which is synchronously controlled by the frequency control loop, is the second pulse.
Is supplied to one input end of the phase detector 5 of
The retrace pulse from the horizontal output circuit 7 is supplied to the other input end of the phase detector 5 of. Second phase detector 5
Outputs a phase control voltage proportional to the phase difference between the reference pulse B from the countdown circuit 4a and the blanking pulse from the horizontal output circuit 7 as a result of the comparison. This phase control voltage is supplied to the sample hold circuit 8. The sample hold circuit 8 holds the phase control voltage using the reference pulse D from the countdown circuit 4a for the phase detection period and outputs it as a slice voltage. This slice voltage is supplied to the phase shift circuit 6. The phase shift circuit 6 slices a sawtooth wave created based on the reference pulse C from the countdown circuit 4a with the slice voltage to output a horizontal output circuit 7
A horizontal drive pulse is output to. In response to the horizontal drive pulse from the phase shift circuit 6, the horizontal output circuit 7 supplies a horizontal deflection current to the horizontal deflection coil and outputs a horizontal output pulse (retrace pulse). The second phase detector 5, the sample hold circuit 8, the phase shift circuit 6, and the horizontal output circuit 7 constitute a phase control loop.

In the above configuration, the frequency control loop which is the first loop is the same as the conventional configuration. Therefore, in the frequency control loop, the reference pulse B synchronized with the horizontal synchronizing signal input to the terminal 1 is output and output to the phase control loop which is the second loop. The phase control loop is
The retrace pulse from the horizontal output circuit 7 is maintained in a state of being synchronized with the reference pulse B. The difference between the present invention and the conventional example is that in this phase control loop, the second phase detector 5 and The sample hold circuit 8 is provided between the phase shift circuit 6.

The operation of the phase control loop will be described with reference to FIG. FIG. 2 shows the signal timing of each part of the phase control loop in FIG.

In FIG. 2, (a) is a horizontal synchronizing signal input to the input terminal 1, (b) is a retrace pulse from the horizontal output circuit 7, (c) is a reference pulse B from the countdown circuit 4a, ( d) is the phase control voltage output from the second phase detector 5, (e) is the reference pulse D from the countdown circuit 4a, (f) is the phase control voltage of (d) and the reference pulse D of (e). Slice voltage obtained by sample-holding using
(g) is the reference pulse C from the countdown circuit 4a,
(h) is a sawtooth wave created in the phase shift circuit 6 based on the reference pulse C, (i) is an operation of the phase shift circuit 6 that slices the sawtooth wave of (h) with the slice voltage of (d) Showing the slicing operation when the slice voltage is at a high level (slice voltage −1) and when the slice voltage is at a low level (slice voltage −2), respectively (j) and
(k) is the phase and duty of each of the horizontal drive pulse-1 and the horizontal drive pulse-2 output from the phase shift circuit 6 in response to the slice voltage-1 and the sly voltage-2 of (i). Indicates.

In the sample hold circuit 8, the reference pulse D from the countdown circuit 4a (see FIG. 2 (e)) is used to avoid the influence of the triangular wave in the phase detection period of the phase control voltage.
At this timing, the phase control voltage (see FIG. 2 (d)) is sampled and held and output as a slice voltage as shown in FIG. 2 (f). That is, the voltage (triangular wave voltage) in the phase detection period in the phase control voltage is replaced with the voltage outside the phase detection period and output as the slice voltage.
Moreover, by using the reference pulse D from the countdown circuit 4a, the timing of sampling and holding with respect to the phase control voltage can be set independently of the phase detection period of the phase control voltage. Therefore, even when the phase detection period changes, the hold period can be set so as to correspond to this period.

As described above, by adding the sample hold circuit 8, it is not necessary to be influenced by the triangular wave. Therefore, as shown in FIG. 2 (j), () due to the change of the phase control voltage (thus, the change of the slice voltage). As shown in k), the change of the horizontal drive pulse is only the phase and the duty is always constant. As a result, the change of the horizontal output pulse (retrace pulse) is only the phase and the duty is always constant.

Further, the phase change amount of the horizontal output pulse can continuously change with respect to the change of the phase control voltage, and can be set to an optimum value without fail. This is because the digital circuit needs only the countdown circuit 4a and the rest can be configured by analog circuits, and thus the phase control amount of the horizontal output pulse is determined by the analog circuits.

[0025]

As described above, according to the present invention, the influence of the triangular wave generated in the horizontal output pulse during the phase detection period can be eliminated, and the change of the horizontal output pulse is only the phase with respect to the change of the phase control voltage. can do. Therefore, it is possible to realize a horizontal AFC circuit that can obtain a stable horizontal output without changing the duty of the horizontal output pulse.

[Brief description of drawings]

FIG. 1 is a block diagram showing a horizontal AFC circuit according to an embodiment of the present invention.

FIG. 2 is a timing chart for explaining the circuit operation of FIG.

FIG. 3 is a block diagram showing a conventional horizontal AFC circuit.

FIG. 4 is a timing chart for explaining the circuit operation of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Horizontal synchronizing signal input terminal 2 ... 1st phase detector 3 ... Oscillator 4a ... Countdown circuit 5 ... 2nd phase detector 6 ... Phase shift circuit 7 ... Horizontal output circuit 8 ... Sample hold circuit

Claims (2)

[Claims] 1. A horizontal synchronization signal generating means, a first phase detector having the horizontal synchronization signal as one input, and an oscillator whose oscillation frequency is controlled by the phase detection output. A frequency control loop that generates a pulse synchronized with a synchronizing signal, and a pulse from this frequency control loop as one input and a retrace pulse as the other input, both inputs are phase-detected, and the level of the retrace pulse is A second phase detector that generates a first voltage level when in the first state and a second voltage level when the level of the retrace pulse is in the second state; and the second phase detector. Is used as an input, and an unnecessary voltage component of the first or second voltage level is filtered,
A sample-and-hold circuit that holds the voltage level during the period in which the retrace pulse is not generated, a phase shift circuit that shifts the phase of the horizontal drive pulse according to the output of the sample-and-hold circuit, and a response to the horizontal drive pulse. A horizontal output circuit for supplying the horizontal deflection current to the horizontal deflection coil and generating the retrace pulse having a repetitive scanning period and a retrace period, and the retrace pulse from the frequency control loop. A horizontal AFC circuit comprising an output and a phase control loop for maintaining a synchronous state. 2. A means for generating a horizontal synchronizing signal, said horizontal synchronizing signal being one input, said first reference pulse being the other input, both inputs being phase-detected, and a control voltage corresponding to the phase difference being output. A first phase detector that oscillates, an oscillator that oscillates a signal having a frequency that is an integer multiple of the horizontal synchronization signal, and the oscillation frequency is controlled by the control voltage, and divides the oscillation signal from this oscillator, A countdown circuit for generating first, second, third, and fourth reference pulses having the same frequency as the horizontal synchronizing signal, a frequency control loop for generating a pulse synchronized with the horizontal synchronizing signal, and the countdown The second reference pulse of the circuit is one input, the retrace pulse is the other input, both inputs are phase-detected, and a first voltage level is generated when the level of the retrace pulse is in the first state, The retrace pulse A second phase detector that generates a second voltage level when the level is in the second state, and an output of the second phase detector as an input, which is unnecessary among the first and second voltage levels. A sample and hold circuit that filters a voltage component using the third reference pulse from the countdown circuit and holds the voltage level during a period in which the retrace pulse is not generated, and a sample and hold circuit according to the output of the sample and hold circuit. A phase shift circuit for slicing the sawtooth wave based on the fourth reference pulse from the countdown circuit and shifting the phase of the horizontal drive pulse; and a horizontal deflection current to a horizontal deflection coil in response to the horizontal drive pulse. And a horizontal output circuit for generating the retrace pulse having a repetitive scan period and a retrace period, the retrace pulse being supplied to the frequency control loop. And a phase control loop for maintaining a state in synchronization with the output of the horizontal AFC circuit.