JPH0844631A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the secrecy of data by preventing the data stored in a memory from being illegally read out by writing a deciphering code in a register and further enabling a change. CONSTITUTION:The data ciphered in advance are stored in a ROM 1, and registers 8 and 9 are provided to set the deciphering code for converting those data to normal data. The deciphering code can be arbitrarily, set through an input gate 14 to these registers 8 and 9. When reading the data in the ROM 1, the logic with the deciphering code of the registers 8 and 9 is calculated by a logic circuit 16 and outputted from input/output terminals 2 and 3 through an output gate 15 which performs an operation inverted from an input gate 14. Thus, since the deciphering code is written in the registers 8 and 9, the deciphering code is not fixed into one but the deciphering code can be changed by reloading the values of the registers 8 and 9 as needed. Besides, the secrecy of data can be held for a manufacturing person as well.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device which realizes security protection of stored data.

[0002]

2. Description of the Related Art Conventionally, such a semiconductor device, in particular, a read-only memory (ROM) has an output terminal for outputting stored data to the outside, and there is no change in reading such data. It is directly output to the output terminal without being processed. In such a memory device, a third party can easily read the data in the memory.

However, in the field of so-called software such as programs, the importance of copyright protection is being claimed, but copying such as copying is performed easily and in large quantities. For this reason, confidentiality of data has become an important issue.

Under such circumstances, the conventional semiconductor device has been proposed with some security measures. As one of the security measures, there is a method of encrypting and storing data in a memory, as disclosed in Japanese Patent Laid-Open No. 59-68059.

FIG. 2 is a circuit diagram of a semiconductor device showing such a conventional example. As shown in FIG. 2, the conventional semiconductor device includes a ROM 21 for storing encrypted data and a decryption circuit 39 for decrypting the encrypted data. This device stores the encrypted data in the ROM 21, stores the encrypted data in the case where the data in the ROM 21 is output to the input / output terminals 22 and 23, and outputs the encrypted data in the internal circuit. A mechanism for outputting the normal data decrypted through the decryption circuit 39 composed of the inverters 35, 36 and the switches 37, 38 is provided. The data read operation will be described below.

First, the data 27, 28 from the ROM 21
Is made conductive by the control signal 26, and is output from the input / output terminals 22 and 23 to the outside. At this time, since the ROM 21 stores the encrypted data in advance, the encrypted data is directly output to the input / output terminals 22 and 23.

On the other hand, when outputting the data 27, 28 to the internal circuit, the control signal 34 causes the transistors 29, 28
30 is made conductive, and as described above, the inverters 35, 3
6 and a decryption circuit 39 including switches 37 and 38
The data converted to regular data is sent via.
Note that the transistors 31 and 3 that perform the switch gate function
2 is controlled by the control signal 34 via the inverter 33, and the circuit including these transistors is connected to the input / output terminal 2
When inputting data directly from 2, 23 to the internal circuit,
It is provided to secure a direct route so that it is not necessary to input encrypted data.

In the decryption circuit 39, the switch 37 is set on the output side of the inverter 35, and the switch 38 is set on the side other than the output side of the inverter 36. Therefore, the output data 27 of the ROM 21 is output to the internal circuit via the transistor 29 controlled by the control signal 34, the inverter 35, and the switch 37, and thus is inverted and output. Further, since the output data 28 is output to the internal circuit via the transistor 30 and the switch 38, it is output as it is without being inverted.

As described above, by decrypting the data output of the ROM 21 by switching the switches 37 and 38 and deciding whether to invert the data of the ROM 21 or not.

[0010]

In the conventional semiconductor device described above, the decryption of the cipher for security protection is realized by switching the switch when reading the data that is encrypted and stored. It is necessary to create a decoding code with. That is, since the decryption code is made as hardware, the decryption code can be arbitrarily set at the manufacturing stage, but after the production, the decryption code is fixed and cannot be changed. Therefore, in such a configuration, only one type of decoding code can be set, and once one decoding code is known, all the data can be read correctly.

Further, the decryption code made by such hardware has a drawback that it can be easily known by directly looking inside the semiconductor device and analyzing it.

Further, since such a semiconductor device produces a decryption code at the manufacturing stage, the user of the device must disclose the decryption code to the manufacturer of the device, which is confidential to the manufacturer. It also has the drawback of not being protected.

The object of the present invention is to improve the confidentiality of data by making it possible to change the decryption code, and the decryption code cannot be easily known even if the inside of the apparatus is analyzed. Is to provide a semiconductor device with improved confidentiality.

[0014]

According to the present invention, there is provided a semiconductor device comprising:
A memory for storing encrypted data, an input gate connected to an input / output terminal and controlled to be conductive / non-conductive by a control signal, and a code storage means for storing a decryption code from the outside via the input gate. , A logic circuit for directly or converting the data in the memory based on the decoded code set in the code storage means and outputting the data, and an operation in which the input gate is inverted and the output of the logic circuit is input to the input circuit. And an output gate for sending to an output terminal.

[0015]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a circuit diagram of a semiconductor device showing an embodiment of the present invention. As shown in FIG. 1, the semiconductor device of the present embodiment assumes a 2-bit output ROM1.
The data encrypted in advance is stored in 1. In the present embodiment, in addition to the ROM 1, the input gate 14 connected to the input / output terminals 2 and 3 and composed of the transistors 10 and 11 and the input / output terminals 2 and 3 and the transistors 4 and 5 are connected. , An inverter 12 for inverting the input gate 14 and the output gate 15 with each other, and a decoder for decoding the data of the ROM 1 from the input / output terminals 2 and 3 via the input gate 14. Decoding code setting registers 8 and 9 for storing codes
And a logic circuit 16 which is composed of EXOR gates 6 and 7 and which takes the exclusive logic of the encrypted data read from the ROM 1 and the decryption code set in the decryption code setting registers 8 and 9. The data read from the ROM 1 is checked by the logic circuit 16 and output from the input / output terminals 2 and 3 via the output gate 15.

The input gate 14 and the inverter 12 described above
The output gate 15 and the output gate 15 form a switching circuit for switching the input and output from the input / output terminals 2 and 3 based on the control signal 13. That is, when the transistors 10 and 11 are made conductive by the control signal 13, the control signal is inverted by the inverter 12, so that the transistors 4 and 5 become non-conductive, and as a result, the 2-bit configuration from the input / output terminals 2 and 3 is realized. It becomes possible to input the decoding code into the decoding code setting registers 8 and 9. Further, when the transistors 10 and 11 are turned off by the control signal 13, the transistors 4 and 5 are turned on, and the encrypted data of the ROM 1 is passed through the EXOR gates 6 and 7 of the logic circuit 16 to the input / output terminals 2 and 2. 3 is output.

The specific operation of decrypting and outputting the encrypted data in the ROM 1 will be described below. First, when the logical value 0 is written in the decoding code setting registers 8 and 9, if the output data of the ROM 1 is the logical value 0,
The output of the EXOR gates 6 and 7 becomes a logical value 0, and R
If the output data of the OM1 is the logical value 1, the outputs of the EXOR gates 6 and 7 will be the logical value 1. That is, if the values of the decoding code setting registers 8 and 9 are logical value 0, the ROM 1
The output data of is output to the input / output terminals 2 and 3 as it is.

Next, when the logical value 1 is written in the decoding code setting registers 8 and 9, and the output data of the ROM 1 is the logical value 0, the outputs of the EXOR gates 6 and 7 become the logical value 1 and If the output data of the ROM1 is the logical value 1, the outputs of the EXOR gates 6 and 7 are the logical value 0. Therefore, if the values of the decoding code setting registers 8 and 9 are the logical value 1, the output data of the ROM1 is inverted. Then, it is output to the input / output terminals 2 and 3.

From this, the logical value 0 or 1 is written in the decoding code setting registers 8 and 9 and the non-inverted / inverted data output is set for each output signal of the ROM 1 to obtain the decoded normal data. Can be output. Therefore, a legitimate user who knows the correct decoding code can read the decoded data, but a third party who does not know the decoding code cannot read the normal data. In this case, the manufacturer of the semiconductor device becomes a third party who cannot read out the normal data unless the decryption code is disclosed to the user, but the manufacturer cannot confirm the data specified by the user. If it can be confirmed that the data is correctly written in the ROM 1, it is sufficient for confirming the function of the semiconductor device in manufacturing, and it is not necessary to read and read the data.

According to the above-mentioned embodiment, since the decoding code is written in the register, the decoding code is not fixed to one, but if the value of the register is arbitrarily rewritten as necessary, the decoding code is changed. It is possible to change. For example, if the data in the ROM is divided into the first half and the second half, and different decoding codes are given to each, the data encryption can be made more complicated. If you divide it into small pieces, even if a third party knows one of the decoding codes,
Normal data can be read only in a part of the ROM, and the entire data cannot be read correctly, so that confidentiality can be sufficiently enhanced.

Further, since the decoding code is the data written in the register, it is impossible to know the decoding code even if the inside of the semiconductor device is directly inspected and analyzed. In addition, since the user of such a semiconductor device only has to write the decryption code in the register at the time of using the semiconductor device, it is not necessary to disclose the decryption code at the manufacturing stage, and the confidentiality of the data to the manufacturer is also eliminated. Can be held.

In the present embodiment, a 2-bit output ROM is taken as an example, but the number of output bits is not limited to 2-bit, and it is clear that it can be applied to a 4-bit or 8-bit ROM. Is. Further, the read-only memory (PROM) that can be written is not limited to the ordinary ROM.
Or an electrically erasable read-only memory (EEPRO
It can also be used for M) and the like.

[0023]

As described above, the semiconductor device of the present invention has the effect of increasing the confidentiality when reading data by writing the decryption code in the register and making it changeable. Further, in the present invention, since the decoding code is the data written in the register, there is an effect that the decoding code is not likely to be known even if the inside of the apparatus is examined and analyzed. Furthermore, the present invention does not require disclosure of the decryption code at the manufacturing stage, and thus has the effect of protecting the confidentiality of data even for the manufacturer.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a semiconductor device showing an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional semiconductor device.

[Explanation of symbols]

 1 ROM 2,3 I / O terminals 4, 5, 10, 11 Transistor 6,7 EXOR 8,9 Decoding code setting register 12 Inverter 14 Input gate 15 Output gate 16 Logic circuit

Claims (3)

[Claims] 1. A memory for storing encrypted data,
An input gate which is connected to the input / output terminal and whose conduction / non-conduction is controlled by a control signal; and code storage means for storing a decryption code from the outside through the input gate,
A logic circuit that directly or converts the data in the memory based on the decoded code set in the code storage means and outputs the data, and an operation that is the reverse of the input gate, and outputs the output of the logic circuit to the input / output. A semiconductor device having an output gate for sending to a terminal. 2. The semiconductor device according to claim 1, wherein the memory uses a ROM, and the code storage means uses a decoding code setting register having a plurality of bits. 3. The semiconductor device according to claim 1, wherein one of the input gate and the output gate is controlled by the control signal via an inverter.