JPH084326B2 - Imaging device - Google Patents

Description

The present invention relates to an image pickup apparatus capable of correcting the output of an image pickup element with a simple configuration.

[Prior art]

Conventionally, it is known that once the crystal defect information of the image sensor is stored in the ROM, the scanning position of the image sensor is compared with the contents of the memory at the time of image capture, and when the image signal is sampled and stopped, the defect is corrected. Was there.

[Problems to be solved by the invention]

However, in such a conventional technique, a separate ROM is required, and when the image sensor is damaged due to aging or the like or the defect position increases, the defect cannot be corrected unless the ROM is replaced. was there. Moreover, there is a drawback that the configuration becomes complicated.

It is an object of the present invention to provide an imaging device that can overcome such conventional drawbacks.

[Means for Solving Problems] An image pickup apparatus according to the present invention includes a microcomputer having a nonvolatile writable memory for controlling the entire apparatus, a counter for counting a scanning position of an image pickup element, A register that temporarily stores the contents of the memory, a comparator that compares the output of the register and the value of the counter, and outputs a match signal when they match, and the scan output of the image sensor is corrected according to the output of the comparator It has a correction means.

[Action]

According to the present invention, it is possible to correct a defect of an image pickup element by providing a microcomputer for controlling the entire image pickup apparatus with some additional circuits.

〔Example〕

FIG. 1 is a diagram showing a first embodiment of the present invention, in which 1 is a lens and diaphragm for forming an optical image on the image sensor 2, 2 is an image sensor such as CCD, and 3 is a discrete element from the image sensor 2. Sample-and-hold circuit for converting a typical output into a continuous waveform, 4 is a signal processing circuit for adding a synchronization signal to the output of the sample-and-hold circuit 3, and performing color correction according to the light source color temperature, Reference numeral 5 is a drive circuit for driving the image pickup device 2, 6 is a circuit for generating a synchronizing signal, a sample hold pulse, etc. (hereinafter abbreviated as SSG) 7 is a system control circuit, and a CPU is used in this embodiment. As such a CPU, for example, MC68HC11A8 of Motorola, Inc. is suitable.

8 is a light source color temperature detection circuit, 9 is various modes, operation input circuit, 10 is a memory circuit (hereinafter referred to as a writable memory circuit) in the system control unit.
It is connected from outside the imaging device with a writing circuit that controls writing to EEPROM.

Reference numeral 11 denotes a post-writable storage circuit (EE in the system control circuit 7
PROM).

Reference numeral 12 is a counter that is counted up by the sample and hold pulse supplied from the SSG 6 to the sample and hold circuit 3, 13 is a counter that is counted up by the horizontal synchronizing signal, and 14a, 14b and defect position information of the image pickup device 2 from the control circuit 7. A latch shift register for receiving and comparing with the position currently being scanned, 14a latches a defect position signal in the vertical scanning direction, and 14b latches a defect position signal in the horizontal scanning direction.

15a and 15b are digital comparators for comparing the outputs of 14a and 14b with the outputs of the counters 12 and 13, respectively, and 16 is the SSG6 based on the matching of the scanning position information and the defect position information.
From sample hold pulse to sample hold circuit 3
The gate circuit 17 for prohibiting the supply to the scanning line information, 17 is the scanning position information in the horizontal scanning line direction and the scanning position information in the scanning line direction, and the scanning position information in the vertical direction to the scanning line. The gate circuit outputs a coincidence signal when defect position information in the vertical direction coincides with a scanning line.

Reference numeral 16 'is a clock IC incorporating SSG 6, gate circuits 16 and 17, counters 12 and 13, shift registers 14a and 14b, comparators 15a and 15b, and the like.

 Next, the operation of the first embodiment shown in the first figure will be described.

(1) Defect correction operation The control circuit 7 monitors the blank signal from SSG6 and disables the comparators 15a and 15b during the vertical blank period.
At the same time, the position information of the first defect of the image sensor 2 is transferred to the shift registers 14a and 14b. With the end of the vertical blank period, the comparators 15a and 15b are enabled to start the comparison operation. The counters 12 and 13 are respectively counted up by a sample hold pulse and a horizontal synchronizing pulse so as to count the current horizontal and vertical scanning positions. When the contents of the counters 12 and 13 indicating the current scanning position and the contents of the shift registers 14a and 14b indicating the defect position match, the outputs of the comparators 15a and 15b become high level and the gate circuit 17 outputs a low level match signal. Is output.

With this coincidence signal, 16 gates are closed and the sample and hold pulse from SSG6 is sample and hold circuit 3.
Is no longer supplied to the output of the sample-hold circuit 3, and the output of the sample-hold circuit 3 continues to hold the value at the time of the previous sample-hold pulse. Therefore, at this time, an abnormal signal such as a white flaw or a black flaw (FIG. 3A) input to the sample and hold circuit due to a defect in the image pickup device is not output from the sample and hold circuit 3 and the data of the immediately preceding pixel is output. Is replaced by.
(FIG. 3b) Therefore, the defect of the image pickup device 2 becomes inconspicuous due to the similarity between adjacent pixels of the image information in the horizontal direction. Further, the control circuit 7 again disables the comparator with the horizontal blank signal immediately after the coincidence signal is output, and transfers the next defect position information of the image pickup device to the shift registers 14a and 14b during the horizontal blank period and fetches it. At the end of the horizontal blanking period, the comparators 15a and 15b are enabled to correct the next defective portion of the image pickup device.

Since it is configured in this way, it has the following effects. First, the position signal of the defective pixel from the ROM 11 and the scanning position signal from the SSG are not directly compared in the CPU, but are compared by a comparator outside the CPU. Therefore, the comparison operation is performed with respect to the scanning speed of the video signal. Can catch up enough.

Moreover, during the first horizontal blanking period after the signal from the ROM 11 and the scanning position signal match, the shift register 14
Since the position information of the next defective pixel is sequentially fetched into a and 14b, it is only necessary to provide the comparator for one pixel, and the configuration is simple.

Moreover, since the data is fetched from the ROM during the horizontal blank period, it is not necessary to read out the ROM and perform the operation during the horizontal scanning period, and the sequence control of the control circuit 7 becomes easy.

Further, according to the present embodiment, the signal correction of the defective pixel can be easily performed only by adding the comparator, the shift register and the counter to the chip of the microprocessor having the built-in EEPROM.

(2) Recording operation of defect position of image pickup device An image of the entire white is taken on the image pickup device 2, and the comparator 15a,
When the entire imaging device is operated with 15b disabled and the sync signal and sample and hold pulses are counted by an external counter (not shown), and the video output reaches an output corresponding to a certain brightness or less. The counter value in 1 is stored in an external storage circuit (not shown). Similarly, a counter value (not shown) at the time when the entire image sensor 2 is shielded from light and the video output level reaches an output corresponding to a certain brightness or more is also stored in the external storage circuit (not shown). )
To memorize. The contents of this external storage circuit correspond to the defect position information of the image sensor 2. The defect position information is rearranged in the scanning order, and the defective pixel position information in the horizontal scanning direction is further decremented by 1 and then stored in the EEPROM 11 inside the control circuit 7 using the EEPROM writing circuit 10. With this, the position information of the defective pixel necessary for the defect correction operation is stored in the EEPR inside the control circuit 7.
It is stored in OM11.

Although a counter for counting the sync signal and the sample hold pulse is provided outside here, if the output terminals of the counters 12 and 13 in the clock IC 6'can be selectively connected to the EEPROM 11 in the control circuit 7, It is also possible to eliminate the need for an external counter.

 Next, FIG. 2 is a configuration diagram of a second embodiment of the present invention.

In this embodiment, the defective horizontal scanning line is replaced with the immediately preceding horizontal scanning line, and the same reference numerals as those in FIG. 1 indicate the same elements.

A switch 18 is switched to the b side when the coincidence output (high level) of the comparator 15a is output, and is normally connected to the a side.

 Further, 19 is a delay means of IH (horizontal period).

 Next, the operation of the second embodiment shown in FIG. 2 will be described.

(3) Defect correction operation While the control circuit 7 monitors the blank signal from SSG6,
During the vertical blanking period, the comparator 15a is disabled and the address of the first defective horizontal scanning line of the image sensor 2 is transferred to the shift register 14a. The comparator 15a is enabled at the end of the vertical blank period. Since the counter 13 is counted up by the horizontal synchronizing signal so as to indicate the address of the horizontal scanning line currently being scanned, the contents of the counter 13 indicating the current vertical scanning position and the shift register 14a indicating the defective scanning position of the image sensor 2 are displayed. When the contents of 1 match, the comparator 15a outputs a match output.

By this coincidence signal, the switch 18 is switched to the b side, and the image signal of the horizontal scanning line before the horizontal period is used instead of the image signal of the defective scanning line. In this embodiment as well, as in the first embodiment, since the image signals of the adjacent scanning lines are similar to each other, the flaws of the image pickup device become inconspicuous.

Moreover, the present embodiment has an advantage over the first embodiment in that the counter 12 for the sample and hold pulse, the comparator 15b, etc. (this must be a circuit of considerably high speed) can be omitted.

On the other hand, the 1H delay means 19 is required, but this is not a burden because it can also be used for other purposes (for example, a dropout in a reproduction circuit (not shown) or a 1H delay means for a comb filter).

When a coincidence output (high level) is output from the comparator 15a, the position information of the next defective horizontal line is taken into the register 14a during the horizontal blank period in synchronization with the horizontal synchronizing signal immediately after that, and the comparator 15a is disabled during this period.
become.

(4) Recording Operation of Defect Position of Imaging Device Similar to the embodiment of FIG. 1, the video output level is monitored for the address of the scanning line where the defect exists in the state where the image of only white or only black is displayed on the imaging device. Detected by
After temporarily storing the address in an external storage circuit (not shown) and arranging it, all address data are decremented by -1 (to use the signal immediately before the defective scanning line) It is stored in the EEPROM 11 inside the control circuit 7 using the writing circuit 10.

Further, in this embodiment, the EE is used as a memory for storing the defect position.
Since the PROM is used, it can be written after the image pickup device is assembled, and since it is non-volatile, it can be used for error data of the photometric system and for exposure control in addition to the defect position information of the image pickup device as described here. Information such as parameters and parameters for signal processing can also be stored.

Also, the time to write defect position information of the image sensor is usually
Although it is conceivable that the image pickup system is being assembled, it goes without saying that it is possible to write in it at the time of repair such as replacement of the image pickup element.

In addition, as a method of detecting defects, a method of copying an image of all white or all black and detecting by Video output has been described, but other than that, a method of directly detecting the output of the image pickup element not through process processing, It goes without saying that a method of displaying an image on the monitor display and visually detecting it may be adopted.

Next, FIG. 4 shows that the first embodiment and the second embodiment are combined into one image pickup device, and the second embodiment is carried out when there is a defect of the image pickup device in the horizontal scanning line of two pixels or more. In the third embodiment, the image signal of 1H before is used by the method of 1) and the image signal of one sampling period before is used by the method of the first embodiment when the defect of the image pickup device exists in the horizontal scanning line for only one pixel. Thus, the defect of the image sensor can be corrected naturally. In this embodiment, when the defective position is stored in the EEPROM, the position data of the line immediately before the horizontal line is stored for a defective horizontal line having two or more pixels, and As the position data, for example, the data whose MSB is "1" such as "10000000" is stored, while when there is only one defect in one horizontal line, this MSB is set to "0". The MSB is set so as not to change even if the sample hold pulse is counted for 1H period. In the fourth illustrated embodiment, the MSB is detected from the output of the register 14b, and the switch 20 is closed when the MSB is "1" and opened when the MSB is "0".

The switch 20 is provided between the comparator 15a and the switch 18.

Therefore, when there are a plurality of defects in one horizontal line, they are replaced by the horizontal line before the 1H period, and at this time, the inverted signal of the MSB is input to the gate circuit 17, so that the output of the gate circuit 17 is always high. Since it is at the level, the sample hold pulse supplied to the sample hold circuit is not cut off.

In the embodiment, the registers 14a and 14b have only one defect position, but a plurality of sets may be provided. In that case, immediately after the power of the image pickup apparatus is turned on, the defect information is sent to the entire shift register at once. After the transfer, the control circuit 7 does not need to be involved in the defect correction thereafter, so that the limitation on the operating speed of the CPU of the control circuit 7 can be eliminated.

〔effect〕

According to the present invention, the signal correction of a defective pixel can be easily performed by simply adding a comparator, a shift register, a counter or the like to an image pickup device using a microprocessor having a built-in non-volatile writable memory.

[Brief description of drawings]

 FIG. 1 is a first embodiment diagram of the present invention, FIG. 2 is a second embodiment diagram of the present invention, FIG. 3 is a diagram showing a state of defect correction of the first embodiment, and FIG. It is a 3rd Example drawing.

Claims (1)

[Claims] 1. A microcomputer having a nonvolatile rewritable EEPROM for controlling the entire apparatus, and input means for inputting defect position data of an image pickup device to the EEPROM from outside the image pickup apparatus. A counter for counting the scanning position of the image pickup device, a register for temporarily storing the contents of the EEPROM, a comparator for comparing the output of the register and the value of the counter, and for outputting a coincidence signal when they coincide, An image pickup apparatus having a correction unit that corrects a scan output of an image pickup element according to an output of a comparator.