JPH0834322B2 - Superconducting element - Google Patents

Superconducting element

Info

Publication number
JPH0834322B2
JPH0834322B2 JP2321653A JP32165390A JPH0834322B2 JP H0834322 B2 JPH0834322 B2 JP H0834322B2 JP 2321653 A JP2321653 A JP 2321653A JP 32165390 A JP32165390 A JP 32165390A JP H0834322 B2 JPH0834322 B2 JP H0834322B2
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JP
Japan
Prior art keywords
superconducting
field effect
thin film
semiconductor layer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2321653A
Other languages
Japanese (ja)
Other versions
JPH04196182A (en
Inventor
塚本  晃
良信 樽谷
一正 高木
徳海 深沢
正彦 平谷
宇紀 樺沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
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Filing date
Publication date
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Priority to JP2321653A priority Critical patent/JPH0834322B2/en
Publication of JPH04196182A publication Critical patent/JPH04196182A/en
Priority to US08/113,006 priority patent/US5380704A/en
Publication of JPH0834322B2 publication Critical patent/JPH0834322B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Element Separation (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【産業上の利用分野】[Industrial applications]

本発明は超電導現象を利用するジョセフソン接合素
子、超電導トランジスタ、超電導スイッチング素子等、
超電導エレクトロニクスの分野に係り、特に酸化物超電
導素子および酸化物超電導配線の構造及びその製法に関
する。
The present invention is a Josephson junction device, a superconducting transistor, a superconducting switching device, etc., which utilizes the superconducting phenomenon.
The present invention relates to the field of superconducting electronics, and more particularly to the structures of oxide superconducting elements and oxide superconducting wirings, and the manufacturing method thereof.

【従来の技術】[Prior art]

ジョセフソン接合素子、超電導トランジスタ、超電導
SQUID素子、に代表される超電導素子は超高速動作や低
消費電力,高感度磁界検出等の優れた特長を持ってい
る。しかし、従来は超電導現象が液体ヘリウム温度付近
の極低温でしか現われないため、実用化は困難とされて
いた。しかし,近年発見された酸化物超電導体は液体窒
素温度以上の臨界温度を持っており,超電導体の実用化
は大きく前進しつつある。 超電導素子の一例として超電導電界効果型素子を次に
示す。 第1図は超電導電界効果型素子の断面構造を示してい
る。第1図には2組の素子が描かれている。超電導近接
効果を用いることにより超電導電界効果型素子の動作原
理を簡単に説明する。近接超電導近接効果を用いること
により超電導体からなるソース電極1a,1bからやはり超
電導体からなるドレイン電極2a,2bへ半導体3の部分を
通って超電導電流が流れる。この超電導電流を絶縁体4
a,4bを介して取り付けられたゲート電極5a,5bに加える
ゲート電圧により制御する。 しかしながら,酸化物を用いた場合,超電導体から半
導体(常伝導体)中に超電導電子が広がる距離は極めて
小さいことが理論から示されている。そのため,超電導
電界効果型素子においてはソース,ドレイン電極間の距
離を0.1μm以下にする必要があると考えられていた。 しかしながら,発明者らは,これらの酸化物超電導体
は従来の理論から予想されるよりも長距離まで超電導近
接効果により超電導電流がしみだすことを示した。これ
と似たことは第9回新機能性素子技術シンポジウム予稿
集85頁−90頁1990年に記載されている。しかし,記述さ
れている内容な積層構造についてのみであり,プレーナ
形に関しては不明であった。発明者らはプレーナ形の超
電導素子においても,近接効果により半導体中に超電導
電子が広がる距離が従来の理論値よりも長いことを見い
出した。 超電導近接効果が長距離まで届くことは、ソース、ド
レイン間の距離を大きくとれることを意味しており、ゲ
ート電極の形成をはじめとして素子の作製を容易にす
る。
Josephson junction element, superconducting transistor, superconducting
Superconducting elements such as SQUID elements have excellent features such as ultra-high speed operation, low power consumption, and highly sensitive magnetic field detection. However, in the past, the superconducting phenomenon appeared only at an extremely low temperature near the temperature of liquid helium, and it was considered difficult to put it into practical use. However, recently discovered oxide superconductors have a critical temperature above the liquid nitrogen temperature, and the practical application of superconductors is making great progress. A superconducting field effect element is shown below as an example of the superconducting element. FIG. 1 shows a cross-sectional structure of a superconducting field effect element. Two sets of elements are depicted in FIG. The operating principle of the superconducting field effect device will be briefly described by using the superconducting proximity effect. By using the proximity superconducting proximity effect, a superconducting current flows from the source electrodes 1a, 1b made of a superconductor to the drain electrodes 2a, 2b also made of a superconductor through the semiconductor 3. Insulator 4
It is controlled by the gate voltage applied to the gate electrodes 5a and 5b attached via a and 4b. However, the theory indicates that when an oxide is used, the distance that the superconducting conductor spreads from the superconductor to the semiconductor (normal conductor) is extremely small. Therefore, it has been considered necessary to set the distance between the source and drain electrodes to 0.1 μm or less in the superconducting field effect device. However, the inventors have shown that these oxide superconductors exude a superconducting current due to the superconducting proximity effect over a longer distance than expected from conventional theory. The similarities are described in the 9th New Functional Device Technology Symposium Proceedings, pp. 85-90, 1990. However, it was only the laminated structure described, and it was unknown about the planar type. The inventors have found that even in a planar type superconducting element, the distance over which the superconducting conductor spreads in the semiconductor due to the proximity effect is longer than the conventional theoretical value. The fact that the superconducting proximity effect reaches a long distance means that the distance between the source and the drain can be made large, which facilitates the fabrication of the device including the formation of the gate electrode.

【発明が解決しようとする課題】[Problems to be Solved by the Invention]

従来技術において、超電導近接効果が長距離まで届く
ことは,ソース,ドレイン間の距離を大きくとれること
を意味しており,ゲート電極の形成をはじめとして素子
の作製を容易にする。 しかし,超電導近接効果が長距離まで届くことは,超
電導素子を高密度に集積し,超電導素子間あるいは超電
導配線間の距離が短くなった場合,超電導素子間や超電
導配線の間にも超電導近接効果による相互作用を生じさ
せ,素子の誤動作やノイズの増加を引き起こす。例え
ば,第1図のドレイン電極2aとソース電極1bの間に超電
導近接効果による超電導電流が流れてしまう。 本発明の目的は,超電導近接効果による超電導素子間
あるいは超電導配線間の相互作用を抑えること,および
その具体的な方法を提供することである。
In the prior art, the fact that the superconducting proximity effect reaches a long distance means that the distance between the source and the drain can be made large, which facilitates the fabrication of the device including the formation of the gate electrode. However, the fact that the superconducting proximity effect reaches a long distance means that when the superconducting elements are integrated at high density and the distance between the superconducting elements or between the superconducting wires becomes short, the superconducting proximity effect also occurs between the superconducting elements and between the superconducting wires. Cause interaction with the device, causing malfunction of the device and increase of noise. For example, the superconducting current due to the superconducting proximity effect flows between the drain electrode 2a and the source electrode 1b in FIG. An object of the present invention is to suppress interaction between superconducting elements or between superconducting wirings due to the superconducting proximity effect, and to provide a specific method thereof.

【課題を解決するための手段】[Means for Solving the Problems]

上記目的を達成するために、本願発明の超電導素子
は、超電導素子あるいは超電導配線を相互に影響を与え
合わないように電気的に孤立させることで解決できる。 例えば,第2図に示すように,ドレイン電極2aとソー
ス電極1bの間の半導体3をエッチングして取り除くこと
で,上記問題点は解決できる。 また,エッチング以外の方法として,イオン打ち込み
や化学反応を用いて半導体3を超電導電流が流れないよ
うにする,または,初めから超電導素子間や超電導配線
間に半導体を形成しない等の方法が挙げられる。
In order to achieve the above object, the superconducting element of the present invention can be solved by electrically isolating the superconducting element or the superconducting wiring so as not to affect each other. For example, as shown in FIG. 2, the above problem can be solved by etching and removing the semiconductor 3 between the drain electrode 2a and the source electrode 1b. As a method other than etching, there may be mentioned a method of preventing a superconducting current from flowing through the semiconductor 3 by using ion implantation or a chemical reaction, or a method of not forming a semiconductor between superconducting elements or between superconducting wirings from the beginning. .

【作用】[Action]

本願発明の超電導素子においては,超電導素子間ある
いは超電導配線間を電気的に孤立させることで,超電導
素子間あるいは超電導配線間に生じる不必要な相互作用
を防ぐことができ,超電導素子の高集積化が可能とな
る。
In the superconducting element of the present invention, by electrically isolating the superconducting elements or the superconducting wirings from each other, it is possible to prevent unnecessary interaction between the superconducting elements or between the superconducting wirings, and to achieve high integration of the superconducting elements. Is possible.

【実施例】【Example】

次に本発明を実施例を用いて詳細に説明する。 第3図,および第4図は作製した超電導電界効果型素
子の断面構造図と平面構造図である。超電導体としてHo
Ba2Cu3Ox(6.5<x<7.0)を用い,半導体としてLa1.5B
a1.5Cu3Ox(6.5<x<7.0)を用いてプレーナー形の超
電導電界効果型素子を作製した。基板はSrTiO3(110)
単結晶基板12を用いた。まず,基板上にRFマグネトロン
スパッタ法でLa1.5Ba1.5Cu3Ox(6.5<x<7.0)半導体
薄膜11を作製した。ターゲットにはLa1.5Ba1.5Cu4.5Ox
の焼結体を用いた。基板温度は650℃,スパッタガスは3
0mTorrのAr−50%O2,RF電力は120W,成膜速度は0.15μm/
h,膜厚は0.6μmとした。成膜後は1気圧の酸素中で室
温まで冷却する。 次にマイクロ波酸素プラズマを使用した反応性蒸着法
でHoBa2Cu3Ox(6.5<x<7.0)超電導薄膜をその上に作
製した。酸素圧8×1/105Torr,マイクロ波電力120Wの酸
素プラズマ中で基板を580℃に加熱し,30分間プラズマ照
射を行い表面の汚れを取り除いた後,3本のクヌードセン
セルからHo,Ba,Cuの金属を組成比がHo:Ba:Cu=1:2:3に
なるように蒸発させプラズマ中でLa1.5Ba1.5Cu3Ox(6.5
<x<7.0)薄膜上にHoBa2Cu3Ox(6.5<x<7.0)薄膜
をエピタキシャル成長させた。成膜速度は60nm/h,膜厚
は80nmとした。成膜後は1気圧の酸素中で室温まで冷却
する。 このようにして作製したLa1.5Ba1.5Cu3Ox(6.5<x<
7.0)半導体薄膜上のHoBa2Cu3Ox(6.5<x<7.0)薄膜
にソース電極8a,8bおよびドレインで伝極10a,10bを含ん
だパターンをSF6ガスを用いた反応性イオンビームエッ
チング法により作製した。チャネル部のHoBa2Cu3Ox(6.
5<x<7.0)薄膜の間隙は100nmとした。この上に絶縁
膜のSrTiO3薄膜7a,7bおよびゲート電極9a,9b用のHoBa2C
u3Ox(6.5<x<7.0)薄膜を形成した。それぞれの膜厚
は150nmおよび100nmとした。成膜後,HoBa2Cu3Ox(6.5<
x<7.0)薄膜にゲート電極9a,9bとしてのパターンを加
工,成型した。以上の工程により第3図,第4図に示し
た超電導電界効果型素子を作製する。 第5図は第4図に示した超電導電界効果型素子の特性
である。ゲート電極9に3V電圧を加えた場合,超電導電
流が10mA流れ,ゲート電極9に電圧をかけない場合,つ
まりオフ状態では超電導電流が1mAに減少した。しか
し,オフ状態での電流が大きく素子として十分に動作し
ていないことがわかった。 実施例1 前記第4図の構造と同じ工程まで作製した後,隣接し
た超電導素子との間のLa1.5Ba1.5Cu3Ox(6.5<x<7.
0)半導体薄膜をエッチングにより取り除き,第6図に
示す構造を作製した。第7図にこの場合の超電導電界効
果型素子の特性を示す。ゲート電圧が0Vの場合,つまり
オフ状態の超電導電流が0.01mA以下となり,素子として
十分な特性を得ることができる。 この結果,酸化物超電導体を用いた超電導電界効果型
素子や超電導配線,超電導ループなどを1μ以下の間隔
で組み合わせた論理回路や記憶回路などの超電導回路を
作製することができる。 実施例2 前記第4図の構造と同じ工程まで作製した後,隣接し
た超電導素子との間のLa1.5Ba1.5Cu3Ox(6.5<x<7.
0)半導体薄膜に鉄(Fe)イオンを1cm2当り1018個打ち
込み,第8図に示す構造を作製した。この場合にも実施
例1の特性と同様な値を得ることができ,本工程を用い
ても,酸化物超電導体を用いた超電導電界効果型素子や
超電導配線,超電導ループなどを1μ以下の間隔で組み
合わせた論理回路や記憶回路などの超電導回路を作製す
ることができる。 実施例3 前記第4図の構造と同じ工程まで作製した後,隣接し
た超電導素子との間のLa1.5Ba1.5Cu3Ox(6.5<x<7.
0)半導体薄膜にSiを蒸着した。蒸着後,酸素中500℃で
5時間の熱処理を行いSiをLa1.5Ba1.5Cu3Ox(6.5<x<
7.0)半導体薄膜中に拡散させた。このようにして作製
した超電導電界効果型素子の特性を測定したところ,や
はり実施例1の特性と同様な値を得ることができた。ま
た,本工程を用いて作製した超電導電界効果型素子や超
電導配線,超電導ループなどを1μ以下の間隔で組み合
わせることで,論理回路や記憶回路などの超電導回路を
作製することができる。
Next, the present invention will be described in detail with reference to examples. FIG. 3 and FIG. 4 are a sectional structural view and a plan structural view of the produced superconducting field effect device. Ho as a superconductor
Ba 2 Cu 3 Ox (6.5 <x <7.0) is used and La 1.5 B is used as a semiconductor.
A planar type superconducting field effect device was manufactured using a 1.5 Cu 3 Ox (6.5 <x <7.0). Substrate is SrTiO 3 (110)
A single crystal substrate 12 was used. First, a La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <7.0) semiconductor thin film 11 was formed on a substrate by the RF magnetron sputtering method. La 1.5 Ba 1.5 Cu 4.5 Ox for target
Was used. Substrate temperature is 650 ℃, sputter gas is 3
Ar-50% O 2 at 0 mTorr, RF power 120 W, deposition rate 0.15 μm /
h, and the film thickness was 0.6 μm. After the film formation, it is cooled to room temperature in oxygen at 1 atm. Next, a HoBa 2 Cu 3 Ox (6.5 <x <7.0) superconducting thin film was formed thereon by a reactive vapor deposition method using microwave oxygen plasma. The substrate was heated to 580 ° C in oxygen plasma with an oxygen pressure of 8 × 1/105 Torr and a microwave power of 120 W, and plasma irradiation was performed for 30 minutes to remove surface stains. , Cu metal is evaporated so that the composition ratio becomes Ho: Ba: Cu = 1: 2: 3, and La 1.5 Ba 1.5 Cu 3 Ox (6.5
A HoBa 2 Cu 3 Ox (6.5 <x <7.0) thin film was epitaxially grown on the <x <7.0) thin film. The film forming speed was 60 nm / h and the film thickness was 80 nm. After the film formation, it is cooled to room temperature in oxygen at 1 atm. La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <
7.0) A pattern containing HoBa 2 Cu 3 Ox (6.5 <x <7.0) thin film on the semiconductor thin film including source electrodes 8a, 8b and drain electrodes 10a, 10b by reactive ion beam etching using SF6 gas It was made. HoBa 2 Cu 3 Ox (6.
5 <x <7.0) The gap between the thin films was 100 nm. On top of this, the insulating film SrTiO 3 thin films 7a, 7b and HoBa 2 C for the gate electrodes 9a, 9b are formed.
A u 3 Ox (6.5 <x <7.0) thin film was formed. The respective film thicknesses were 150 nm and 100 nm. After film formation, HoBa 2 Cu 3 Ox (6.5 <
A pattern as the gate electrodes 9a and 9b was processed and molded on the x <7.0) thin film. Through the above steps, the superconducting field effect element shown in FIGS. 3 and 4 is manufactured. FIG. 5 shows the characteristics of the superconducting field effect device shown in FIG. When 3 V voltage was applied to the gate electrode 9, the superconducting current flowed 10 mA, and when no voltage was applied to the gate electrode 9, that is, in the off state, the superconducting current decreased to 1 mA. However, it was found that the current in the off state was large and did not operate sufficiently as an element. Example 1 After manufacturing up to the same steps as the structure of FIG. 4, La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <7.
0) The semiconductor thin film was removed by etching to produce the structure shown in FIG. FIG. 7 shows the characteristics of the superconducting field effect element in this case. When the gate voltage is 0 V, that is, the superconducting current in the off state is 0.01 mA or less, and sufficient characteristics as an element can be obtained. As a result, it is possible to fabricate a superconducting circuit such as a logic circuit or a memory circuit in which a superconducting field effect element using an oxide superconductor, a superconducting wiring, a superconducting loop and the like are combined at intervals of 1 μm or less. Example 2 After manufacturing up to the same steps as the structure of FIG. 4, La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <7.
0) Iron (Fe) ions were implanted into the semiconductor thin film at a rate of 10 18 per cm 2 to fabricate the structure shown in Fig. 8. In this case as well, the same value as the characteristic of the first embodiment can be obtained, and even when this step is used, the superconducting field effect element using the oxide superconductor, the superconducting wiring, the superconducting loop, etc. are spaced at intervals of 1 μm or less. A superconducting circuit such as a logic circuit or a memory circuit combined in step 1 can be manufactured. Example 3 After manufacturing up to the same steps as the structure of FIG. 4, La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <7.
0) Si was vapor-deposited on the semiconductor thin film. After vapor deposition, heat treatment is performed in oxygen at 500 ° C for 5 hours to convert Si into La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <
7.0) Diffused in semiconductor thin film. When the characteristics of the superconducting field effect device manufactured in this way were measured, the same values as the characteristics of Example 1 could be obtained. In addition, by combining the superconducting field effect device, the superconducting wiring, the superconducting loop, etc., which are manufactured by using this process, at intervals of 1 μm or less, a superconducting circuit such as a logic circuit or a memory circuit can be manufactured.

【発明の効果】【The invention's effect】

本発明により,酸化物超電導体を用いた超電導電界効
果型素子やジョセフソン接合素子,超電導配線等からな
る超電導回路を高度に集積させることができる。
According to the present invention, a superconducting circuit including a superconducting field effect element using an oxide superconductor, a Josephson junction element, superconducting wiring, etc. can be highly integrated.

【図面の簡単な説明】[Brief description of drawings]

第1図は超電導電界効果型素子の断面構造。 第2図は本発明を用いた超電導電界効果型素子の断面構
造。 第3図は作製した超電導電界効果型素子の断面構造図。 第4図は作製した超電導電界効果型素子の平面構造図。 第5図は第3図,第4図に示した超電導電界効果型素子
の電流−電圧特性。(a),(b)はそれぞれゲート電
圧3V,0Vに対応している。 第6図は実施例1で作製した超電導電界効果型素子の平
面構造図。 第7図は第6図に示した超電導電界効果型素子の電流−
電圧特性。(a),(b)はそれぞれゲート電圧3V,0V
に対応している。 第8図は実施例2で作製した超電導電界効果型素子の平
面構造図。 符号の説明 1a,1b……ソース電極,2a,2b……ドレイン電極,3……半
導体,4a,4b……絶縁体,5a,5b……ゲート電極,6……基
板,7a,7b……SrTiO3薄膜,8a,8b……ソース電極,9a,9b…
…ゲート電極,10a,10b……ドレイン電極,11……La1.5Ba
1.5Cu3Ox(6.5<x<7.0)半導体薄膜,12……SrTiO3(1
10)単結晶基板,13……La1.5Ba1.5Cu3Ox(6.5<x<7.
0)半導体薄膜をエッチングにより取り除いた部分,14…
…La1.5Ba1.5Cu3Ox(6.5<x<7.0)半導体薄膜にイオ
ンを打ち込んだ部分。
Figure 1 shows the cross-sectional structure of a superconducting field effect device. FIG. 2 is a sectional structure of a superconducting field effect device using the present invention. FIG. 3 is a sectional structural view of the produced superconducting field effect element. FIG. 4 is a plan structure view of the produced superconducting field effect element. FIG. 5 shows current-voltage characteristics of the superconducting field effect device shown in FIGS. 3 and 4. (A) and (b) correspond to gate voltages of 3V and 0V, respectively. FIG. 6 is a plan structure view of the superconducting field effect element manufactured in Example 1. FIG. 7 shows the current of the superconducting field effect device shown in FIG.
Voltage characteristics. (A), (b) are gate voltage 3V, 0V respectively
It corresponds to. FIG. 8 is a plan structure view of the superconducting field effect device manufactured in Example 2. Explanation of symbols 1a, 1b …… source electrode, 2a, 2b …… drain electrode, 3 …… semiconductor, 4a, 4b …… insulator, 5a, 5b …… gate electrode, 6 …… substrate, 7a, 7b …… SrTiO3 thin film, 8a, 8b ... Source electrode, 9a, 9b ...
… Gate electrodes, 10a, 10b …… Drain electrodes, 11 …… La 1.5 Ba
1.5 Cu 3 Ox (6.5 <x <7.0) semiconductor thin film, 12 …… SrTiO 3 (1
10) Single crystal substrate, 13 …… La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <7.
0) Semiconductor thin film removed by etching, 14…
… La 1.5 Ba 1.5 Cu 3 Ox (6.5 <x <7.0) A part where ions are implanted in a semiconductor thin film.

フロントページの続き (72)発明者 深沢 徳海 東京都国分寺市東恋ケ窪1丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 平谷 正彦 東京都国分寺市東恋ケ窪1丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 樺沢 宇紀 東京都国分寺市東恋ケ窪1丁目280番地 株式会社日立製作所中央研究所内 (56)参考文献 特開 平3−148882(JP,A)Front page continued (72) Inventor Tokumi Fukasawa 1-280, Higashi Koikeku, Kokubunji, Tokyo, Central Research Laboratory, Hitachi, Ltd. (72) Inventor Masahiko Hiratani 1-280, Higashi Koikeku, Kokubunji, Tokyo Hitachi Central Research Co., Ltd. In-house (72) Inventor Uki Kabazawa 1-280, Higashi-Kengokubo, Kokubunji-shi, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (56) Reference JP-A-3-148882 (JP, A)

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】基板と、該基板上に形成された酸化物より
なる半導体層と、該半導体層上にソース、ドレイン、ゲ
ート電極よりなる複数の超電導素子を備え、上記半導体
層中における上記複数の超電導素子間もしくは超電導配
線間の超電導近接効果による相互作用の防止手段を、上
記半導体層中に配設してなることを特徴とする超伝導素
子。
1. A substrate, a semiconductor layer made of an oxide formed on the substrate, and a plurality of superconducting elements made of a source, a drain, and a gate electrode on the semiconductor layer, the plurality of the semiconductor layers in the semiconductor layer. 2. A superconducting element, comprising means for preventing an interaction between the superconducting elements or between superconducting wirings due to the superconducting proximity effect in the semiconductor layer.
【請求項2】上記相互作用の防止手段は、上記半導体層
中に形成されたイオン打ち込み領域であることを特徴と
する請求項1に記載の超電導素子。
2. The superconducting element according to claim 1, wherein the means for preventing the interaction is an ion-implanted region formed in the semiconductor layer.
【請求項3】上記相互作用の防止手段は、上記半導体層
の一部を取り除いた領域であることを特徴とする請求項
1に記載の超電導素子。
3. The superconducting element according to claim 1, wherein the means for preventing the interaction is a region where a part of the semiconductor layer is removed.
JP2321653A 1990-02-02 1990-11-26 Superconducting element Expired - Fee Related JPH0834322B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2321653A JPH0834322B2 (en) 1990-11-26 1990-11-26 Superconducting element
US08/113,006 US5380704A (en) 1990-02-02 1993-08-30 Superconducting field effect transistor with increased channel length

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2321653A JPH0834322B2 (en) 1990-11-26 1990-11-26 Superconducting element

Publications (2)

Publication Number Publication Date
JPH04196182A JPH04196182A (en) 1992-07-15
JPH0834322B2 true JPH0834322B2 (en) 1996-03-29

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2321653A Expired - Fee Related JPH0834322B2 (en) 1990-02-02 1990-11-26 Superconducting element

Country Status (1)

Country Link
JP (1) JPH0834322B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03148882A (en) * 1989-11-06 1991-06-25 Furukawa Electric Co Ltd:The Superconducting transistor

Also Published As

Publication number Publication date
JPH04196182A (en) 1992-07-15

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