JPH0834201B2 - Etching method and apparatus thereof - Google Patents

Etching method and apparatus thereof

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Publication number
JPH0834201B2
JPH0834201B2 JP61102008A JP10200886A JPH0834201B2 JP H0834201 B2 JPH0834201 B2 JP H0834201B2 JP 61102008 A JP61102008 A JP 61102008A JP 10200886 A JP10200886 A JP 10200886A JP H0834201 B2 JPH0834201 B2 JP H0834201B2
Authority
JP
Japan
Prior art keywords
ions
etching
neutralizing
sample
neutral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61102008A
Other languages
Japanese (ja)
Other versions
JPS62259443A (en
Inventor
巽 水谷
潔 三宅
茂 西松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP61102008A priority Critical patent/JPH0834201B2/en
Publication of JPS62259443A publication Critical patent/JPS62259443A/en
Publication of JPH0834201B2 publication Critical patent/JPH0834201B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体集積回路等の電子部品の微細加工を
行うエツチング方法および装置に係り、特に試料を構成
する絶縁膜の耐圧劣化を防止するのに好適なエツチング
方法および装置に関する。
Description: TECHNICAL FIELD The present invention relates to an etching method and apparatus for microfabrication of electronic parts such as semiconductor integrated circuits, and particularly to prevent breakdown voltage deterioration of an insulating film constituting a sample. Etching method and apparatus suitable for

〔従来の技術〕[Conventional technology]

半導体集積回路等の微細なパターンを形成するため近
年低圧気体のグロー放電プラズマを用いたプラズマエツ
チング法が広範に利用されている。この方法はプラズマ
中で生成されたイオンが試料表面に垂直に入射する性質
を利用して、エツチングマスク寸法通りに高精度にエツ
チング加工する方法で、種々の方式が例えば菅野卓雄編
「半導体プラズマプロセス技術」産業図書1980(英訳本
‘Applications of Plasma Processes to VLSI Technol
ogy'John Wiley&Sons 1985)に詳述されている。いず
れの方式においても被エツチング試料はプラズマに接触
して、プラズマ中から荷電粒子(イオンおよび電子)が
試料表面に入射する。電子の移動度はイオンの移動度よ
りも大きいので、試料表面には電子が蓄積してプラズマ
電位に対して負に帯電する。この結果、試料に入射する
イオンと電子のフラツクスが同一になる。通常、この試
料表面電位はプラズマ電位に対して−20V程度あり、薄
い絶縁膜を内部構造に有している半導体集積回路等にお
いては、絶縁膜を隔てた一方の電極に相当する導体部分
もしくは半導体部分の電位が上記の試料表面電位と異な
る場合には、絶縁膜の破壊や劣化が誘起される。また、
エツチングすべき表面材料が導体である場合には、プラ
ズマを発生させるための高周波電界中に試料を配置する
と該導体中に誘導電界が生じ、渦電流が流れる。この場
合も該導体が薄い絶縁膜をはさんで他の導体と対向して
いる場合には、絶縁膜の破壊や劣化が起こりうる。
In recent years, a plasma etching method using glow discharge plasma of low-pressure gas has been widely used to form a fine pattern of a semiconductor integrated circuit or the like. This method utilizes the property that ions generated in plasma enter the sample surface perpendicularly, and is a method of highly accurate etching processing in accordance with the etching mask dimensions. Technology ”Industrial Books 1980 (English translation of'Applications of Plasma Processes to VLSI Technol
ogy'John Wiley & Sons 1985). In either method, the sample to be etched comes into contact with the plasma, and charged particles (ions and electrons) enter the sample surface from the plasma. Since the mobility of electrons is higher than the mobility of ions, electrons accumulate on the sample surface and are negatively charged with respect to the plasma potential. As a result, the ion and electron flux incident on the sample becomes the same. Usually, the sample surface potential is about -20 V with respect to the plasma potential.In a semiconductor integrated circuit having a thin insulating film in its internal structure, a conductor portion or a semiconductor corresponding to one electrode with the insulating film separated is used. When the potential of the portion is different from the surface potential of the sample, the insulation film is broken or deteriorated. Also,
When the surface material to be etched is a conductor, when a sample is placed in a high frequency electric field for generating plasma, an induced electric field is generated in the conductor and an eddy current flows. Also in this case, when the conductor faces the other conductor across the thin insulating film, the insulating film may be broken or deteriorated.

以上のように、プラズマエツチングでは、入射する荷
電粒子の蓄積や高周波誘導による電界が絶縁膜に印加さ
れ、これらが絶縁膜の破壊や劣化の原因になると推測さ
れる。この点については従来のプラズマエツチング装置
では十分考慮されておらず、絶縁膜が集積回路の高集積
化とともに次第に薄膜化し、例えばSi MOS形トランジス
タのゲート絶縁膜の膜厚が100Å程度になるとその絶縁
耐圧は僅かに10V程度になり、従来のプラズマ処理は絶
縁膜を劣化させると懸念される。
As described above, in plasma etching, an electric field due to the accumulation of incident charged particles and high frequency induction is applied to the insulating film, and it is presumed that these cause destruction or deterioration of the insulating film. This point has not been sufficiently taken into consideration in the conventional plasma etching apparatus, and the insulating film becomes thinner as the integrated circuit becomes more highly integrated. For example, when the gate insulating film thickness of a Si MOS transistor becomes about 100 Å, The withstand voltage is only about 10 V, and it is feared that the conventional plasma treatment deteriorates the insulating film.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

本発明の目的は、上記のような従来のプラズマ処理に
伴う表面の電荷蓄積や電界の誘導のないエツチング加工
方法を提供することにある。電荷蓄積や誘導電界は、荷
電粒子を試料に入射させたり、高周波電界中に試料を配
置することによるので、上記目的のためにはこれらを完
全に排除することが必要となる。
It is an object of the present invention to provide an etching method which does not accumulate electric charges on the surface or induce an electric field associated with the conventional plasma treatment as described above. The charge accumulation and the induction electric field are caused by injecting charged particles into the sample or by arranging the sample in the high frequency electric field, and therefore it is necessary to completely eliminate them for the above purpose.

最近、バキユアム,34(1984年)第259頁から第261頁
(Vacuum,34(1984)pp259−261)に論じられているよ
うに、サドルフイールドソースと称される粒子源から引
出される粒子が殆んど高速中性粒子であり、これを用い
たエツチング等の表面処理方法が提案されているが、こ
の高速中性粒子源は、エネルギーとフラツクスを独立に
制御することができず、しかもエネルギーは約1KeV以上
の比較的高いエネルギーしか得られないという欠点を有
する。
As recently discussed in Bakiyuam, 34 (1984) p. 259 to 261 (Vacuum, 34 (1984) pp259-261), particles extracted from a particle source called a saddle field source are Almost all of them are fast neutral particles, and surface treatment methods such as etching using them have been proposed.However, this fast neutral particle source cannot control the energy and flux independently, Has the disadvantage that only relatively high energies above about 1 KeV can be obtained.

従つて、本発明のより限定された目的は、所望のエネ
ルギーの高速中性粒子を発生させ、これを試料表面に入
射させて所望の微細エツチングを実現することである。
Therefore, a more limited object of the present invention is to generate fast neutral particles of desired energy and impinge them on the sample surface to achieve the desired fine etching.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、試料表面に入射する粒子を比較的低エネ
ルギーの電気的に中性な粒子のみとし、かつ試料を高周
波電界にさらさないことによつて達成される。本発明の
適用分野である微細パターンのエツチング加工の分野に
おいてはエッチングマスク通りの高精度加工が必要であ
るので、試料に入射する粒子の少なくとも一部は試料表
面に一定の方向性(例えば垂直)を持つて入射すること
が必要である。このために、本発明ではイオン源で形成
したイオンを電界により引出して所望のエネルギーまで
加速し、気体分子との電荷交換,固体表面でのイオンの
中性化,電子との再結合によるイオンの中性化等の方法
により中性の高速粒子としたのち、試料表面の所望の角
度で入射させる。同時に試料近傍にCl2,HCl,BCl3,CCl4,
XeF2,F2,CClF3等のハロゲン化物気体を供給する。これ
らの気体分子はSi,GaAs,Al,W等の試料表面に吸着し、中
性高速粒子が入射するとそのエネルギーによりエツチン
グ反応が進む。
The above object is achieved by making the particles incident on the surface of the sample only electrically neutral particles having a relatively low energy and not exposing the sample to a high frequency electric field. In the field of etching processing of a fine pattern, which is an application field of the present invention, since high-precision processing through an etching mask is required, at least a part of particles incident on the sample has a certain directionality (for example, perpendicular) to the sample surface. It is necessary to hold the beam to enter. Therefore, in the present invention, the ions formed by the ion source are extracted by an electric field to be accelerated to a desired energy, and charge exchange with gas molecules, neutralization of ions on the solid surface, recombination of electrons with ions After neutralizing high-speed particles by a method such as neutralization, the particles are made incident at a desired angle on the sample surface. At the same time, Cl 2 , HCl, BCl 3 , CCl 4 ,
A halide gas such as XeF 2 , F 2 and CClF 3 is supplied. These gas molecules are adsorbed on the surface of the sample such as Si, GaAs, Al, W, etc. When neutral high speed particles enter, the etching reaction proceeds due to the energy.

〔作用〕[Action]

試料表面に供給するハロゲン化物の反応性気体は試料
表面に吸着するのみで、それ自体ではエツチング反応は
殆んど進まないが、中性高速粒子を入射させることでは
じめてエツチングが相当の速度で進行する。
The reactive gas of the halide supplied to the sample surface is only adsorbed on the sample surface, and the etching reaction hardly progresses by itself, but the etching progresses at a considerable speed only by injecting neutral high-speed particles. To do.

また、中性高速粒子を試料表面に入射させると一般に
表面から2次電子が放出されて試料表面に正電荷が蓄積
されるが、このときの2次電子放出係数は同一エネルギ
ー,同一粒子のイオンの入射の場合より小さいので表面
の帯電はイオン入射に比べて小さい。さらに中性高速粒
子の入射エネルギーが1KeV以下程度になると、表面から
の2次電子の放出は殆んどなく、従つて表面の帯電は殆
んどない状態となる。従つて、本発明の目的を達成する
には、試料表面に入射させる中性高速粒子のエネルギー
を1KeV以下さらに望ましくは500eV以下にするのが良
い。
Further, when neutral fast particles are incident on the sample surface, secondary electrons are generally emitted from the surface and positive charges are accumulated on the sample surface. At this time, the secondary electron emission coefficient is the same energy, ions of the same particle. Is smaller than that in the case of incident light, the surface charging is smaller than that in the case of ion injection. Further, when the incident energy of the neutral high-speed particles is about 1 KeV or less, secondary electrons are hardly emitted from the surface, and accordingly, the surface is hardly charged. Therefore, in order to achieve the object of the present invention, the energy of the neutral high-speed particles incident on the sample surface should be 1 KeV or less, and more preferably 500 eV or less.

〔実施例〕〔Example〕

以下、本発明の実施例を第1図により説明する。イオ
ン源1で生成したAr+イオンを引出し電極2で引出しエ
ネルギー450eVに加速した。イオン源1の前方には長さ
約50cmの真空槽4があり被エツチング試料5をイオン源
1に対向して配置した。試料5はSi基板上に厚さ約100
ÅのSiO2膜を形成し、その上に多結晶Siを3000Åの厚さ
に披着し、さらにその上にホトレジストパターンを形成
したものである。真空槽4にガス供給孔6からCl2を供
給し同時にターボ分子ポンプ7で排気して、真空槽内の
Cl2圧力を5×10-4Torrに保つた。真空槽4の中に1対
の偏向板8を配置し、それぞれの電極に+350V,−350V
の直流電圧を印加した。イオン源1から引出されたAr+
イオンは、試料5に向う途中でCl2との電荷交換反応に
より大部分が中性化されるが、中性化させれずに残留す
るAr+イオンが存在する。偏向板8はこの残留イオンが
試料に入射しないように偏向させるための手段である。
An embodiment of the present invention will be described below with reference to FIG. The Ar + ions generated by the ion source 1 were accelerated by the extraction electrode 2 to an extraction energy of 450 eV. A vacuum chamber 4 having a length of about 50 cm is provided in front of the ion source 1, and an etching sample 5 is arranged so as to face the ion source 1. Sample 5 has a thickness of about 100 on the Si substrate.
A Å SiO 2 film is formed, polycrystalline Si is deposited on it to a thickness of 3000 Å, and a photoresist pattern is further formed on it. Cl 2 is supplied to the vacuum chamber 4 from the gas supply hole 6 and, at the same time, exhausted by the turbo molecular pump 7,
The Cl 2 pressure was kept at 5 × 10 -4 Torr. A pair of deflecting plates 8 is placed in the vacuum chamber 4, and each electrode has + 350V, -350V.
DC voltage was applied. Ar + extracted from the ion source 1
Most of the ions are neutralized by the charge exchange reaction with Cl 2 on the way to the sample 5, but there are Ar + ions remaining without being neutralized. The deflector 8 is a means for deflecting the residual ions so that they do not enter the sample.

以上の条件でArの中性高速原子のフラツクスが5×10
14/cm2・secのとき、多結晶Siのエツチング速度は約100
0Å/minであつた。エツチング後、多結晶Si電極と基板S
iの間に電圧を印加して、SiO2膜の絶縁耐圧を評価した
が、耐圧の劣化は見られなかった。
Under the above conditions, the flux of Ar neutral fast atoms is 5 × 10.
At 14 / cm 2 · sec, the etching speed of polycrystalline Si is about 100.
It was 0Å / min. After etching, the polycrystalline Si electrode and substrate S
A voltage was applied between i and the insulation breakdown voltage of the SiO 2 film was evaluated, but the breakdown voltage was not deteriorated.

〔発明の効果〕〔The invention's effect〕

本発明によれば、エツチング加工中の薄い絶縁膜の耐
圧の劣化を防止できるので、信頼性の高い半導体集積回
路等を高い歩留りで製造することができる効果がある。
この効果は上記に説明したようにエツチング処理中に試
料の入射する中性高速粒子のエネルギーを500eV以下程
度に下げたときに特に大きく、通常のプラズマエツチン
グによりエツチングした場合に、しばしば見られる薄い
絶縁膜の絶縁破壊は殆んど見られなくなる。
According to the present invention, it is possible to prevent the breakdown voltage of the thin insulating film from being deteriorated during the etching process, so that it is possible to manufacture a highly reliable semiconductor integrated circuit or the like with a high yield.
This effect is particularly large when the energy of the neutral fast particles entering the sample during the etching process is reduced to about 500 eV or less as described above, and the thin insulation often seen when etching is performed by ordinary plasma etching. Almost no dielectric breakdown of the film is seen.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の装置の基本構成図である。 1……イオン源、2……イオン引出し電極、3……イオ
ン源フイラメント、4……真空槽、5……被エツチング
試料、6……ガス供給孔、7……ターボ分子ポンプ、8
……偏向板。
FIG. 1 is a basic configuration diagram of an apparatus according to an embodiment of the present invention. 1 ... Ion source, 2 ... Ion extraction electrode, 3 ... Ion source filament, 4 ... Vacuum chamber, 5 ... Etching sample, 6 ... Gas supply hole, 7 ... Turbo molecular pump, 8
...... A deflector.

フロントページの続き (56)参考文献 特開 昭61−136229(JP,A) 特開 昭62−185324(JP,A) 特開 昭62−98731(JP,A) 特開 昭59−225525(JP,A) 特開 昭59−139539(JP,A) 実開 昭55−99145(JP,U)Continuation of the front page (56) References JP 61-136229 (JP, A) JP 62-185324 (JP, A) JP 62-98731 (JP, A) JP 59-225525 (JP , A) JP 59-139539 (JP, A) Actually developed 55-99145 (JP, U)

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】1KeV以下のエネルギーに加速したイオンを
中性化することによって得られる中性高速粒子とハロゲ
ンを構成原子として含む反応性気体とを試料表面に供給
することを特徴とするエツチング方法。
1. An etching method, characterized in that neutral fast particles obtained by neutralizing ions accelerated to an energy of 1 KeV or less and a reactive gas containing halogen as a constituent atom are supplied to a sample surface. .
【請求項2】上記の反応性気体は、試料表面に吸着し得
るものであることを特徴とする特許請求の範囲第1項に
記載のエツチング方法。
2. The etching method according to claim 1, wherein the reactive gas can be adsorbed on the sample surface.
【請求項3】イオンを生成するイオン源と、該イオン源
で生成されたイオンを1KeV以下のエネルギーに加速する
イオン加速手段と、該イオン加速手段によって加速され
たイオンを中性化して中性高速粒子を生成する中性化手
段と、該中性化手段によって生成された中性高速粒子を
エツチングされるべき試料表面に入射させる中性高速粒
子供給手段と、ハロゲンを構成原子として含む反応性気
体を上記試料表面に供給する反応性気体供給手段とを具
備してなることを特徴とするエツチング装置。
3. An ion source for producing ions, an ion accelerating means for accelerating the ions produced by the ion source to an energy of 1 KeV or less, and neutralizing the ions accelerated by the ion accelerating means. Neutralization means for generating high-speed particles, neutral high-speed particle supply means for making the neutral high-speed particles generated by the neutralization means incident on the sample surface to be etched, and reactivity containing halogen as a constituent atom An etching apparatus comprising: a reactive gas supply means for supplying a gas to the surface of the sample.
【請求項4】上記の中性高速粒子供給手段は、上記中性
高速粒子中に残留するイオンを偏向させて試料表面に入
射させないようにするイオン偏向手段を含んでいること
を特徴とする特許請求の範囲第3項に記載のエツチング
装置。
4. The neutral high speed particle supplying means includes an ion deflecting means for deflecting the ions remaining in the neutral high speed particles so as not to enter the sample surface. The etching device according to claim 3.
【請求項5】上記の中性化手段は、気体分子との電荷交
換によりイオンを中性化させるものであることを特徴と
する特許請求の範囲第3項に記載のエツチング装置。
5. The etching device according to claim 3, wherein the neutralizing means neutralizes ions by charge exchange with gas molecules.
【請求項6】上記の中性化手段は、固体表面でのイオン
の中性化によりイオンを中性化させるものであることを
特徴とする特許請求の範囲第3項に記載のエツチング装
置。
6. The etching apparatus according to claim 3, wherein the neutralizing means neutralizes the ions by neutralizing the ions on the solid surface.
【請求項7】上記の中性化手段は、電子との再結合によ
りイオンを中性化させるものであることを特徴とする特
許請求の範囲第3項に記載のエツチング装置。
7. The etching apparatus according to claim 3, wherein the neutralizing means neutralizes ions by recombination with electrons.
JP61102008A 1986-05-06 1986-05-06 Etching method and apparatus thereof Expired - Fee Related JPH0834201B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61102008A JPH0834201B2 (en) 1986-05-06 1986-05-06 Etching method and apparatus thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61102008A JPH0834201B2 (en) 1986-05-06 1986-05-06 Etching method and apparatus thereof

Publications (2)

Publication Number Publication Date
JPS62259443A JPS62259443A (en) 1987-11-11
JPH0834201B2 true JPH0834201B2 (en) 1996-03-29

Family

ID=14315745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61102008A Expired - Fee Related JPH0834201B2 (en) 1986-05-06 1986-05-06 Etching method and apparatus thereof

Country Status (1)

Country Link
JP (1) JPH0834201B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5145554A (en) * 1989-02-23 1992-09-08 Seiko Epson Corporation Method of anisotropic dry etching of thin film semiconductors
JPH04253328A (en) * 1991-01-29 1992-09-09 Hitachi Ltd Surface treatment device
JPH05326452A (en) * 1991-06-10 1993-12-10 Kawasaki Steel Corp Equipment and method for plasma treatment
US5462629A (en) * 1992-08-28 1995-10-31 Kawasaki Steel Corp. Surface processing apparatus using neutral beam
KR100687481B1 (en) * 2006-03-24 2007-02-27 성균관대학교산학협력단 Chemically assisted neutral beam etching system and etching method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61136229A (en) * 1984-12-06 1986-06-24 Toshiba Corp Dry etching device

Also Published As

Publication number Publication date
JPS62259443A (en) 1987-11-11

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