JPH08340266A - Radio reception circuit - Google Patents

Radio reception circuit

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Publication number
JPH08340266A
JPH08340266A JP14474195A JP14474195A JPH08340266A JP H08340266 A JPH08340266 A JP H08340266A JP 14474195 A JP14474195 A JP 14474195A JP 14474195 A JP14474195 A JP 14474195A JP H08340266 A JPH08340266 A JP H08340266A
Authority
JP
Japan
Prior art keywords
circuit
signal
muting
digital data
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14474195A
Other languages
Japanese (ja)
Other versions
JP3208286B2 (en
Inventor
Hirohisa Suzuki
裕久 鈴木
Keiji Kobayashi
啓二 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP14474195A priority Critical patent/JP3208286B2/en
Publication of JPH08340266A publication Critical patent/JPH08340266A/en
Application granted granted Critical
Publication of JP3208286B2 publication Critical patent/JP3208286B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Noise Elimination (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE: To provide a radio receiver for eliminating noise due to digital data while transferring the digital data. CONSTITUTION: When digital data for setting the reference value of RF-AGC and a tuning frequency are impressed to an input circuit 25, this radio receiver is set to an optimum reception state corresponding to the digital data. When the digital data are impressed to the input circuit 25, it is detected that the digital data are impressed in a detection circuit 27 by chip enable signals and muting signals are generated from a muting generation circuit 28 corresponding to the output signals of the detection circuit 27. A muting circuit 19 performs a muting operation corresponding to the muting signals and the output signals of the detection circuit 27 are muted. Thus, while transferring the digital data, the generation of the noise due to the digital data is prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、デジタルデータに起因
したノイズの影響を低減したラジオ受信回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio receiving circuit which reduces the influence of noise caused by digital data.

【0002】[0002]

【従来の技術】従来、デジタルデータを発生するマイコ
ン等により構成される制御回路を備え、デジタルデータ
を変更することによって最良の受信状態を得るラジオ受
信機が知られている。図2は、そのようなラジオ受信機
のうち、局部発振信号の周波数を設定するための分周デ
ジタルデータを発生し、また、所定の受信電界強度に応
じて、RF増幅回路のゲインを変更するAMラジオ受信
機の例である。
2. Description of the Related Art Conventionally, there is known a radio receiver which has a control circuit composed of a microcomputer for generating digital data and which obtains the best reception state by changing the digital data. In such a radio receiver, FIG. 2 generates frequency-divided digital data for setting the frequency of a local oscillation signal, and changes the gain of an RF amplifier circuit according to a predetermined received electric field strength. It is an example of an AM radio receiver.

【0003】図2において、受信RF信号は、RF増幅
回路(1)で増幅された後、RF同調回路(2)で周波
数選択される。RF同調回路(2)の出力信号は、混合
回路(3)において局部発振回路(4)から発生する局
部発振信号によって450KHzのIF信号に変換さ
れ、更に前記IF信号は、IF増幅回路(5)で増幅さ
れた後、検波回路(5)で検波される。
In FIG. 2, a received RF signal is amplified by an RF amplifier circuit (1) and then frequency-selected by an RF tuning circuit (2). The output signal of the RF tuning circuit (2) is converted into an IF signal of 450 KHz by the local oscillation signal generated from the local oscillation circuit (4) in the mixing circuit (3), and the IF signal is further amplified by the IF amplification circuit (5). After being amplified by, it is detected by the detection circuit (5).

【0004】また、図1のAMラジオ受信機が希望放送
局を受信しようとするとき、制御回路(7)からPLL
制御回路(8)に分周データを印加し、PLL制御回路
(8)の所定の制御信号が局部発振回路(4)に印加さ
れ、前記分周データに応じて局部発振回路(4)から所
定周波数を有する局部発振信号が発生する。前記局部発
振信号はPLL制御回路(8)に印加され、局部発振回
路(4)及びPLL制御回路(8)から成るPLLルー
プは前記所定周波数にロックする。また、前記局部発振
信号は混合回路(3)にも印加され、希望放送局のRF
信号が選択される。
When the AM radio receiver shown in FIG. 1 is about to receive a desired broadcasting station, the control circuit (7) outputs a PLL signal.
The frequency division data is applied to the control circuit (8), a predetermined control signal of the PLL control circuit (8) is applied to the local oscillation circuit (4), and the predetermined frequency is output from the local oscillation circuit (4) according to the frequency division data. A local oscillator signal having a frequency is generated. The local oscillation signal is applied to the PLL control circuit (8), and the PLL loop including the local oscillation circuit (4) and the PLL control circuit (8) locks at the predetermined frequency. Further, the local oscillation signal is also applied to the mixing circuit (3), and the RF signal of the desired broadcasting station is received.
The signal is selected.

【0005】一方、電界強度検出回路(9)において、
IF増幅回路(5)の出力信号に応じて、受信信号の電
界強度が検出される。電界強度検出回路(9)は、平滑
回路(10)で平滑された後、RF−AGC回路(1
1)に印加される。RF−AGC回路(11)におい
て、平滑回路(10)の出力信号はRF−AGC回路
(11)に印加され、基準値と比較される。前記基準値
は制御回路(7)から発生するデジタルデータに応じて
設定される。平滑回路(10)の出力信号が基準値より
高いと、RF−AGC回路(11)から出力信号が発生
し、RF増幅回路(2)の利得を小とし、過大レベルの
RF信号が混合回路(3)に印加されないようにする。
また、平滑回路(10)の出力信号が閾値より小さい
と、RF増幅回路(2)の利得を制御しない。
On the other hand, in the electric field strength detection circuit (9),
The electric field strength of the received signal is detected according to the output signal of the IF amplifier circuit (5). The electric field strength detection circuit (9) is smoothed by the smoothing circuit (10) and then the RF-AGC circuit (1).
1) is applied. In the RF-AGC circuit (11), the output signal of the smoothing circuit (10) is applied to the RF-AGC circuit (11) and compared with a reference value. The reference value is set according to the digital data generated from the control circuit (7). When the output signal of the smoothing circuit (10) is higher than the reference value, the output signal is generated from the RF-AGC circuit (11), the gain of the RF amplifier circuit (2) is reduced, and the RF signal of an excessive level is mixed ( Do not apply to 3).
If the output signal of the smoothing circuit (10) is smaller than the threshold value, the gain of the RF amplifier circuit (2) is not controlled.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、図2の
回路において、デジタルデータが制御回路(7)からP
LL制御回路(8)及びRF−AGC回路(11)に伝
送されるとき、デジタルデータやクロック信号の「1」
及び「0」の変化により、高調波成分が発生する。その
為、前記高調波成分が、ラジオ受信機の同調ライン及び
検波ラインに重畳し、検波出力信号のS/Nが悪化する
という問題があった。
However, in the circuit of FIG. 2, digital data is transferred from the control circuit (7) to P
When transmitted to the LL control circuit (8) and the RF-AGC circuit (11), "1" of digital data or clock signal
And a change of "0" causes a harmonic component. Therefore, there is a problem that the harmonic component is superimposed on the tuning line and the detection line of the radio receiver, and the S / N of the detection output signal is deteriorated.

【0007】[0007]

【課題を解決するための手段】本発明は、上述の点に鑑
み成されたものであり、少なくとも、検波回路がIC基
板上に集積化されたラジオ受信回路において、前記ラジ
オ受信集積回路の受信状態を設定するためのデジタルデ
ータが印加される入力端子と、前記デジタルデータが印
加されたことを検出する検出回路と、該検出回路の出力
信号に応じて、前記検波回路の出力信号に信号処理を施
す信号処理回路とを設けたことを特徴とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and at least in a radio receiving circuit in which a detection circuit is integrated on an IC substrate, the reception of the radio receiving integrated circuit is performed. An input terminal to which digital data for setting a state is applied, a detection circuit for detecting that the digital data is applied, and signal processing to an output signal of the detection circuit according to an output signal of the detection circuit. And a signal processing circuit for performing the above.

【0008】また、前記信号処理回路は、該検出回路の
出力信号に応じて、ミューティング信号を発生するミュ
ーティング信号発生回路と、前記ミューティング信号に
応じて、前記検波回路の出力信号をミューティングする
ミューティング回路とにより構成されることを特徴とす
る。さらに、前記信号処理回路は、前記検波回路の出力
信号中のノイズ成分を除去するノイズ除去回路と、該検
出回路の出力信号に応じて、前記ノイズ除去回路に除去
動作させる除去動作制御回路とにより構成されることを
特徴とする。
The signal processing circuit mutes a muting signal generating circuit for generating a muting signal in response to the output signal of the detection circuit and a muting signal for the muting signal in response to the muting signal. And a muting circuit for starting the operation. Furthermore, the signal processing circuit includes a noise removal circuit that removes a noise component in the output signal of the detection circuit, and a removal operation control circuit that causes the noise removal circuit to perform a removal operation according to the output signal of the detection circuit. It is characterized by being configured.

【0009】[0009]

【作用】本発明によれば、ラジオ受信回路の受信状態を
設定するためのデジタルデータがラジオ受信回路の入力
端子に印加されると、前記デジタルデータに応じてラジ
オ受信回路は最適受信状態に設定される。デジタルデー
タが前記入力端子に印加されると、検出回路でデジタル
データが印加されたことが検出され、前記検出回路の出
力信号に応じてミューティング発生回路からミューティ
ング信号が発生する。前記ミューティング信号に応じて
ミューティング回路がミューティング動作し、前記検波
回路の出力信号がミューティングされる。その為、デジ
タルデータの転送中、デジタルデータに起因したノイズ
の発生を防止することができる。
According to the present invention, when digital data for setting the receiving state of the radio receiving circuit is applied to the input terminal of the radio receiving circuit, the radio receiving circuit is set to the optimum receiving state according to the digital data. To be done. When the digital data is applied to the input terminal, the detection circuit detects that the digital data is applied, and the muting generation circuit generates a muting signal according to the output signal of the detection circuit. The muting circuit performs a muting operation according to the muting signal, and the output signal of the detection circuit is muted. Therefore, it is possible to prevent the generation of noise due to the digital data during the transfer of the digital data.

【0010】また、検出回路の出力信号に応じて除去動
作制御回路が動作し、前記除去動作制御回路の出力信号
に応じてノイズ除去回路が動作し、デジタルデータに起
因して重畳された検波出力信号中のノイズを除去するの
で、検波出力中のS/Nの悪化が防止できる。
Further, the removal operation control circuit operates according to the output signal of the detection circuit, the noise removal circuit operates according to the output signal of the removal operation control circuit, and the detection output superposed due to the digital data. Since noise in the signal is removed, deterioration of S / N during detection output can be prevented.

【0011】[0011]

【実施例】図1は本発明の一実施例を示す図であり、
(12)は受信RF信号を増幅するRF増幅回路、(1
3)はRF増幅回路(12)の出力信号を選択同調する
RF同調回路、(14)は局部発振信号を発生する局部
発振回路、(15)は局部発振信号の周波数を制御する
PLL制御信号を発生するPLL制御回路、(16)は
RF同調回路(13)の出力信号を局部発振信号によっ
てIF信号に変換する混合回路、(17)は前記IF信
号を増幅するIF増幅回路、(18)はIF増幅回路
(17)の出力信号をAM検波するAM検波回路、(1
9)はAM検波回路(19)の出力信号をミューティン
グするミューティング回路、(20)はミューティング
回路(19)の出力信号をオーディオアンプ、(21)
はIF増幅回路(17)の出力信号に応じて受信電界強
度を検出する電界強度検出回路、(22)はIF増幅回
路(17)の出力信号を平滑する平滑回路、(23)は
平滑回路(22)の出力信号に応じてRF増幅回路(1
2)の利得を変更するRF−AGC回路、(24)はデ
ジタルデータに応じてRF−AGC回路(23)の基準
値を発生するD/A変換回路、(25)はデジタルデー
タを受け入れる入力回路、(26)は分周データ及びR
F−AGC回路(23)の基準値を設定する為のデータ
を発生する制御回路、(27)は入力回路(26)にデ
ータが印加されたことを検出する検出回路、(28)は
検出回路(26)の出力信号に応じてミューティング信
号を発生するミューティング信号発生回路である。尚、
制御回路(26)以外の回路は同一基板上にIC化され
ている。
FIG. 1 is a diagram showing an embodiment of the present invention,
(12) is an RF amplifier circuit for amplifying the received RF signal, (1
3) is an RF tuning circuit that selectively tunes the output signal of the RF amplifier circuit (12), (14) is a local oscillation circuit that generates a local oscillation signal, and (15) is a PLL control signal that controls the frequency of the local oscillation signal. A generated PLL control circuit, (16) a mixing circuit for converting the output signal of the RF tuning circuit (13) into an IF signal by a local oscillation signal, (17) an IF amplification circuit for amplifying the IF signal, and (18) a An AM detection circuit for performing AM detection on the output signal of the IF amplification circuit (17), (1
9) is a muting circuit for muting the output signal of the AM detection circuit (19), (20) is an audio amplifier for the output signal of the muting circuit (19), (21)
Is a field strength detection circuit that detects the received field strength according to the output signal of the IF amplifier circuit (17), (22) is a smoothing circuit that smoothes the output signal of the IF amplifier circuit (17), and (23) is a smoothing circuit ( 22) according to the output signal of the RF amplifier circuit (1
RF-AGC circuit for changing the gain of 2), (24) a D / A conversion circuit for generating a reference value of the RF-AGC circuit (23) according to digital data, (25) an input circuit for receiving digital data , (26) are frequency division data and R
A control circuit for generating data for setting the reference value of the F-AGC circuit (23), (27) a detection circuit for detecting that data is applied to the input circuit (26), and (28) a detection circuit. It is a muting signal generation circuit for generating a muting signal according to the output signal of (26). still,
Circuits other than the control circuit (26) are integrated into an IC on the same substrate.

【0012】また、図1において、受信動作は従来のも
のと同一であるので、受信動作の説明は省略する。次
に、RF−AGC動作について説明する。IF増幅回路
(17)の出力信号に応じて、受信電界強度が電界強度
検出回路(21)で検出される。電界強度検出回路(2
1)の出力信号は平滑回路(22)に印加され、平滑さ
れる。平滑回路(22)の出力信号はRF−AGC回路
(23)に印加され、D/A変換回路(24)からの基
準値と比較される。平滑回路(22)の出力信号が前記
基準値より大きいと、RF−AGC回路(26)から出
力信号が発生し、RF増幅回路(12)の利得を小と
し、また、前記利得は平滑回路(22)の出力信号と基
準値との差に応じた値となる。よって、過大レベルのR
F信号が混合回路(16)に印加されることが防止され
る。また、平滑回路(25)の出力信号が基準値より小
さいと、RF増幅回路(12)の利得を制御しない。
Further, in FIG. 1, since the receiving operation is the same as the conventional one, the description of the receiving operation is omitted. Next, the RF-AGC operation will be described. The received electric field strength is detected by the electric field strength detection circuit (21) according to the output signal of the IF amplifier circuit (17). Electric field strength detection circuit (2
The output signal of 1) is applied to the smoothing circuit (22) and smoothed. The output signal of the smoothing circuit (22) is applied to the RF-AGC circuit (23) and compared with the reference value from the D / A conversion circuit (24). When the output signal of the smoothing circuit (22) is larger than the reference value, an output signal is generated from the RF-AGC circuit (26) to reduce the gain of the RF amplifier circuit (12), and the gain is the smoothing circuit ( It becomes a value according to the difference between the output signal of 22) and the reference value. Therefore, an excessive level of R
The F signal is prevented from being applied to the mixing circuit (16). If the output signal of the smoothing circuit (25) is smaller than the reference value, the gain of the RF amplifier circuit (12) is not controlled.

【0013】また、図1のAMラジオ受信機が希望放送
局を受信しようとするとき、希望放送局の周波数に応じ
た分周データが制御回路(26)から入力回路(25)
を介してPLL制御回路(8)に印加される。前記分周
データに応じてPLL制御回路(7)の所定の制御信号
が局部発振回路(4)に印加され、前記分周データに応
じて局部発振回路(4)から所定周波数を有する局部発
振信号が発生する。前記局部発振信号はPLL制御回路
(7)に印加され、局部発振回路(4)及びPLL制御
回路(7)から成るPLLループは前記所定周波数にロ
ックする。また、前記局部発振信号は混合回路(3)に
も印加され、RF信号と局発振信号が混合されることに
より、混合回路(3)の出力信号の周波数が、例えば、
450KHzになるRF信号が選択される。
When the AM radio receiver of FIG. 1 is about to receive a desired broadcast station, frequency division data corresponding to the frequency of the desired broadcast station is input from the control circuit (26) to the input circuit (25).
Is applied to the PLL control circuit (8) via. A predetermined control signal of a PLL control circuit (7) is applied to a local oscillation circuit (4) according to the divided data, and a local oscillation signal having a predetermined frequency is output from the local oscillation circuit (4) according to the divided data. Occurs. The local oscillation signal is applied to the PLL control circuit (7), and the PLL loop including the local oscillation circuit (4) and the PLL control circuit (7) locks at the predetermined frequency. Further, the local oscillation signal is also applied to the mixing circuit (3), and the RF signal and the local oscillation signal are mixed, so that the frequency of the output signal of the mixing circuit (3) is, for example,
The RF signal at 450 KHz is selected.

【0014】ところで、RF−AGC回路(23)の基
準値を定めるためのデータ及び分周データが、制御回路
(26)から入力回路(25)に転送されるときの動作
を説明する。前記デジタルデータは図4の如くデータ信
号と、クロック信号と、チップイネーブル信号とからな
り、データ信号は前記基準値を定めるためのデジタルデ
ータを含み、チップイネーブル信号はデータ信号が存在
するときに「1」に立ち上がる信号である。データ転送
中、チップイネーブル信号は「0」から「1」になり、
データ信号がクロック信号に同期して入力端子を介して
入力回路(25)に転送される。 また、検出回路(2
7)はチップイネーブル信号の立ち上がりまたは立ち下
がりを検出する回路であって、データ転送中チップイネ
ーブル信号が「0」から「1」になったことを検出し、
出力信号を発生する。そして、検出回路(27)の出力
信号に応じて、ミューティング信号発生回路(28)か
らミューティング信号が発生し、AM検波回路(18)
の出力信号がミューティング回路でミューティングされ
る。
Now, the operation when the data for determining the reference value of the RF-AGC circuit (23) and the divided data are transferred from the control circuit (26) to the input circuit (25) will be described. The digital data includes a data signal, a clock signal, and a chip enable signal as shown in FIG. 4, the data signal includes digital data for determining the reference value, and the chip enable signal is "when the data signal is present. It is a signal that rises to 1 ”. During data transfer, the chip enable signal changes from "0" to "1",
The data signal is transferred to the input circuit (25) via the input terminal in synchronization with the clock signal. In addition, the detection circuit (2
7) is a circuit for detecting rising or falling of the chip enable signal, which detects that the chip enable signal has changed from "0" to "1" during data transfer,
Generate an output signal. Then, a muting signal is generated from the muting signal generation circuit (28) according to the output signal of the detection circuit (27), and the AM detection circuit (18) is generated.
The output signal of is muted by the muting circuit.

【0015】一方、入力回路(25)に転送されたデー
タはそれぞれPLL制御回路(15)及びD/A変換回
路(24)に印加され、PLL制御回路(15)は前記
分周データに応じた制御信号を発生し、D/A変換回路
(24)はRF−AGC回路(23)の基準値を発生す
る。データの転送が終了すると、チップイネーブル信号
が「1」から「0」に立ち下がり、これを検出した検出
回路から出力信号の発生が停止される。その為、ミュー
ティング信号の発生が停止し、ミューティングが解除さ
れる。よって、データ転送中、データの転送に起因した
ノイズの発生を防止できる。尚、RF−AGC回路(2
3)の基準値は、ラジオ受信機の仕向け地に応じて最適
受信状態が得られるように設定される。その為、デジタ
ルデータを変更することによって簡単に閾値を変更する
ことができる。
On the other hand, the data transferred to the input circuit (25) are applied to the PLL control circuit (15) and the D / A conversion circuit (24), respectively, and the PLL control circuit (15) responds to the divided data. A control signal is generated, and the D / A conversion circuit (24) generates a reference value for the RF-AGC circuit (23). When the data transfer is completed, the chip enable signal falls from "1" to "0", and the detection circuit that detects this causes the generation of the output signal to be stopped. Therefore, the generation of the muting signal is stopped and the muting is released. Therefore, it is possible to prevent generation of noise due to data transfer during data transfer. The RF-AGC circuit (2
The reference value of 3) is set so that the optimum reception state can be obtained according to the destination of the radio receiver. Therefore, the threshold value can be easily changed by changing the digital data.

【0016】図3は、本発明の他の実施例を示す図であ
り、(30)はFM変調されたRF信号を増幅するRF
増幅回路、(31)は局部発振信号を発生する局部発振
回路、(32)はRF増幅回路(30)の出力信号を前
記局部発振信号によりIF信号に変換する混合回路、
(33)は前記IF信号を増幅するIF増幅回路、(3
4)はIF増幅回路(33)の出力信号をFM検波する
FM検波回路、(35)はIF増幅回路(33)の出力
信号に応じて電界強度を検出する電界強度検出回路、
(36)は前記電界強度に応じてソフトミューティング
信号を発生するソフトミューティング発生回路、(3
7)はFM検波回路(33)の出力信号をソフトミュー
ティングするソフトミューティング回路、(38)は遅
延回路(39)と、ノイズ検出回路(40)と、ゲート
信号発生回路(41)と、ゲート回路(42)と、引き
算回路(43)と、コンデンサー(44)とから成るノ
イズ除去回路、(45)はノイズ除去回路(38)の出
力信号をマルチプレクスするマルチプレクス回路、(4
6)はソフトミューティング信号発生回路(36)の基
準値を定めるD/A変換回路、(47)はD/A変換回
路(46)にデータを転送する制御回路、(48)はデ
ータが印加されたことを検出する検出回路である。尚、
制御回路(47)以外の回路は同一基板上に集積化され
ている。
FIG. 3 is a diagram showing another embodiment of the present invention, in which (30) is an RF for amplifying an FM-modulated RF signal.
An amplifier circuit, (31) a local oscillator circuit for generating a local oscillator signal, (32) a mixer circuit for converting the output signal of the RF amplifier circuit (30) into an IF signal by the local oscillator signal,
(33) is an IF amplifier circuit for amplifying the IF signal, (3
4) is an FM detection circuit for performing FM detection on the output signal of the IF amplification circuit (33), (35) is an electric field strength detection circuit for detecting electric field strength according to the output signal of the IF amplification circuit (33),
(36) is a soft muting generation circuit for generating a soft muting signal according to the electric field strength, (3)
7) is a soft muting circuit for soft muting the output signal of the FM detection circuit (33), (38) is a delay circuit (39), a noise detection circuit (40), a gate signal generation circuit (41), A noise removal circuit including a gate circuit (42), a subtraction circuit (43) and a capacitor (44), (45) a multiplex circuit for multiplexing the output signal of the noise removal circuit (38), (4
6) is a D / A conversion circuit that determines the reference value of the soft muting signal generation circuit (36), (47) is a control circuit that transfers data to the D / A conversion circuit (46), and (48) is data application This is a detection circuit that detects that the operation has been performed. still,
Circuits other than the control circuit (47) are integrated on the same substrate.

【0017】また、図3のFM受信機の受信動作及びノ
イズ除去動作については、従来と同一のため説明を省略
する。次に、弱電界時における図3のラジオ受信機の動
作について説明する。受信信号の電界強度が低下する
と、電界強度検出回路(35)の出力信号がD/A変換
回路(46)から発生する基準値より低くなり、ソフト
ミューティング信号発生回路(36)からソフトミュー
ティング信号が発生する。前記ソフトミューティング信
号に応じて、ソフトミューティング回路(37)はミュ
ーティング動作し、FM検波回路(34)の出力信号を
所定の減衰量でミューティングする。そして、前記減衰
量は電界強度検出回路(35)の出力信号と基準値との
差に応じて変化する。よって、弱電界時、ソフトミュー
ティングを行うことによって、ノイズのレベルも小さく
し、ノイズを目立たせないようにする。
The receiving operation and noise removing operation of the FM receiver shown in FIG. Next, the operation of the radio receiver shown in FIG. 3 when the electric field is weak will be described. When the electric field strength of the received signal decreases, the output signal of the electric field strength detection circuit (35) becomes lower than the reference value generated by the D / A conversion circuit (46), and the soft muting signal generation circuit (36) causes the soft muting. A signal is generated. The soft muting circuit (37) performs a muting operation in response to the soft muting signal, and mutes the output signal of the FM detection circuit (34) with a predetermined attenuation amount. Then, the attenuation amount changes according to the difference between the output signal of the electric field strength detection circuit (35) and the reference value. Therefore, by performing soft muting in a weak electric field, the noise level is also reduced so that the noise is not noticeable.

【0018】ところで、ラジオ受信機の動作開始時、制
御回路(47)から入力端子を介してD/A変換回路
(46)に図4の如きデジタルデータが転送される。デ
ータ転送中、チップイネーブル信号が「0」から「1」
レベルに変化するので、この変化を検出回路(48)が
検出し、検出回路(48)が出力信号を発生する。ノイ
ズ除去回路(38)のゲート信号発生回路(41)に印
加される検出回路(48)の出力信号が印加されるの
で、その間ゲート信号が発生し、ゲート回路(42)が
開く。その為、引き算回路(7)の(+)及び(−)端
子の間に接続されるコンデンサー(44)の両端電圧
は、ゲート回路(42)が開く直前の入力レベルとなる
ので、前記コンデンサー(44)の両端電圧に応じた出
力信号のみが、引き算回路(44)の出力端に発生する
ノイズが除去される。データの転送が終了すると、チッ
プイネーブル信号が「1」から「0」に変化し、検出回
路(48)からの出力信号が停止する。その為、ゲート
信号の発生が停止し、ノイズ除去動作が停止する。よっ
て、データ転送中、データの転送に起因したノイズの発
生を防止できる。
By the way, when the operation of the radio receiver is started, digital data as shown in FIG. 4 is transferred from the control circuit (47) to the D / A conversion circuit (46) through the input terminal. During data transfer, the chip enable signal changes from "0" to "1".
Since the level changes, the detection circuit (48) detects this change and the detection circuit (48) generates an output signal. Since the output signal of the detection circuit (48) applied to the gate signal generation circuit (41) of the noise removal circuit (38) is applied, a gate signal is generated during that time and the gate circuit (42) is opened. Therefore, the voltage across the capacitor (44) connected between the (+) and (−) terminals of the subtraction circuit (7) becomes the input level immediately before the gate circuit (42) is opened, so that the capacitor ( The noise generated at the output terminal of the subtraction circuit (44) is removed only from the output signal corresponding to the voltage across 44). When the data transfer is completed, the chip enable signal changes from "1" to "0" and the output signal from the detection circuit (48) stops. Therefore, the generation of the gate signal is stopped and the noise removal operation is stopped. Therefore, it is possible to prevent generation of noise due to data transfer during data transfer.

【0019】尚、図1及び図3に記載される如き、RF
−AGC、弱電界ミューティング及びラジオ受信機の同
調周波数を設定するラジオ受信機だけでなく、デジタル
データで他の受信状態を設定するラジオ受信機にも本発
明に関わる技術を適用することができ、デジタルデータ
に起因したノイズを除去することができる。
It should be noted that as shown in FIGS. 1 and 3, RF
The technique according to the present invention can be applied not only to a radio receiver that sets the tuning frequency of the AGC, the weak electric field muting and the radio receiver, but also to a radio receiver that sets other reception states with digital data. It is possible to remove noise caused by digital data.

【0020】[0020]

【発明の効果】以上述べた如く、本発明によれば、デー
タ転送期間中、ミューティングを行ってオーディオ出力
信号を発生しないようにするので、データ転送に起因す
るノイズの発生を防止できる。また、データ転送期間
中、ノイズ除去回路を強制的に動作させるので、オーデ
ィオ出力信号中に含まれるデータ転送によるノイズを除
去でき、S/Nを改善することができる。
As described above, according to the present invention, the muting is performed during the data transfer period so that the audio output signal is not generated, so that the noise caused by the data transfer can be prevented. In addition, since the noise removal circuit is forcibly operated during the data transfer period, it is possible to remove the noise included in the audio output signal due to the data transfer and improve the S / N ratio.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

【図2】従来例を示すブロック図である。FIG. 2 is a block diagram showing a conventional example.

【図3】本発明の他の実施例を示すブロック図である。FIG. 3 is a block diagram showing another embodiment of the present invention.

【図4】本発明を説明するための特性図である。FIG. 4 is a characteristic diagram for explaining the present invention.

【符号の説明】[Explanation of symbols]

21、35 電界強度検出回路 22 平滑回路 23 RF−AGC回路 24、46 D/A変換回路 25 入力回路 26、47 制御回路 27 検出回路 28 ミューティング信号発生回路 36 ソフトミューティング信号発生回
路 37 ソフトミューティング回路 38、48 ノイズ除去回路
21, 35 Electric field intensity detection circuit 22 Smoothing circuit 23 RF-AGC circuit 24, 46 D / A conversion circuit 25 Input circuit 26, 47 Control circuit 27 Detection circuit 28 Muting signal generating circuit 36 Soft muting signal generating circuit 37 Soft mu Circuit 38, 48 Noise removal circuit

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】少なくとも、検波回路がIC基板上に集積
化されたラジオ受信回路において、 前記ラジオ受信集積回路の受信状態を設定するためのデ
ジタルデータが印加される入力端子と、 前記デジタルデータが印加されたことを検出する検出回
路と、 該検出回路の出力信号に応じて、前記検波回路の出力信
号に信号処理を施す信号処理回路とを設けることを特徴
とするラジオ受信回路。
1. A radio receiving circuit in which at least a detection circuit is integrated on an IC substrate, an input terminal to which digital data for applying a reception state of the radio receiving integrated circuit is applied, and the digital data is A radio receiving circuit comprising: a detection circuit for detecting that the voltage has been applied; and a signal processing circuit for performing signal processing on the output signal of the detection circuit according to the output signal of the detection circuit.
【請求項2】前記信号処理回路は、 該検出回路の出力信号に応じて、ミューティング信号を
発生するミューティング信号発生回路と、 前記ミューティング信号に応じて、前記検波回路の出力
信号をミューティングするミューティング回路とにより
構成されることを特徴とする請求項1記載のラジオ受信
回路。
2. The signal processing circuit includes a muting signal generation circuit that generates a muting signal in response to an output signal of the detection circuit, and a muting signal output circuit of the detection circuit in response to the muting signal. 2. The radio receiving circuit according to claim 1, wherein the radio receiving circuit comprises a muting circuit for performing radio communication.
【請求項3】前記信号処理回路は、 前記検波回路の出力信号中のノイズ成分を除去するノイ
ズ除去回路と、 該検出回路の出力信号に応じて、前記ノイズ除去回路に
除去動作させる除去動作制御回路とにより構成されるこ
とを特徴とする請求項1記載のラジオ受信回路。
3. The signal processing circuit, a noise removing circuit for removing a noise component in the output signal of the detection circuit, and a removal operation control for causing the noise removal circuit to perform an operation of removal in accordance with the output signal of the detection circuit. The radio receiving circuit according to claim 1, wherein the radio receiving circuit is constituted by a circuit.
JP14474195A 1995-06-12 1995-06-12 Radio receiving circuit Expired - Fee Related JP3208286B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14474195A JP3208286B2 (en) 1995-06-12 1995-06-12 Radio receiving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14474195A JP3208286B2 (en) 1995-06-12 1995-06-12 Radio receiving circuit

Publications (2)

Publication Number Publication Date
JPH08340266A true JPH08340266A (en) 1996-12-24
JP3208286B2 JP3208286B2 (en) 2001-09-10

Family

ID=15369282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14474195A Expired - Fee Related JP3208286B2 (en) 1995-06-12 1995-06-12 Radio receiving circuit

Country Status (1)

Country Link
JP (1) JP3208286B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011114397A1 (en) * 2010-03-19 2011-09-22 パナソニック株式会社 Receiving apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011114397A1 (en) * 2010-03-19 2011-09-22 パナソニック株式会社 Receiving apparatus

Also Published As

Publication number Publication date
JP3208286B2 (en) 2001-09-10

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