JPH03158016A - Am radio receiver - Google Patents

Abstract

PURPOSE:To improve the characteristic against the cross modulation interference by using a broad band RF signal for automatic channel selection, using a narrow band RF signal in the tuning state and using a control signal deciding the oscillating frequency of a local oscillation circuit obtained from a PLL circuit as a coarse tuning signal. CONSTITUTION:A 1st output signal is generated from a detection circuit 31 in the automatic channel selection state, a selection circuit 22 is driven by a 1st output signal and a non-tuning output signal is fed to a mixer circuit 24. Moreover, since a 2nd output signal is generated from the detection circuit 31 in the mode other than the automatic channel selection, the selection circuit 22 selects the tuning output signal, which is fed to the mixer circuit 24. Furthermore, a control voltage deciding the local oscillating frequency obtained from a PLL circuit 30 is used as a coarse tuning signal and a signal obtained by D/A converting the output signal of a fine tuning circuit 35 is added as a fine tuning signal to change the tuning frequency of an RF tuning circuit 17. Thus, the disturbing signal characteristic, especially the cross modulation disturbing characteristic is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to an AM radio receiver, and particularly to an AM radio receiver that eliminates tracking errors.

(b) Conventional technology As described on page 73 of "Sanyo Semiconductor Data Book 88 Bipolar Integrated Circuits for Car Audio Edition",
AM radio receivers that receive AM broadcast radio waves (RF multiplied signals) transmitted from broadcasting stations are known.As shown in FIG. , an antenna damping circuit (2) that attenuates the RF multiplied signal received by the antenna (1), an FET (3) that amplifies the attenuated RF multiplied signal, and an AGC at the base.
RF including AGC transistor (4) to which signals can be applied
an amplifier circuit (5), an RF tuning circuit (6), and an RF multiplied signal local oscillation circuit (7) obtained from the RF tuning circuit (6)
Mixing circuit (8) that mixes the local oscillation signal obtained from
, an IF amplifier circuit (9) that amplifies the IF (intermediate frequency) signal obtained from the mixing circuit (8), and the IF amplifier circuit (
9) and an AM detection circuit (lO) that performs AM detection on the output signal of step 9).

However, in such an AM radio receiver, the RF
The design must be such that the resonant frequency of the tuning circuit (6) and the resonant frequency of the local oscillation circuit (7) always have a difference equal to the IF signal frequency (450 KHz).
In the M radio receiver, the receiving frequency band (for example, 5
Adjustments are made only at tracking points within the range (from 22 KHz to 1629 KHz) (for example, 600 KHz and 1400 KHz), and at other frequencies the frequency difference will not be exactly 450 KHz.

As a result, in conventional AM radio receivers, the gain of the RF amplifier circuit decreases, and in AM stereo receivers, this also causes a deterioration of the separation date, and furthermore causes variations in stop sensitivity during automatic tuning. There was a problem. The various problems mentioned above can be solved by the first tracking point (
600KHz) lower frequencies (522KHz ~ 60KHz)
0KHz) and the second tracking point (1400KHz)
Hz) higher frequency (1400Ktlz~1629K
Hz) was particularly noticeable.

As one method for solving the above problem, an untuned AM radio receiver as shown in FIG. 3 has been proposed. In Figure 3, the RF multiplied signal amplified by FET (3),
It is applied to the first mixing circuit (8) in an asynchronous state from the collector of the AGC transistor (4). First mixing circuit (8
), the RF multiplied signal is mixed with the output signal of the first local oscillation circuit (7), and the RF multiplied signal is mixed with the output signal of the first local oscillation circuit (8).
An 11th F signal of 0.7M)iz is generated. Said 11th
The F signal is mixed with the output signal of the second local oscillation circuit (12) in the second mixing circuit (11), and a second IF signal of 450 KHz is generated at the output end of the second mixing circuit (11).

The AM radio receiver shown in FIG. 3 uses a double conversion method to increase selectivity and does not have an RF tuning circuit, so it is possible to reduce the tracking error to zero. Furthermore, since the 11th F signal frequency is set to 10.7 MHz, image interference is extremely low.

(c) Problems to be Solved by the Invention However, since the double conversion type AM radio receiver as shown in FIG. 3 does not include an RF tuning circuit, the first mixing circuit (11) contains an interference signal. It has the disadvantage that all signals within the reception band are not applied, and the interfering signal characteristics, especially the intermodulation interfering characteristics, are significantly deteriorated.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and includes an RF receiver that includes a tuned circuit and generates a tuned output signal and an untuned output signal.
a selection circuit that selects one of the tuned output signal and the untuned output signal and applies it to the mixing circuit; and an automatic tuning detection circuit that detects whether the AM radio receiver is in an automatic tuning state. , a field strength detection circuit that detects the field strength of the received signal, a PLL circuit that generates a control voltage for changing the oscillation frequency of the local oscillation circuit during automatic tuning, and a field strength detection circuit that detects the field strength of the received signal; a control signal generation circuit that generates a control signal for stopping the automatic tuning operation; a fine tuning circuit that operates in response to the stop of the automatic tuning operation of the PLL circuit and generates a fine tuning signal; a DA conversion circuit for conversion; an addition circuit for adding a control voltage generated from the PLL circuit and an output signal of the DA conversion circuit and changing the tuning frequency of the tuning circuit according to the output signal; and a change in the tuning frequency. The present invention is characterized in that it includes a maximum value detection circuit that detects the maximum value of the output signal of the electric field strength detection circuit that changes depending on the electric field strength detection circuit.

(*) Effect According to the present invention, in the automatic tuning state, the first
and driving a selection circuit with said first output signal to apply an untuned output signal to the mixing circuit. Therefore, automatic tuning is performed using a non-tuned output signal, and the tracking error can be reduced to zero.

Further, in a state other than the automatic tuning state, for example, in a tuning state, the second output signal is generated from the detection circuit, so the selection circuit selects the tuning output signal and applies it to the mixing circuit. Therefore, in the tuned state, reception can be performed using the RF multiplied signal whose band is limited by the RF tuning circuit, and interference characteristics such as cross modulation can be improved.

Furthermore, the control voltage for determining the local oscillation frequency obtained from the PLL circuit is added as a coarse tuning signal, and the signal obtained by DA converting the output signal of the fine tuning circuit is added as a fine tuning signal to determine the tuning frequency of the RF tuning circuit. Because we are consulting on changes, DA
The bit length of the conversion circuit can be shortened, and the DA
It is possible to improve the linearity of the conversion circuit.

(13) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention.
(14) is an RF amplifier circuit including an FET (15) for amplifying the RF signal and an AGO transistor (16) for applying AGC to the RF signal;
(17) is an RF tuning circuit connected to the collector of the AGC transistor (16); (18) is a resistor connected in parallel between the RF tuning circuit (17) and the power source DVCe; (19) is a capacitor (
a first RF output terminal connected via (20), (21)
is a second RF output terminal connected to one end of the resistor (18) via a capacitor (44), and (22) is the R obtained at the first and second RF output terminals (19) and (21).
A selection circuit for selecting one of the F output signals, (23) is the first
The local oscillation circuit (24) is a first circuit that mixes the RF output signal obtained from the selection circuit (22) and the output signal of the first local oscillation circuit (23) to generate a first IF signal of 10.7 MHz. Mixing circuit, (25) is the second local oscillation circuit,
(26) is the eleventh filter that has passed through the IF filter (27).
a second F signal that mixes the F signal and the output signal of the second local oscillation circuit (25) to generate a 21st F signal of 450 KHz;
a mixing circuit (28) is an IF that amplifies the second IF signal;
The amplifier circuit (29) is an AM detection circuit that detects the amplified IF multiplied signal AM. 30) is a PLL circuit for determining the tuning frequency of the RF tuning circuit <17> and the oscillation frequency of the first local oscillation circuit (23);
An automatic tuning detection circuit detects that the L circuit (30) is in the automatic tuning state and generates a control signal for switching the selection circuit (22), and (32) is an electric field that detects the electric field strength of the received signal. The intensity detection circuit (33) is an AD conversion circuit that AD converts the output signal of the electric field intensity detection circuit (32).
4) is a stop circuit that stops the automatic tuning operation of the PLL circuit (30) in response to the output signal of the electric field strength detection circuit (32), and (35) is a stop circuit that stops the automatic tuning operation of the PLL circuit (30). A fine adjustment circuit that generates a fine adjustment signal; (36) a DA conversion circuit that converts the output signal of the fine adjustment circuit (35) from DA to analog;
and (37) are addition circuits that add the control voltage generated from the PLL circuit (30) and the output signal of the DA conversion circuit (36).

Next, the operation will be explained. R received by antenna (13)
F-fold signal, FET (15) via capacitor (38)
The signal is applied to the gate of the FET (15) and amplified by the FET (15).

Amplified RF multiplied signal, AGCI-transistor (16)
is taken out from the RF tuning circuit (17) serving as a load through the emitter-collector path of the first RF output terminal (19).
is derived. At that time, since the tuning frequency of the RF tuning circuit (17) is determined according to the capacitance of the variable capacitance diode disposed therein, the first RF output terminal (17)
The RF multiplied signal obtained at the collector of the AGC transistor (16) becomes a narrow band (hereinafter this signal is referred to as the narrowband RF multiplied signal), and the RF multiplied signal obtained at the collector of the AGC transistor (16) becomes a narrow band.
8) and is taken out from one end of the second RF output terminal (21).
is derived.

Since this RF multiplied signal is not subject to band restrictions, it has a very wide band (hereinafter, this signal will be referred to as a wideband RF multiplied signal).

Now, if you operate the automatic tuning button (not shown) located on the AM radio receiver to perform automatic tuning, the PL
The L circuit (30) enters the automatic tuning state and starts tuning. Automatic tuning by the PLL circuit (30) is performed using the PLL circuit (30).
The oscillation frequency of the local oscillation circuit (23) is changed in accordance with the output signal of the local oscillation circuit (23), and the change in the oscillation frequency is stopped when the presence of a station is detected. Detailed explanation will be omitted.

When the PLL circuit (30) enters the automatic tuning state, the automatic tuning state detection circuit (31) operates and supplies a control signal rH to the selection circuit (22). Therefore, the selection circuit (2
2) is in the first state, and the second RF output terminal (21)
The broadband RF multiplied signal obtained in the above is applied to the first mixing circuit (24). The first mixing circuit (24) mixes the wideband RF multiplied signal with the output signal of the first local oscillation circuit (23) to generate one signal.
A first IF signal of 0.7 MHz is created.

At that time, the output signal frequency of the first local oscillation circuit (23) is determined according to the control signal applied from the PLL circuit 30 to the first local oscillation circuit (23) via the low-pass filter (39). The control signal changes continuously according to the inter-station frequency during automatic channel selection. The output IF multiplied signal of the first mixing circuit (24) is applied to the second mixing circuit (26) via the 1F tuning circuit (27), and the second local oscillation circuit (25)
is mixed with the output signal of The second IF signal of 450 KHz generated from the second mixing circuit (26) is amplified by an IF amplifier circuit (28) including an IF tuning circuit, and subjected to AM detection by an AM detection circuit (29). Therefore, the output terminal (40
), an AM detection output signal of the received signal is obtained and can be transmitted to the subsequent stage.

When the value of the output control signal of the PLL circuit (30) reaches a predetermined value and the output signal frequency of the first local oscillation circuit (23) reaches a predetermined value, the first mixing circuit <24) to 10,7
If the 11th F signal of MHz is generated, the first I
The F signal passes through the IF tuning circuit (27) and is applied to the second mixing circuit (26). The level of the first IF signal is
Since it is proportional to the electric field strength of the received signal, the electric field strength of the received signal can be detected by applying the 11th F signal to the electric field strength detection circuit (32). The output signal indicating the electric field intensity generated from the electric field intensity detection circuit (32) is
It is applied to the stop signal generation circuit (34) and can be compared with a reference voltage. If the output signal is higher than the reference voltage, a stop signal is generated from the stop signal generation circuit (34), and the tuning operation of the PLL circuit (30) is stopped. If the output signal is smaller than the reference voltage, no stop signal is generated and the PLL circuit (30) receives the next station.
Change the value of the output control signal.

When a certain station is received by the automatic tuning operation, the output change of the PLL circuit (30) stops in response to the output signal of the stop signal generation circuit (34), and the tuned state of the receiver is fixed. be done. In addition, since the automatic tuning state of the PLL circuit (30) is stopped, the automatic tuning state detection circuit (31)
The output signal becomes r L , and the selection circuit (22) is switched to the second state in which it selects the narrowband RF multiplied signal obtained at the first RF output terminal (19). Furthermore, the PLL circuit (
30) has stopped automatic tuning, the fine adjustment circuit (
35), and the fine adjustment circuit (3S) starts fine adjustment operation.

The control voltage applied from the PLL1 path (30) to the first local oscillator circuit (23) is applied to the positive input terminal of the adder circuit (37) via the adjustment resistor (43). Therefore, the RF tuning circuit (■) is roughly tuned by the output signal generated from the adder circuit (rainbow) in response to the control voltage. On the other hand, the fine adjustment circuit (35) is configured to generate, for example, a 6-bit digital signal when it starts operating, and the 6-bit digital signal is configured to automatically change sequentially one step at a time. There is. Therefore, 64 digital signals are sequentially generated from the fine adjustment circuit (35). This digital signal is subjected to DA conversion by a DA conversion circuit (36) and then applied to a negative input terminal of an addition circuit (37). Therefore, the output terminal of the adder circuit (37) is connected to the PLL circuit (30
) and the fine adjustment signal obtained from the DA conversion circuit (36) are obtained, and this sum signal is applied to the RF tuning circuit (17).

Depending on the analog signal generated from the adder circuit (37),
The tuning frequency of the RF tuning circuit (17) changes, and the output signal level of the field strength detection circuit (32) changes accordingly. The output signal level is converted into a digital signal by an AD conversion circuit (33) and stored in a memory (41). The storage operation in this memory (41) is performed by the fine adjustment circuit (
35) for all 64 digital signals, and the output digital signals of the AD conversion circuit (33) are stored in 64 addresses of the memory (41), respectively. When all the digital signals are stored in the memory (41), the output signal of the fine adjustment circuit (35) stops changing, and the Value discrimination is the maximum value discrimination circuit (4
2) is carried out. This is an operation of selecting the tuning frequency that provides the maximum output signal when the tuning frequency of the RF tuning circuit (17) is changed. When the maximum value is selected, the fine adjustment circuit (35) is controlled by the output signal of the maximum value discrimination circuit (42) so that a digital signal corresponding to the maximum value is generated from the fine adjustment circuit (35). As a result, the tuning frequency of the RF tuning circuit (17) becomes a predetermined value, and the AM radio receiver becomes in the best reception state.

In Figure 1, a memory (41), a maximum value determination circuit (
42) and the fine adjustment circuit (35) can be formed by, for example, a microcomputer, and by appropriately creating program software, the fine adjustment circuit (35) and the 64
The output digital signals of the AD conversion circuit (33) can be easily generated at the addresses of 64 memories (41) according to each of the digital signals.

Further, the maximum value discriminating circuit (42) includes, for example, a memory (42).
1) Compare the magnitude of the digital signal stored at address N in the memory (41) with the digital signal stored at address N+1 in the memory (41), and compare the dog digital signal with the digital signal at address N+2. First, address M of the memory (41) where the largest digital signal is stored.
Establish. Thereafter, by selecting the digital signal corresponding to the address M of the memory (41) and generating it from the fine tuning circuit (35), the tuning frequency of the RF tuning circuit (17) becomes the optimum value.

(G) Effects of the Invention As described above, according to the present invention, automatic tuning can be performed using broadband R
Since this can be done using the F-flaw signal, the tracking error can be reduced to approximately zero. Furthermore, in the tuned state, since a narrowband RF flaw signal is used, interference characteristics such as cross-modulation interference can be significantly improved. Furthermore, since the station is tuned using the coarse tuning signal and the fine tuning signal, more accurate tuning can be achieved.

Furthermore, the control signal for determining the oscillation frequency of the local oscillation circuit obtained from the PLL circuit is used as the coarse adjustment signal, and the signal obtained by DA converting the output signal of the fine adjustment circuit is used as the fine adjustment signal. There is no need for a DA conversion circuit for the key, so the bit length of the DA conversion circuit can be shortened and linearity can be improved.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, and FIGS. 2 and 3 are circuit diagrams showing a conventional AM radio receiver. (17)...RF tuning circuit, (22)...selection circuit, 23)...first local oscillation circuit, 24).
...First mixing circuit, (30)...PLL circuit, (3
1)...Automatic channel selection detection circuit, (32)...Field strength detection circuit, (33>...AD conversion circuit, (35)
... Fine adjustment circuit, (36) ... DA conversion circuit, (3
z)...addition circuit, (41)...memory (
42)...Maximum value discrimination circuit.

Claims (2)

[Claims] (1) an RF circuit that includes a tuned circuit and generates a tuned output signal and an untuned output signal; a selection circuit that selects one of the tuned output signal and the untuned output signal and applies it to a mixing circuit; and an AM radio. An automatic tuning detection circuit that detects whether the receiver is in the automatic tuning state, an electric field strength detection circuit that detects the electric field strength of the received signal, and an electric field strength detection circuit that changes the oscillation frequency of the local oscillation circuit during automatic tuning. a PLL circuit that generates a control voltage for the automatic tuning operation; a control signal generation circuit that generates a control signal for stopping the automatic tuning operation according to the output signal of the electric field strength detection circuit; Works according to the stop,
A fine adjustment circuit that generates a fine adjustment signal, a DA conversion circuit that converts the fine adjustment signal into a digital signal, and a control voltage generated from the PLL circuit and an output signal of the DA conversion circuit are added, and the output signal is used to control the tuning circuit. An AM radio receiver comprising: an addition circuit that changes the tuning frequency; and a maximum value detection circuit that detects the maximum value of the output signal of the field strength detection circuit that changes in accordance with the change in the tuning frequency. (2) The fine adjustment circuit generates a 6-bit digital fine adjustment signal, the DA conversion circuit converts the digital fine adjustment signal into an analog signal, and the addition circuit generates the analog signal as a fine adjustment signal from the PLL circuit. 2. The AM radio receiver according to claim 1, wherein the control voltage for the AM radio receiver is added as a coarse adjustment signal.