JPH0833437B2 - Integrated circuit test method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an integrated circuit test method applicable to an LSI or the like.

[Prior Art and its Problems] Conventionally, various test pattern generators have been devised, but in a generator of random number input, a device for generating a test pattern by directly inputting generated random numbers or by uniform conversion is available. Mainly proposed. For example, in the case of a circuit with 24 inputs, when a random number is AD-converted and generated as a test pattern, a set of 24 "1" s or "0" s is formed as one test pattern. Therefore, the number of "1" s in that set (hereinafter abbreviated as "weight") is plotted on the horizontal axis, and the occurrence probability corresponding to that "weight" is plotted on the vertical axis, and 3000 sets of test patterns are generated by the uniform random number generator. The distribution when it is generated is shown in FIG.

From the figure, it can be seen that the distribution is a binomial distribution as long as the input is a uniform random number.

Further, when the uniform conversion, that is, the appearance probabilities of "1" and "0" are simply changed, it is nothing but the distribution obtained by moving the distribution in FIG. 1 in the horizontal axis direction.

However, in the above method, the distribution of the "weight" is 2
When the test pattern is generated by generating as few test patterns as possible because of the term distribution, even if it is desired to generate patterns with various weights, it is difficult to generate patterns with limited probability distribution. For example, when 20 "0" and 4 "1" test patterns occur in the binomial distribution, the probability of occurrence is about 0.03%, that is, the test patterns appear only three times in 10,000 patterns. Even when uniform conversion is applied, the same can be said for the “weight” in the reverse direction after the parallel movement, and this tendency becomes more remarkable as the number of inputs increases. For example, when it is configured with an AND gate and an OR gate, it cannot be applied in the past.

[Object of the Invention]

An object of the present invention is to provide an integrated circuit test apparatus that can complete testing of an integrated circuit such as an AND / OR gate system in a short time.

[Outline of Invention]

That is, the present invention comprises a random number generation device, a random number distribution conversion device that controls the distribution of the generated random numbers, and a test pattern generation device that outputs a specific logical value with a predetermined probability according to this random number distribution. Provided is a test method for an integrated circuit, which is characterized in that a test pattern having a logical value appearance probability having a concave distribution in the weight axis direction is generated and input to the integrated circuit.

〔The invention's effect〕

That is, according to the present invention, by generating a logical value having a concave probability distribution, the test time of the integrated circuit can be significantly shortened. This is very different from the conventional device that can obtain only the binomial distribution that is translated.

For example, with respect to the AND / OR gate circuit, a large "1" appearance probability can be generated at both ends of the weight, and the test can be completed at a significantly higher speed than the conventional method.

Example of Invention

An embodiment of the present invention will be described in detail below with reference to the drawings. To explain the outline of the device, first prepare a conversion function,
This is defined as G ₁ (x). Here specifically And

Here, a uniform random number is generated between -1 and 1, and (1)
Converting by the formula, and letting it be P, that is, the generated random number is γ ₀ , Becomes This is the reference value.

Furthermore, as a conversion function Define and prepare. (Α is a control parameter; which will be described later) and subsequently generate a test pattern sequence using uniform random numbers. If the random numbers generated with the number of elements of the test pattern sequence being 24 are γ ₁ to γ ₂₄ and the converted pattern elements Q _{1 to} Q ₂₄ , Becomes

Next, according to (2), the test pattern is generated from the determined Q _{1 to} Q ₂₄ by the determined P and (4). The method is that if the generated test patterns are T _{1 to} T ₂₄ , Is defined. By repeating (1) to (5) according to this method, test patterns are generated one after another.

Here, a supplementary explanation will be given about α, which has come out in the equation (3). α is a parameter for changing the distribution shape as shown in FIG. FIG. 2 shows an example in which α is changed. The figure shows α = 10.0 (a), α = 1.0 (b), α = 0.1
(C) is shown. As can be seen from Fig. 2, the center of the probability distribution (peak part) can be changed by changing the distribution shape.
, And the magnitude relationship between both ends and the ratio thereof are controlled.

FIG. 3 shows an example of the apparatus. In Figure 3, a uniform random number generator
The uniform random number group γ ₀ , which is input as a basic input from 10
γ ₁ , ... γ ₂₄ and the external parameters α and β input from the external data input circuit 11 are input to the random number distribution conversion device, and the input γ ₀ is further input by the conversion function device 13 of the formula (1) type. γ _{1 to} γ ₂₄ are converted and output by the conversion function device 14 of the formula (3) type. This output sequence P, Q ₁ , Q ₂ ,
, Q ₂₄ is further input to the test pattern generator 15, and the final test patterns T _{1 to} T ₂₄ are generated by the conversion of the equation (5) type.

 The above flow chart is shown in FIG.

Furthermore, the test patterns T _{1 to} T ₂₄ are input to the test circuit 16. PI ₁ , PI ₂ , ..., PIn are their input terminals. If the circuit under test is an AND, OR gate, do the following.

Explaining the 2-input AND gate beforehand, the input is "00",
The output is "0" for the three patterns "01" and "10". And the output becomes "1" only for the input "11". That is, the output "0" appears with a probability of 3/4. In the case of a 2-input OR gate, on the contrary, only the input "00" outputs "1".

Therefore, the above test circuit is mainly used for AND system and OR of the same ratio.
When it is composed of the system logic circuit, for all input pins
Α is determined from the occupation ratio of the AND system and the OR system. For example, the second
If a test pattern is generated with a "1" appearance probability distribution such as α = 0.1 in the figure, the test circuit can be tested efficiently, and in an extremely short time compared to when α = 10.0 or α = 1.0. The test ends. When the AND system and the OR system have different ratios, α may be determined so as to cut between them.

The present invention is not limited to the above embodiment, and various conversion functions can be used, for example. Also, the random numbers are not limited to those that generate -1 to 1 as numerical values,
The logic "1" may be generated at random time intervals and the time intervals may correspond to random numbers.

Further, the binomial distribution may be moved in parallel along the weight axis with time. If the movement speeds are equal, the appearance probability is uniform, but at the center of weight, it is fast, and if you move slowly back and forth at both ends, you can obtain an efficiency distribution with a high appearance probability of bit patterns with many "1" s and "0" s. Become.

[Brief description of drawings]

Fig. 1 shows the weight on the horizontal axis, the probability on the vertical axis, and the "weight" -probability distribution curve of the test pattern generated by 24 uniform random numbers for the pattern elements (the total number of "1" s and "0" s). Figure,
FIG. 2 is a diagram showing a “weight” -probability distribution curve of a test pattern generated by changing only α, FIG. 3 is an apparatus configuration diagram of the present invention, and FIG. 4 is a flowchart diagram of the present invention.

Claims (1)

[Claims] 1. A random number generation device, a random number distribution conversion device for controlling the distribution of random numbers generated based on a conversion function whose parameter is the envelope shape of an occurrence probability distribution with respect to the number of times of occurrence of a predetermined logical value, and this random number. A test pattern generator for outputting a specific logical value with a predetermined probability according to the distribution, and having an occurrence probability distribution having a concave envelope with respect to the number of occurrences by setting the parameter to a predetermined value. A test method for an integrated circuit, which comprises generating a test pattern and inputting the test pattern to the integrated circuit.