JPH0832895A - Receiver - Google Patents

Receiver

Info

Publication number
JPH0832895A
JPH0832895A JP18665594A JP18665594A JPH0832895A JP H0832895 A JPH0832895 A JP H0832895A JP 18665594 A JP18665594 A JP 18665594A JP 18665594 A JP18665594 A JP 18665594A JP H0832895 A JPH0832895 A JP H0832895A
Authority
JP
Japan
Prior art keywords
amplifier
circuit
agc
control voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18665594A
Other languages
Japanese (ja)
Other versions
JP3355040B2 (en
Inventor
Ryoichi Kiyoi
良一 清井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alpine Electronics Inc
Original Assignee
Alpine Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alpine Electronics Inc filed Critical Alpine Electronics Inc
Priority to JP18665594A priority Critical patent/JP3355040B2/en
Publication of JPH0832895A publication Critical patent/JPH0832895A/en
Application granted granted Critical
Publication of JP3355040B2 publication Critical patent/JP3355040B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Circuits Of Receivers In General (AREA)
  • Television Receiver Circuits (AREA)

Abstract

PURPOSE:To provide a receiver provided with an AGC circuit with excellent spurious response. CONSTITUTION:In addition to an amplifier section 7 and an RFAGC section 8 as an AGC circuit used in a conventional receiver, an AGC circuit consisting of a differential amplifier circuit 9 comprising a differential amplifier, a diode 10, a capacitor 11, and a DC amplifier section 12 is added in parallel and an AGC control voltage obtained therefrom is applied to the RF amplifier section 2 to detect and amplify a very small AC component generated when spurious radiation is increased as a control voltage thereby controlling effectively the gain of the RF amplifier section 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、特にTV受像機のAG
C回路(自動利得制御回路)を備えた受信機に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a receiver including a C circuit (automatic gain control circuit).

【0002】[0002]

【従来の技術】TV受像機を含む受信機に入力する電波
には、諸事情により強弱があり、TV受像機において
は、チャンネルを切り換えるとチャンネル毎に画面のコ
ントラストが変わったり、航空機が付近を通過すること
で受信点の電界強度が変動し、画面が不安定になったり
する。そこで受像機では、受信電波の強弱やその変動に
応じてチューナやVIF増幅回路の利得を自動的に制御
し、常に一定のレベルの映像検波出力を得られるように
していて、これをAGC回路(自動利得制御回路)と呼
んでいることは公知である。
2. Description of the Related Art Radio waves input to receivers including TV receivers have strengths depending on various circumstances. In TV receivers, when the channels are switched, the contrast of the screen changes for each channel, and the aircraft is in the vicinity. The electric field strength at the receiving point fluctuates as it passes, and the screen becomes unstable. Therefore, in the receiver, the gain of the tuner and the VIF amplifier circuit is automatically controlled according to the strength of the received radio wave and its fluctuation so that the video detection output of a constant level can always be obtained. It is known to call it an automatic gain control circuit).

【0003】このAGC回路に使用される制御電圧は、
TV受像機においては、検波した映像信号から有害なパ
ルス性の雑音を除去し、その出力からAGC電圧を作り
出し、この制御電圧をRF増幅段あるいはVIF段に加
えてその利得を制御しているものである。
The control voltage used in this AGC circuit is
In TV receivers, harmful pulse noise is removed from the detected video signal, an AGC voltage is produced from the output, and this control voltage is applied to the RF amplification stage or VIF stage to control the gain. Is.

【0004】[0004]

【発明が解決しようとする課題】一方、受信時の妨害波
の中に、いわゆるスプリアスがあり、大入力信号を受信
した場合等に生じやすいことも公知であるが、極端な場
合には本来同調していないはずの局を受信したり、また
オートシーク等の局検出の動作が誤動作を起こしたりす
る問題があり、特に車載用機器においては、機器を載せ
た車両が移動する関係で送信側に接近する可能性、すな
わち、大入力信号を受信する機会が多く、良好なスプリ
アスレスポンスが必要となる。
On the other hand, it is known that there is a so-called spurious in the interfering wave at the time of reception, which tends to occur when a large input signal is received, but in an extreme case, the tuning is originally performed. There is a problem that a station that should not have been received may be received, or the operation of station detection such as auto seek may cause a malfunction. The possibility of approaching, that is, the chance of receiving a large input signal is large, and good spurious response is required.

【0005】しかるに従来のAGC回路では、時定数に
よって特性が規定され、スプリアスが発生する状態にな
っても効果的にこれを除去することが困難なものであっ
た。本発明は、このような問題を解決し、スプリアス除
去に効果のあるAGC回路を提供することを目的として
いる。
However, in the conventional AGC circuit, the characteristics are defined by the time constant, and it is difficult to effectively remove spurious even in a state where spurious is generated. It is an object of the present invention to solve such a problem and provide an AGC circuit effective in removing spurious.

【0006】[0006]

【課題を解決するための手段】上記の課題は本発明によ
れば、後段の出力を検波し処理して制御電圧を得て、該
制御電圧を前段の増幅器に加え、該前段の増幅器の利得
を増減させるAGC回路を備えた受信機において、前記
系列の回路と並列に、前記検波出力を入力される差動増
幅器と、前記差動増幅器の出力を整流する整流回路と、
前記整流回路の出力を増幅する直流増幅器とよりなる直
列回路を設け、前記直流増幅器の出力を制御電圧として
前記前段の増幅器の利得を増減させるAGC回路を備え
たことで解決する。
SUMMARY OF THE INVENTION According to the present invention, the above-mentioned problem is obtained by detecting and processing the output of the subsequent stage to obtain a control voltage, adding the control voltage to the amplifier of the preceding stage, and gain of the amplifier of the preceding stage. In a receiver including an AGC circuit for increasing / decreasing, the differential amplifier receiving the detection output in parallel with the series circuit, and a rectifying circuit for rectifying the output of the differential amplifier,
The problem is solved by providing a series circuit including a DC amplifier that amplifies the output of the rectifier circuit, and providing an AGC circuit that increases or decreases the gain of the amplifier at the preceding stage by using the output of the DC amplifier as a control voltage.

【0007】[0007]

【作用】従来のAGC回路と並列に設けられた、検波出
力を入力される差動増幅器は、受信信号中のスプリアス
成分の増加を、AGC制御電圧の微小なDC成分の変
動、即ちAC成分の増加として検出し、これを増幅して
付加されたAGC制御電圧として前段の増幅器に加え、
その利得を増減させ、混信、誤動作を防止する。
The differential amplifier, which is provided in parallel with the conventional AGC circuit and receives the detection output, increases the spurious component in the received signal and suppresses the minute fluctuation of the DC component of the AGC control voltage, that is, the AC component. It is detected as an increase, and this is amplified and added to the preceding amplifier as an added AGC control voltage,
Increase or decrease the gain to prevent interference and malfunction.

【0008】[0008]

【実施例】図1は本発明の回路のブロック構成図であ
る。1はアンテナ、2はRF増幅部であり、アンテナ1
で受けた信号を増幅するとともに後述のAGC制御電圧
を加えられてその利得を制御されている。3は局部発振
器4の出力を加えられてIF信号を出力する混合部、5
はIF増幅部、6はIF信号を検波する検波部である。
該検波部6の出力はビデオ或いはサウンド信号として、
図示しない次段へ送られる。
1 is a block diagram of a circuit of the present invention. 1 is an antenna, 2 is an RF amplifier, and the antenna 1
The signal received at is amplified and an AGC control voltage, which will be described later, is applied to control the gain. Reference numeral 3 is a mixer for adding the output of the local oscillator 4 and outputting an IF signal.
Is an IF amplifier, and 6 is a detector for detecting an IF signal.
The output of the detection unit 6 is a video or sound signal,
It is sent to the next stage not shown.

【0009】前記検波部6の出力は、前記次段へ入力さ
れるのと並行して、以下のAGC回路に送られる。即
ち、7は検波出力を増幅する増幅部、8は前記増幅部7
の出力を処理してAGC制御電圧を作り出すRFAGC
部であり、受信機がTV受像機の場合には、同期信号を
利用する先頭値形AGC、或いはキード形AGCなどが
目的によって使用され、この出力は直流のAGC制御電
圧として前記RF増幅部2に加えられて、その利得を制
御している。以上の回路部分は公知であり、従来より使
用されている。
The output of the detector 6 is sent to the following AGC circuit in parallel with the input to the next stage. That is, 7 is an amplification unit for amplifying the detection output, and 8 is the amplification unit 7
RF AGC that processes the output of the AGC to generate the AGC control voltage
When the receiver is a TV receiver, a leading value type AGC utilizing a synchronization signal or a keyed type AGC is used for the purpose, and its output is used as a DC AGC control voltage by the RF amplification section 2 In addition to controlling its gain. The above circuit parts are known and have been used conventionally.

【0010】9は前記検波部6の出力を入力とする差動
増幅器からなる差動増幅部で、微小信号を検出し増幅す
る特性を有する。10はダイオード、11はコンデンサ
であり、前記差動増幅部9の出力を整流し平滑化する。
12は前記平滑化された直流電圧を増幅するDC増幅部
であり、その出力は前記RF増幅部2へ加えられて、そ
の利得を制御する。
Reference numeral 9 is a differential amplification section which is composed of a differential amplifier which receives the output of the detection section 6 as an input, and has a characteristic of detecting and amplifying a minute signal. Reference numeral 10 is a diode, and 11 is a capacitor, which rectifies and smoothes the output of the differential amplifier 9.
Reference numeral 12 is a DC amplification unit that amplifies the smoothed DC voltage, and its output is added to the RF amplification unit 2 to control its gain.

【0011】以上の構成の回路において、受信信号中の
スプリアス分が増加すると、図2に示したようにIF信
号を検波して得られた、本来DC成分のみであるべきA
GC制御電圧中に、非直線成分のAC成分が増加する。
このAC成分を前記差動増幅器9は検出して増幅し、ダ
イオード10、コンデンサ11により整流、平滑化し
て、さらにDC増幅部12によって増幅した上で、RF
増幅部2に対し、AGC制御電圧として加え、その利得
を制御する。
In the circuit having the above structure, when the spurious component in the received signal increases, the A component originally obtained by detecting the IF signal as shown in FIG.
The AC component of the non-linear component increases during the GC control voltage.
The differential amplifier 9 detects and amplifies this AC component, rectifies and smoothes it by a diode 10 and a capacitor 11, and further amplifies it by a DC amplification unit 12, and then RF.
The gain is controlled by applying it as an AGC control voltage to the amplifier 2.

【0012】[0012]

【発明の効果】以上のように本発明によれば、従来のA
GC回路に加えて本発明のバイパス的なAGC回路を付
加することにより、受信信号中にスプリアス成分が増加
した場合に、従来からあるAGC回路よりも利得の大き
いAGC制御電圧を得ることが可能であり、この制御電
圧をRF増幅段に加え、その利得を減少させることで、
混信、オートシークの誤動作等を防止しうるもので、特
に車載用機器等、送信側に接近することの多い機器に使
用して、効果が大きいものである。
As described above, according to the present invention, the conventional A
By adding the bypass-type AGC circuit of the present invention in addition to the GC circuit, it is possible to obtain an AGC control voltage having a larger gain than the conventional AGC circuit when the spurious component increases in the received signal. Yes, by applying this control voltage to the RF amplification stage and reducing its gain,
It can prevent interference, malfunction of auto-seek, etc., and is particularly effective when used in equipment such as in-vehicle equipment that often approaches the transmission side.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例の回路のブロック構成図であ
る。
FIG. 1 is a block configuration diagram of a circuit according to an exemplary embodiment of the present invention.

【図2】AGC制御電圧の波形図である。FIG. 2 is a waveform diagram of an AGC control voltage.

【符号の説明】[Explanation of symbols]

1 アンテナ 2 RF増幅部 3 混合部 4 局部発振部 5 IF増幅部 6 検波部 8 RFAGC部 9 差動増幅部 10 ダイオード 11 コンデンサ 12 DC増幅部 DESCRIPTION OF SYMBOLS 1 antenna 2 RF amplification section 3 mixing section 4 local oscillation section 5 IF amplification section 6 detection section 8 RFAGC section 9 differential amplification section 10 diode 11 capacitor 12 DC amplification section

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 後段の出力を検波し処理して制御電圧を
得て、該制御電圧を前段の増幅器に加え、該前段の増幅
器の利得を増減させるAGC回路を備えた受信機におい
て、前記系列の回路と並列に、前記検波出力を入力され
る差動増幅器と、前記差動増幅器の出力を整流する整流
回路と、前記整流回路の出力を増幅する直流増幅器とよ
りなる直列回路を設け、前記直流増幅器の出力を制御電
圧として前記前段の増幅器の利得を増減させるAGC回
路を備えていることを特徴とする受信機。
1. A receiver comprising an AGC circuit for detecting and processing an output of a subsequent stage to obtain a control voltage, applying the control voltage to an amplifier of the previous stage, and increasing or decreasing the gain of the amplifier of the previous stage, In parallel with the circuit of (1), a series circuit including a differential amplifier that receives the detection output, a rectifying circuit that rectifies the output of the differential amplifier, and a DC amplifier that amplifies the output of the rectifying circuit is provided. A receiver comprising an AGC circuit for increasing / decreasing the gain of the preceding amplifier by using the output of the DC amplifier as a control voltage.
JP18665594A 1994-07-15 1994-07-15 Receiving machine Expired - Fee Related JP3355040B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18665594A JP3355040B2 (en) 1994-07-15 1994-07-15 Receiving machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18665594A JP3355040B2 (en) 1994-07-15 1994-07-15 Receiving machine

Publications (2)

Publication Number Publication Date
JPH0832895A true JPH0832895A (en) 1996-02-02
JP3355040B2 JP3355040B2 (en) 2002-12-09

Family

ID=16192376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18665594A Expired - Fee Related JP3355040B2 (en) 1994-07-15 1994-07-15 Receiving machine

Country Status (1)

Country Link
JP (1) JP3355040B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006067316A (en) * 2004-08-27 2006-03-09 Nippon Antenna Co Ltd Amplifier
JP2009122204A (en) * 2007-11-12 2009-06-04 Nippon Telegr & Teleph Corp <Ntt> Sound volume control unit, method, and program
JP2018148322A (en) * 2017-03-02 2018-09-20 古河電気工業株式会社 Transmitting and receiving system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006067316A (en) * 2004-08-27 2006-03-09 Nippon Antenna Co Ltd Amplifier
JP2009122204A (en) * 2007-11-12 2009-06-04 Nippon Telegr & Teleph Corp <Ntt> Sound volume control unit, method, and program
JP2018148322A (en) * 2017-03-02 2018-09-20 古河電気工業株式会社 Transmitting and receiving system

Also Published As

Publication number Publication date
JP3355040B2 (en) 2002-12-09

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