JPH08327670A - Signal detector - Google Patents

Abstract

PURPOSE: To obtain a signal detector which can detect a signal accurately with low power consumption. CONSTITUTION: A signal to be measured is taken out through an electrode 100 and integrated by an integration circuit 300 through a capacitive element 200 before being fed to a comparator 500 and a peak hold circuit 400. The minimum value (or maximum value) of integration signal, received after resetting the peak hold circuit 400, is compared with an integration signal by means of the comparator 500. When the minimum value (or maximum value) of integration signal does not appear after resetting, the value of matches the value of peak signal and the output from the comparator 500 is varied to a first value upon occurrence of the minimum value (or maximum value) of integration signal. A one-shot circuit 600 detects the variation and closes a switch element 330 temporarily. Consequently, the minimum value is brought to O level and a displacement in the positive direction from the minimum value is subsequently outputted in the form of a signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal detecting device for detecting a signal generated in an object to be measured, and more particularly to a signal detecting device for detecting a signal (such as myoelectric signal or electrocardiographic signal) generated in a living body. It is about.

[0002]

2. Description of the Related Art Conventionally, there has been devised a signal detecting device for detecting a signal (such as myoelectric signal or electrocardiographic signal) generated in a living body. In recent years, against the background of the progress of integrated circuit technology, proposals have been made for further miniaturization by integrating the discrete circuit up to that point into an integrated circuit. One such proposal is, for example, "K. Najafi et al., IEE
E Journal of Solid-State Circuits, Vol.SC-21, No.
6, Dec. 1986, pp1035-1044 '', `` MSJ Steyaert et a
l., IEEE Journal of Solid-State Circuits, Vol.SC-2
2, No. 6, Dec. 1987, pp1163-1168 ", and" J. Ji et
al., IEEE Journal of Solid-State Circuits, Vol.2
7, No. 3, Mar. 1987, pp1163-1168 ”and the like. These devices are either NMOS or CM
Based on the OS circuit technology, low-frequency components ranging from DC to several Hz in the voltage signal generated at the biological electrode are removed while being amplified by the filter technology.

However, if such a circuit system is adopted, the circuit structure of the part constituting the high-pass filter becomes complicated, and the power consumption increases, which is incompatible with the demand for low power consumption when it is embedded in the body. However, there has always been a problem that the output waveform tends to be distorted.

In order to solve the above problems, a method of adopting a DC amplifier to form a circuit has been proposed (“Sudo et al., IEICE Transactions D, Vol. J”).
70-D, No. 12, pp 2754-2761, 19
(December 1987) and the like) largely depend on the matching characteristics, and are easily affected by offset variations, and it is necessary to individually perform offset adjustment by inserting a resistor from the outside.

The present invention has been made in view of the above, and an object of the present invention is to provide a signal detecting apparatus which detects a signal with low power consumption and with high accuracy.

[0006]

A first signal detecting device of the present invention is configured such that (a) an electrode for taking out a signal to be measured and (b) a signal to be measured taken out by an electrode are inputted to one terminal, The first capacitive element that outputs the AC component of the signal under measurement from the other terminal, and (c) the reference potential is input to the positive input terminal and the signal output from the first capacitive element is input to the negative input terminal. An operational amplifier, a second capacitance element having one terminal connected to the negative input terminal and the other terminal connected to the output terminal of the operational amplifier, and one terminal connected to the negative input terminal, and the output of the operational amplifier The other terminal is connected to the terminal, and an integration circuit including a switch element that is in an open state when the integration non-operation instruction signal is insignificant and is in a closed state when the integration non-operation instruction signal is significant, d) Integrated signal output from the integrating circuit The peak hold circuit that outputs the minimum value of the integrated signal that has been input and that has been input after reset as a peak value, and (e) the integrated signal and the peak signal that is output from the peak hold circuit are input, and the value of the integrated signal is A comparator circuit that outputs a signal having a first value when the value is larger than the value of the peak signal, and outputs a signal having a second value when the value of the integrated signal is less than or equal to the value of the peak signal; ) Inputting the comparison signal output from the comparison circuit, detecting a change from the second value to the first value of the comparison signal, changing from the non-significant to the significant, and then changing from the significant to the non-significant And a one-shot circuit that outputs the integration non-operation instruction signal of.

The second signal detecting device of the present invention is
(A) an electrode for taking out the signal to be measured, and (b) a first capacitive element for inputting the signal to be measured taken out by the electrode to one terminal and outputting the AC component of the signal to be measured from the other terminal, (C) An operational amplifier that inputs the reference potential to the positive input terminal and the signal output from the first capacitive element to the negative input terminal, and one terminal is connected to the negative input terminal, and the output terminal of the operational amplifier When the second capacitive element having the other terminal connected to, the one terminal connected to the negative input terminal, the other terminal connected to the output terminal of the operational amplifier, and the integral non-operation instruction signal is insignificant Is open,
When the integration non-operation instruction signal is significant, an integration circuit including a switch element that is in a closed state and (d) the integration signal output from the integration circuit is input, and the maximum value of the integration signal input after reset is input. When the peak hold circuit that outputs the peak value and (e) the integrated signal and the peak signal that is output from the peak hold circuit are input, and the integrated signal value is smaller than the peak signal value, the first value And a comparator circuit that outputs a signal of the second value when the value of the integrated signal is greater than or equal to the value of the peak signal,
(F) The comparison signal output from the comparison circuit is input, a change from the second value to the first value of the comparison signal is detected, and after changing from insignificant to significant, it changes from significant to insignificant. And a one-shot circuit that outputs a pulsed integration non-operation instruction signal.

The capacitance value of the first capacitance element may be larger than the capacitance value of the second capacitance element.

Further, a buffer amplifier is further provided between the electrode and the first capacitive element for inputting and amplifying the signal under measurement taken out by the electrode and outputting the amplified signal to one terminal of the first capacitive element. Is preferred.

[0010]

In the first signal detecting device of the present invention, the operation is started after the reset to the peak hold circuit.

When the signal to be measured generated in the object to be measured is picked up by the electrode, the AC component of the signal to be measured is selected through the first capacitive element, and the switch element is input to the integrating circuit in the open state. When the signal picked up by the electrode is weak, it is preferable to input the signal to the switch element after amplification by the buffer amplifier. In the integrating circuit, the charge accompanying the input signal is accumulated in the second capacitive element, and
Amplifies the input signal and outputs it. Here, the amplification factor is the first
Is determined by the capacitance value of the second capacitance element and the capacitance value of the second capacitance element. When the capacitance value of the first capacitance element is larger than the capacitance value of the second capacitance element, the amplification factor of the signal is greater than 1. growing.

The integrated signal output from the integration circuit is input to the comparison circuit and the peak hold circuit. The peak hold circuit outputs the minimum value of the integrated signal input after the reset.

The peak value signal output from the peak hold circuit is input to the comparison circuit, and the comparison circuit compares the magnitude with the integrated signal. In the integrated signal input to the peak hold circuit, the value of the integrated signal input to the comparison circuit and the value of the peak value signal match in the state where the minimum value does not occur after the reset of the peak hold circuit is released. The comparison result signal of the second value is output from the comparison circuit.

When the minimum value occurs in the integrated signal due to the occurrence of the minimum value in the signal under measurement, the value of the peak value signal input to the comparison circuit becomes smaller than the value of the integration signal, and therefore the output of the comparison circuit. Changes from the second value to the first value.

The one-shot circuit for inputting the output signal of the comparison circuit detects a change from the second value to the first value,
The integral non-operation instruction signal is temporarily made significant. This integration non-operation instruction signal is notified to the switch element of the integrating circuit, and the switch element is temporarily closed and then opened again.

When this temporary switch element blocking state occurs, the output of the integrator circuit sets the minimum value generated immediately before to 0 level and outputs the subsequent signals as the amount of displacement in the positive direction from this minimum value. To do. That is, the synchronization with the signal under measurement is established, and the offset-adjusted integrated signal is output.

If the integrated signal and the output signal of the one-shot circuit are taken out and the integrated signal is collected by using the output signal of the one-shot circuit as a trigger signal, the signal value with the offset adjustment can be collected, and the accuracy can be improved. A good signal to be measured can be detected.

In the second signal detecting device of the present invention, the first signal detecting device of the present invention uses the minimum value as a base point,
The same operation is performed except that the maximum value is used as the base point.

Further, since the signal detecting device of the present invention does not use a high-pass filter having a complicated structure and employs a simple circuit structure, it can operate with low power consumption.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the signal detecting device of the present invention will be described below with reference to the accompanying drawings. In the description of the drawings, the same elements will be denoted by the same reference symbols, without redundant description.

(First Embodiment) FIG. 1 is a circuit configuration diagram of a first embodiment of the signal detecting apparatus of the present invention. As shown in FIG. 1, this device includes (a) an electrode 10 for extracting a signal under measurement.
0 and (b) a buffer circuit 1 for inputting a signal extracted from the electrode 100, converting impedance, and outputting the converted impedance
10 and (c) the measured signal output from the buffer circuit 110 is input to one terminal and the AC component of the measured signal is output from the other terminal.
0, and (d) an operational amplifier 310 for inputting a reference potential (GND) to the positive input terminal and a signal output from the capacitive element 200 to the negative input terminal, and one terminal connected to the negative input terminal, The other end of the operational amplifier 310 is connected to the output terminal of the capacitive element 32 having a capacitance value = Cβ.
0, one terminal is connected to the negative input terminal, the other terminal is connected to the output terminal of the operational amplifier, and when the integral non-operation instruction signal S is insignificant, it is in an open state and the integral non-operation instruction signal S Is significant, the integration circuit 300 including the switch element 330 that is in a closed state, and (e) the integration signal output from the integration circuit 300 is input, and the minimum value of the integration signal input after the reset is the peak value. The peak hold circuit 400 which outputs as the above, and (f) the integrated signal and the peak signal output from the peak hold circuit 400 are input, and when the value of the integrated signal is larger than the value of the peak signal, the first value A comparator circuit 5 which outputs a signal of (HIGH level) and outputs a signal of a second value (LOW level) when the value of the integrated signal is less than or equal to the value of the peak signal.
00 and (g) the comparison signal output from the comparison circuit 500 is input, a change from the LOW value to the HIGH value of the comparison signal is detected, and after changing from insignificant to significant, it changes from significant to insignificant. A one-shot circuit 600 that outputs a pulsed integration non-operation instruction signal S1, and (h) an OR circuit that inputs the integration non-operation instruction signal S1 and the master reset signal MR and calculates and outputs a significant OR. Prepare with 700.

The apparatus of this embodiment operates as follows to detect the signal under measurement taken out by the electrode 100. Figure 2
[FIG. 7] is an explanatory diagram of an operation of the apparatus of the present embodiment.

First, the master reset signal MR is set significantly, the switch element 330 of the integrating circuit 300 is closed to set the non-integrating operation state, and the peak hold circuit is reset. After that, the master reset signal MR is set to insignificant, the switch element 330 of the integrating circuit 300 is opened to enter the integrating operation state, and the reset operation is started after the reset to the peak hold circuit 400.

When the measured signal generated in the measured object is picked up by the electrode 100, the AC component of the measured signal is selected through the buffer circuit 110 and the capacitive element 200, and the switch element 330 is opened. It is input to the integrating circuit 300 in the state. In the integrating circuit 300, the input signal V
_The charge accompanying _I is accumulated in the capacitive element 320, and the input signal is amplified and output. Here, the amplification factor A is A = Cα / Cβ (1)

As shown in FIG. 2, the master reset signal M
Since the timing at which R becomes insignificant is generally not synchronized with the signal under measurement, the integrated signal V _S output as a result of the amplification by the integrating circuit 300 swings positively and negatively.

The integrated signal V output from the integrating circuit 300
_S is input to the comparison circuit 500 and the peak hold circuit 400. Peak hold circuit 400
Then, the minimum value of the integrated signal V _S input after the reset is output.

The peak value signal output from the peak hold circuit 400 is input to the comparison circuit 500, and the comparison circuit 50
At 0, the magnitude of the integrated signal is compared. The integrated signal V _S input to the peak hold circuit 400 is the value of the integrated signal V _S input to the comparison circuit 500 and the peak value signal V _{P in the} state where the minimum value has not occurred after the reset of the peak hold circuit 400. Since the values match, the comparison circuit 50
From 0, a comparison result signal of LOW value is output.

When the minimum value is generated in the integrated signal V _S as the minimum value is generated in the signal under measurement, the value of the peak value signal V _P input to the comparison circuit 500 is smaller than the value of the integrated signal V _S. Therefore, the output of the comparison circuit is from the LOW value to HIG
Change to H value.

The one-shot circuit 600, which receives the output signal of the comparison circuit 500, detects the change from the LOW value to the HIGH value, and temporarily makes the integral non-operation instruction signal S1 significant. The integration non-operation instruction signal S1 is supplied to the OR circuit 7
The switch element 330 of the integration circuit 300 is notified via 00, and the switch element 330 is temporarily closed and then reopened.

When the temporary blocking state of the switch element 330 occurs, the output of the integrating circuit 300 sets the minimum value generated immediately before to 0 level, and the subsequent signals are displaced in the positive direction from this minimum value. Is output. That is, the synchronization with the signal under measurement is established and the offset-adjusted integrated signal V _S is output.

The integrated signal V _S and the output signal S1 of the one-shot circuit 600 are taken out to obtain the one-shot circuit 600.
If the integrated signal V _S is collected by using the output signal S1 of 1 as the trigger signal, the signal value with the offset adjustment can be collected, and the signal under measurement can be detected with high accuracy.

Further, since the signal detecting apparatus of this embodiment does not use a high-pass filter having a complicated structure, it can operate with low power consumption.

In the signal detecting apparatus of this embodiment, the minimum value is used as the base point, but the maximum value can be used as the base point. In this case, the peak hold circuit is configured to output the maximum value of the integrated signal input after reset, and the comparison circuit is
The integrated signal and the peak signal output from the peak hold circuit are input, and when the value of the integrated signal is smaller than the value of the peak signal, the signal of the first value (HIGH level) is output and the integrated signal If the value of is greater than or equal to the value of the peak signal, the signal of the second value (LOW level) is output.

(Second Embodiment) In this embodiment, the signal under measurement is weak, and the amplification factor A in the integrating circuit 300 of the first embodiment is A.
If it is not enough, it is a suitable device.

FIG. 3 is a circuit configuration diagram of a second embodiment of the signal detecting device of the present invention. As shown in FIG. 3, in addition to the device of the first embodiment, this device includes (i) an integrating circuit 300.
The capacitance element 25 having a capacitance value = Cα that inputs the signal output from the other terminal and outputs the AC component from the other terminal.
0, (j) the reference potential (GND) is input to the positive input terminal and the operational amplifier 310 that inputs the signal output from the capacitive element 250 to the negative input terminal, and one terminal is connected to the negative input terminal, The other end of the operational amplifier 310 is connected to the output terminal of the capacitive element 32 having a capacitance value = Cβ.
0 and one terminal is connected to the negative input terminal, the other terminal is connected to the output terminal of the operational amplifier, and when the integral non-operation instruction signal S is insignificant, it is in an open state and the integral non-operation instruction signal S And an integrating circuit 350 including a switch element 330 that is in a closed state when is significant.

Similar to the first embodiment, the integrating circuit 300
The integrated signal V _S amplified by A times by
After passing through 50, the signal is further amplified by A times in the integrating circuit 350, so that an integrated signal amplified by A ² times is finally obtained. Thereafter, similarly to the first embodiment, it is possible to collect the offset-adjusted signal value, and it is possible to detect the signal under measurement with high accuracy.

Also in this embodiment, it is possible to set the maximum value as the base point in the same manner as in the first embodiment.

Although the amplification factor in the integrating circuit 350 is the same as the amplification factor in the integrating circuit 300, the capacitance value of the capacitive element 250 and the integration circuit 35 are adjusted in accordance with the amplification factor to be finally obtained.
The capacitance value of the capacitive element of 0 may be selected. In addition,
It is also possible to insert an integrating circuit.

[0039]

As described above in detail, according to the photodetector circuit of the present invention, the integrating circuit capable of controlling the integrating operation and the non-integrating operation is employed to determine the minimum value or the maximum value of the signal under measurement. Since the integrating circuit is temporarily set to the non-integrating operation state, the simple circuit configuration, that is, the low power consumption, the offset can be removed, and the waveform distortion can be reduced to detect the signal. Becomes

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of a photodetector according to a first embodiment of the present invention.

FIG. 2 is an operation explanatory diagram of the photodetector according to the first embodiment of the present invention.

FIG. 3 is a circuit configuration diagram of a photo detector according to a second embodiment of the present invention.

[Explanation of symbols]

100 ... Electrode, 110 ... Buffer circuit, 200, 250
... capacitance element, 300, 350 ... integration circuit, 310 ... operational amplifier, 320 ... capacitance element, 330 ... switch element, 4
00 ... Peak hold circuit, 500 ... Comparison circuit, 600
... one-shot circuit, 700 ... OR circuit.

Claims (4)

[Claims] 1. An electrode for taking out a signal to be measured, and a first capacitive element for inputting the signal to be measured taken out by the electrode to one terminal and outputting an AC component of the signal to be measured from the other terminal. An operational amplifier for inputting a reference potential to a positive input terminal and a signal output from the first capacitive element to a negative input terminal, and one terminal connected to the negative input terminal, Second with the other terminal connected to the output terminal
One terminal is connected to the capacitive element and the negative input terminal, and the other terminal is connected to the output terminal of the operational amplifier. When the integration non-operation instruction signal is insignificant, it is in an open state and the integration non-operation When the operation instruction signal is significant, an integrator circuit including a switch element that is in a closed state, and the integrated signal output from the integrator circuit is input, and the minimum value of the integrated signal that is input after reset is set as a peak value. A peak hold circuit for outputting, the integrated signal and the peak signal output from the peak hold circuit are input, and when the value of the integrated signal is larger than the value of the peak signal, a signal of a first value And a comparison circuit that outputs a signal having a second value when the value of the integrated signal is less than or equal to the value of the peak signal, and the comparison signal output by the comparison circuit is input. One-shot circuit that detects a change from the second value to the first value of the comparison signal, outputs a pulse-like integral non-operation instruction signal that changes from insignificant to insignificant and then changes from insignificant to insignificant A signal detection device comprising: 2. An electrode for taking out a signal to be measured, and a first capacitive element for inputting the signal to be measured taken out by the electrode to one terminal and outputting an AC component of the signal to be measured from the other terminal. An operational amplifier for inputting a reference potential to a positive input terminal and a signal output from the first capacitive element to a negative input terminal, and one terminal connected to the negative input terminal, Second with the other terminal connected to the output terminal
One terminal is connected to the capacitive element and the negative input terminal, and the other terminal is connected to the output terminal of the operational amplifier. When the integration non-operation instruction signal is insignificant, it is in an open state and the integration non-operation When the operation instruction signal is significant, an integrator circuit including a switch element that is in a closed state, and the integrated signal output from the integrator circuit is input, and the maximum value of the integrated signal that is input after reset is set as a peak value. A peak hold circuit for outputting, the integrated signal and the peak signal output from the peak hold circuit are input, and when the value of the integrated signal is smaller than the value of the peak signal, the signal of the first value And a comparison circuit that outputs a signal having a second value when the value of the integrated signal is greater than or equal to the value of the peak signal, and a comparison signal that the comparison circuit outputs. One-shot circuit that detects a change from the second value to the first value of the comparison signal, outputs a pulse-like integral non-operation instruction signal that changes from insignificant to insignificant and then changes from insignificant to insignificant A signal detection device comprising: 3. The capacitance value of the first capacitance element is the second capacitance value.
The signal detection device according to claim 1 or 2, wherein the capacitance is larger than the capacitance value of the capacitance element. 4. The signal under measurement taken out by the electrode is inputted between the electrode and the first capacitive element, amplified, and output toward the one terminal of the first capacitive element. 3. The signal detection device according to claim 1, further comprising a buffer amplifier for