JPH0832419A - Data receiver - Google Patents

Abstract

PURPOSE:To provide a data receiver in which current consumption in the standby state/operating state is less so as to suppress deterioration in the serice life of the battery power supply and the number of components is less by making the duty of a pulase output sugnal almost constant regardless of the amplitude of a received signal. CONSTITUTION:The data reciver provided on each tag used by the radio indentification tag system transferring data by a radio wave is provided with a common emitter reception input detection circuit 21 detecting whether or not a reception signal of an antenna 2 has a prescrived level or over, an inverter circuit 22 inputting the output signal of the reception input detection circuit, a NAND circuit 23 whose 1st input node inputs the output signal of the inverter circuit 22, a feedback resistor Rf connected between the output node of the NAND circuit 2 and 2nd input node, and a coupling capacitor C coupling the signal inputted by the antenna with the 2nd input node of the NAND circuit 23.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data receiving device, and more particularly to a data identification device used in a radio identification tag system for exchanging data by radio waves between a data reading / writing device and a tag. Relating to the front end part of the receiving device.

[0002]

2. Description of the Related Art Generally, a wireless identification tag system performs wireless transfer of data between, for example, a portable tag card formed in the shape of a card and a data reading / writing device on the system body side fixedly installed. Is going. In this case, in many cases, transfer is usually performed using the FSK (frequency shift key) method in which the carrier frequency is different depending on the data "1" or "0".

Since the tag card as described above exchanges data by a non-contact method using radio waves, deterioration due to wear of a contact portion (connector) such as an ordinary IC card for exchanging data by a contact method and dust. It has the advantage that it is not affected by the external environment such as dust and water. Also, by utilizing the advantage that data can be sent and received even when the tag card is moving, the wireless identification tag system is expected to be applied to automatic ticket gates of railways, lift tickets of ski areas, etc. .

FIG. 1 shows an example of the structure of a tag card used in a wireless identification tag system. This tag card 1 is mounted on the insulating substrate and is electrically connected to the loop-shaped antenna 2 arranged (or pattern-printed) along the peripheral edge of the insulating substrate. Data transmitter / receiver 3 and this data transmitter / receiver 3
And a thin battery 4 (which may be omitted) which is the operating power source of the above. The data transmitter / receiver 3 includes a data receiver and a data transmitter.

FIG. 5 shows a conventional example of the data receiving apparatus shown in FIG. In this data receiving device, reference numeral 51 is a reception amplification circuit to which a reception signal of the antenna 2 is input, and an NPN transistor Q to which the reception signal is input to a base and a resistor connected between the emitter of the transistor Q and a ground node. It consists of Re and a resistor Rc connected between the collector of the transistor Q and the power supply node. 52
Is a waveform shaping circuit for converting the output signal of the receiving circuit 51 into a pulse, and is usually a CMOS inverter circuit, a CMOS buffer circuit, a CMOS Schmitt trigger circuit, or the like formed on the same integrated circuit chip as the subsequent data processing circuit 53. Is used.

The CMOS type waveform shaping circuit 52 has a higher input threshold voltage than a bipolar transistor, and does not operate unless the input voltage is high. Therefore, antenna 2
By inserting the bipolar type reception amplification circuit 51 between the waveform shaping circuit 52 and the waveform shaping circuit 52, the NPN transistor Q can be operated at a low voltage of about forward voltage between base and emitter (0.6 to 0.7 V). Is possible. Since the number of components used is small, the reception amplification circuit 51 can be externally attached to the semiconductor chip on which the waveform shaping circuit 52, the data processing circuit 53, etc. are formed.

By the way, "1" and "0" of FSK data
5 MHz or 4 MHz is used as the carrier frequency in accordance with the above. In this way, the frequency of the received signal is several hundred KHz
Above a certain level, the NPN transistor Q performs a switching operation, but has poor responsiveness. In order to improve the responsiveness, the values of the resistors Re and Rc may be reduced, but this causes an increase in current consumption and is not suitable for a tag card using a battery power supply.

Further, the reception signal induced in the antenna 2 is a sine wave, but the duty of the pulse signal output from the reception amplification circuit 51 varies depending on its amplitude, which may cause inconvenience in data processing in the subsequent stage. There is.
That is, as shown in FIG. 6, when the amplitude of the signal input to the base of the NPN transistor Q changes, the period during which the amplitude of the received signal exceeds the base-emitter forward voltage of the NPN transistor Q changes and its collector The ratio of the on / off period of the voltage appearing on the line changes. Therefore, it is not suitable for FSK that modulates by frequency.

FIG. 7 shows another conventional example of the data receiving apparatus shown in FIG. This data receiving device has an antenna 2
The received signal is input to the reception amplification circuit 71 via the coupling capacitor C, amplified, and then input to the waveform shaping circuit 52. Here, by setting the output bias point of the reception amplification circuit 71 to about 1/2 of the power supply voltage of the waveform shaping circuit 52 in the subsequent stage, the duty of the pulse signal output from the waveform shaping circuit 52 is maintained at approximately 50%. Will be possible.

However, if the output bias point of the reception amplification circuit 71 is set in this way, a considerable amount of current consumption is required even when there is no reception signal (standby state), so when using a battery power supply. Its life is reduced.

FIG. 8 shows still another conventional example of the data receiving apparatus shown in FIG. In this data receiving device, the reception signal of the antenna 2 is input to the first input node of the NAND circuit 81 via the coupling capacitor C, and the reception signal of the antenna 2 is rectified by the rectification circuit 82 (capacitors C1, C2 and diode D1, It consists of D2). The output of the rectifier circuit 82 is supplied to the second of the NAND circuit 81
A feedback resistor Rf is connected between the output node of the NAND circuit 81 and the first input node.

According to this data receiving device, the antenna 2
The received signal of the antenna 2 passes through the coupling capacitor C only when the DC voltage obtained by rectifying the received signal of No. 1 by the rectifier circuit 82 exceeds the threshold voltage of the NAND circuit 81.
A pulse signal corresponding to the signal input to the input node of is output from the NAND circuit 81. In this case, since the output node of the NAND circuit 81 and the first input node are connected by the feedback resistor Rf, the NAND circuit 81 operates by self-bias, and the duty of the output pulse changes even if the level of the input signal changes. Is constant at about 50%,
It also follows small signal inputs and has good reception sensitivity. Then, when there is no received signal (at the time of standby), the NAND circuit 81 is in the inoperable state, so that the current consumption is almost zero.

However, the data receiving apparatus shown in FIG.
The number of parts used is large, and it is necessary to use parts, especially those having good diode characteristics (VF), which makes it difficult to form an LSI. The output of the rectifier circuit 82 changes linearly according to the level of the input signal. Therefore, the period during which the through current flows between the power supply node and the ground node in the NAND circuit 81 is long, the current consumption during operation is large, and the life thereof is shortened when the battery power supply is used.

[0014]

As described above, the data receiving device used in the conventional wireless identification tag system is
There has been a problem that the duty of the pulsed output signal changes according to the amplitude of the received signal, which causes inconvenience in data processing in the subsequent stage, or a problem that a large current consumption is required during standby or during operation.

The present invention has been made to solve the above problems, and the duty of a pulsed output signal is almost constant regardless of the amplitude of the received signal, and the current consumption during standby and during operation is reduced. It is an object of the present invention to provide a data receiving device that can suppress a decrease in the life of a battery power source and use a small number of parts.

[0016]

According to the present invention, in a data receiving device provided on a tag used in a radio identification tag system for transferring data by radio waves, a signal received by an antenna is input to receive data at a predetermined level or higher. A grounded-emitter reception input detection circuit that detects the presence or absence of a reception input depending on whether there is an input, a MOS inverter circuit to which the output signal of the reception input detection circuit is input, and an output signal of the inverter circuit Input to the first input node
Type NAND circuit, an output node of the NAND circuit and a second
And a coupling capacitor for coupling the received signal of the antenna to the second input node of the two-input NAND circuit.

Further, according to the present invention, in a data receiving device provided on a tag used in a wireless identification tag system for transferring data by radio waves, whether a received signal of an antenna is input and whether or not there is a received input of a predetermined level or higher. A grounded emitter type reception input detection circuit for detecting the presence / absence of a reception input, a MOS type NOR circuit for inputting an output signal of the reception input detection circuit to a first input node, and a NOR circuit A feedback resistor connected between the output node and the second input node, and a coupling capacitor for coupling the received signal of the antenna to the second input node of the NOR circuit.

[0018]

When the frequency of the received signal exceeds several hundreds of KHz, the response of the switching operation of the bipolar transistor used in the received input detection circuit deteriorates. It is used as a circuit.

That is, in the reception input detection circuit, when the reception signal is above a predetermined level when an electric wave is received from the outside, the transistor is turned on when the input signal exceeds the threshold voltage of the transistor, and the input signal is turned on. Becomes lower than the threshold voltage of the transistor, the transistor continues to turn on, and the output voltage of the transistor maintains the input level of the logic circuit at the next stage at the first logic level.

As a result, the NAND circuit or NOR circuit, in which the received signal is input to the second input node via the coupling capacitor, outputs the pulsed input signal. In this case, the NAND circuit or NOR circuit operates by self-bias because the feedback resistor is connected between the second input node and the output node, and the rectangular wave output is generated even if the level of the input signal is extremely low. The duty becomes constant at about 50% and follows the small signal input, and the reception sensitivity becomes good.

In the reception input detection circuit, when there is no reception signal (during standby) or when it is lower than a predetermined level, the output voltage of the transistor is the second logic level from the input level of the logic circuit of the next stage. To maintain.
As a result, the NAND circuit or NOR circuit is in a state of outputting a constant level, so that its current consumption is almost zero.

[0022]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows an example of the structure of a tag card as an example of a tag used in a wireless identification tag system that performs wireless transfer using an FSK method in which carrier frequencies are different depending on "1" and "0" of data. It is shown schematically. In this example, carrier frequencies of 5 MHz and 4 MHz are used according to "1" and "0" of the data.

This tag card 1 is provided with a loop-shaped antenna 2 arranged (or pattern-printed) along the peripheral portion of an insulating substrate, and is placed on the insulating substrate to electrically connect to the antenna. Data transmitter / receiver 3 connected to
And a thin battery 4 (which may be omitted) which is an operating power source of the data transmitting / receiving device 3, and is entirely insulated and sealed. The data transmitter / receiver 3 includes a data receiver and a data transmitter.

FIG. 2 is a circuit diagram showing a first embodiment of the data receiving apparatus according to the present invention. In this data receiving apparatus, reference numeral 21 is a reception input detection circuit which receives the reception signal of the antenna 2 and detects the presence or absence of the reception input depending on whether or not there is a reception input of a predetermined level or higher. In this reception input detection circuit 21, the input signal is input to the NPN via the base resistance Rb.
Input to the base of the transistor Q, the emitter of this NPN transistor Q is grounded, and the collector of this NPN transistor Q consists of a grounded-emitter circuit connected to the power supply node via a collector resistor Rc. Output from the collector of the NPN transistor Q. The signal is picked up.

Reference numeral 22 is a MOS type (for example, CMOS type) inverter circuit to which the output signal of the reception input detection circuit 21 is inputted, and 23 is a MOS type (for example, CMOS type) where the output signal of the inverter circuit 22 is inputted to the first input node. CMOS
Type) NAND circuit. Rf is a feedback resistor connected between the output node of the NAND circuit 23 and the second input node, and C is a coupling capacitor for coupling the reception signal of the antenna 2 to the second input node of the NAND circuit 23. Is.

The inverter circuit 22 and the NAND circuit 23 are usually formed on the same integrated circuit chip as the subsequent data processing circuit 24. Next, the operation of the data receiving apparatus having the above configuration will be described with reference to the voltage waveform diagram shown in FIG.

The reception input detection circuit 21 receives the NPN transistor Q when the frequency of the reception signal exceeds several hundred KHz.
It is used as a voltage comparison circuit by taking advantage of the poor response of the. That is, by appropriately setting the values of the base resistance Rb and the collector resistance Rc of the reception input detection circuit 21, the input signal (reception signal of the antenna, sine wave)
Exceeds the threshold voltage of the NPN transistor Q (forward voltage between base and emitter, 0.6 to 0.7V), NP
When the N-transistor Q is turned on and its collector voltage is 0
Even when the input signal becomes V and the input signal becomes lower than the threshold voltage of the NPN transistor Q, the NPN transistor Q continues to be turned on.

In other words, the reception input detection circuit 21 has 0.6
When there is a receiving input of .about.0.7V or more, the collector voltage of the NPN transistor Q (the input voltage of the next-stage inverter circuit 22) is maintained at "L" level, so that no through current flows in the inverter circuit 22. The output signal of the inverter circuit 22 maintains the first input node of the NAND circuit 23 at "H" level.

As a result, in the NAND circuit 23, the reception signal of the antenna 2 is transmitted to the second side via the coupling capacitor C.
It becomes operable according to the signal input from the input node. In this case, the NAND circuit 23 operates by self-bias because the feedback resistor Rf is connected between the second input node and the output node, and the duty of the rectangular wave output is output even if the level of the input signal is extremely low. Becomes almost constant at 50%, follows small input signals, and has good reception sensitivity.

On the other hand, the reception input is 0.6 to 0.7 V as in the case where there is no reception signal (standby).
When it is smaller, the collector voltage of the NPN transistor Q becomes 0V, and the output signal of the inverter circuit 22 maintains the first input node of the NAND circuit 23 at the "L" level, so that the current consumption of the NAND circuit 23 is almost zero. Close to.

That is, according to the data receiving apparatus of the above embodiment, the reception input of the reception input detection circuit 21 is 0.6 to 0.7.
When it is V or more, the NAND circuit 23 is irrespective of the amplitude of the received signal.
The duty of the output signal is almost constant, the current consumption during standby and during operation is reduced, and the reduction in the life of the battery power supply can be suppressed.

Moreover, the number of parts (NPN transistor Q, resistors Rb, Rc, Rf, coupling capacitor C) externally connected to the IC in which the inverter circuit 22 and the NAND circuit 23 are formed can be reduced, It is easy to reduce the component cost, the mounting cost on the tag card, the price of the tag card, and the size and thickness.

FIG. 4 is a circuit diagram showing a second embodiment of the data receiving apparatus of the present invention. This data receiving device is
Compared to the data receiving device of the embodiment, the inverter circuit 22
Is omitted, and instead of the NAND circuit 23, for example, a CMOS NOR circuit 41 is used, and the output signal of the reception input detection circuit 21 is directly input to the first input node of the NOR circuit 41. Are the same, and are therefore assigned the same reference numerals as in FIG.

Further, the reception input detection circuit 2 of each of the above embodiments
1, a bypass capacitor Cp of about 0.01 μF is connected between the collector of the transistor Q and the ground node to remove the ripple component of the collector voltage of the transistor Q as shown in FIG. Can be brought close to 0V.

[0035]

As described above, according to the present invention, the duty of the pulsed output signal can be substantially constant regardless of the amplitude of the received signal in the data receiving device provided in the tag used in the wireless identification tag system. Therefore, the current consumption during standby and during operation can be reduced, the reduction in the life of the battery power supply can be suppressed, and the number of parts used can be reduced.

[Brief description of drawings]

FIG. 1 is a plan view schematically showing the configuration of an example of a tag used in a wireless identification tag system.

FIG. 2 is a circuit diagram showing a first embodiment of a data receiving device of the present invention.

FIG. 3 is a voltage waveform diagram showing an operation example of the data receiving apparatus of FIG.

FIG. 4 is a circuit diagram showing a second embodiment of the data receiving apparatus of the present invention.

FIG. 5 is a circuit diagram showing an example of a conventional data receiving device.

6 is a voltage waveform diagram showing an operation example of the data receiving apparatus of FIG.

FIG. 7 is a circuit diagram showing another example of a conventional data receiving device.

FIG. 8 is a circuit diagram showing still another example of a conventional data receiving device.

[Explanation of symbols]

2 ... Antenna, 21 ... Reception input detection circuit, 22 ... Inverter circuit, 23 ... NAND circuit, Q ... NPN transistor, Rb ... Base resistance, Rc ... Collector resistance, Rf ... Feedback resistance, C ... Coupling capacitor.

Claims (3)

[Claims] 1. A data receiving device provided on a tag used in a wireless identification tag system for transmitting data by radio waves, wherein a received signal of an antenna is input and whether or not there is a received input of a predetermined level or higher. Common-emitter type reception input detection circuit for detecting the presence or absence of a reception input, a MOS type inverter circuit to which the output signal of the reception input detection circuit is input, and an output signal of the inverter circuit is input to the first input node. And a feedback resistor connected between the output node of the NAND circuit and the second input node, and a cup for coupling the received signal of the antenna to the second input node of the NAND circuit. A data receiving device comprising a ring capacitor. 2. A data receiving device provided on a tag used in a radio frequency identification tag system for transferring data by radio waves, according to whether or not a reception signal of an antenna is input and there is a reception input of a predetermined level or higher. A grounded emitter type reception input detection circuit for detecting the presence or absence of a reception input, a MOS type NOR circuit in which an output signal of the reception input detection circuit is input to a first input node, an output node of the NOR circuit and A data receiving device comprising: a feedback resistor connected between two input nodes; and a coupling capacitor for coupling a received signal of the antenna to a second input node of the NOR circuit. 3. The data receiving apparatus according to claim 1, wherein the grounded-emitter-type reception input detection circuit is
The input signal is input to the base of the NPN transistor through the base resistance, the emitter of this NPN transistor is grounded, the collector of this NPN transistor is connected to the power supply node through the collector resistance, and the output signal from the collector is A data receiving device characterized by being taken out.