JPH08316849A - Nonlinear conversion means - Google Patents

Abstract

PURPOSE: To realize a nonlinear conversion means with a comparatively small circuit scale regardless of the configuration comprising logic circuits and to attain changeover control of a conversion characteristic by providing a specific coring circuit, a specific coefficient circuit, a specific limit circuit and a control means controlling setting a coring value and a gradation of a coefficient and an upper limit of an output to the means. CONSTITUTION: A coring circuit 3 clips an input signal to 0 in matching with a caring value received from a control circuit 7. Then a coefficient circuit 4 multiplies a coefficient in response to a gradation set by a control means 7 with the signal thin an output signal having a characteristic of a straight part of the gradation. Then a limit circuit 6 limits a portion of an arithmetic output of the coefficient circuit 4 higher than an upper limit set by a control means 7. Thus, an output applying nonlinear conversion to the input signal is obtained. In this case, the control circuit 7 controls the coring value, the gradation and the upper limit to set the nonlinear conversion characteristic to be an optimum characteristic.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver 3
The present invention relates to a non-linear conversion circuit used in motion detection processing and edge detection processing for performing digital signal processing such as dimension Y / C separation and motion adaptive scanning line interpolation, and in particular, non-linear conversion that facilitates variable control of non-linear conversion characteristics. Regarding the circuit.

[0002]

2. Description of the Related Art In a television receiver, three-dimensional Y is a technique for improving image quality by digital signal processing.
A / C separation processing and motion adaptive scanning line interpolation processing are known. In order to realize these processes, it is usually necessary to detect the amount of motion of the video signal, and a motion detection circuit is provided. The structure of this motion detection circuit is generally known as disclosed in Japanese Patent Laid-Open No. 3-292090. Figure 6
FIG. 6 is a block diagram showing a conventional motion detection circuit for a difference between one frames. The operation will be briefly described. The subtraction circuit 63 detects the difference between the current signal and the one-frame delayed signal, and the LPF6
In step 4, unnecessary components such as color subcarriers are removed, and absolute value circuit 6
After the absolute value is obtained in step 5, the non-linear conversion circuit 66 multiplies the coefficient according to the sensitivity setting to obtain a motion detection signal.

Further, the motion detection circuit detects, for example, the edge portion of the video signal, and switches the non-linear conversion characteristic using the edge amount as a parameter so that the amount of movement of the edge portion does not become too large, and sensitivity control is performed. There is something. The edge detection circuit in this case also uses a non-linear conversion circuit in the same manner as the motion detection in order to obtain the amount of edges by performing a non-linear conversion process after detecting the edge part with a filter and converting it to an absolute value.

[0004]

The non-linear conversion circuit used in the motion detection circuit and the edge detection circuit described in the prior art is usually constituted by a table lookup using a ROM. . However, in the configuration using the ROM, the conversion characteristics cannot be easily changed, especially in consideration of the circuit LSI, and in order to switch and control the conversion characteristics, only the number of conversion characteristics to be set is set. There is a problem that the ROM conversion table is required and the ROM capacity becomes large. In addition, in the configuration using the RAM, it is sufficient that the capacity has a capacity for realizing one table of the non-linear conversion characteristics, but since a large amount of data needs to be transferred to the RAM and written at the time of the setup, it is necessary for the setup. There is a problem that it takes time and is inconvenient to use.

On the other hand, when a non-linear conversion circuit is composed of a logic circuit, in order to freely set conversion characteristics, it is necessary to form a combination of comparators and multipliers. There is a problem that it becomes large and is not suitable for LSI.

An object of the present invention is to provide a non-linear conversion circuit which can be realized with a relatively small circuit scale even with a configuration of a logic circuit and which can control switching of conversion characteristics.

[0007]

In order to solve the above-mentioned problems, according to the present invention, a coring circuit for performing base clip processing according to a coring set value from an input signal,
A coefficient circuit (coefficient multiplier) configured by a combination of bit shift and addition, a limit circuit that determines the upper limit value of the output signal after coefficient calculation, a coring value setting, a coefficient slope setting, and an output upper limit value. A control means for controlling is provided, the coring circuit and the coefficient circuit are controlled by the control means, and a non-linear conversion circuit capable of switching and controlling conversion characteristics is constituted by a logic circuit.

[0008]

By including the above means, first, in the coring circuit, the input signal is base clipped in accordance with the coring set value given by the control means, and the input signal having a value smaller than the coring value is zeroed. Set. Next, in the coefficient circuit, the input signal is multiplied by the slope set by the control means. Then, by limiting the output of the signal of the upper limit value or more by the limit circuit, the output obtained by performing the non-linear conversion of the input signal can be obtained. At this time, the non-linear conversion characteristic is set to the optimum characteristic by controlling the coring value, the inclination, and the upper limit value by the control means.

[0009]

Embodiments of the present invention will be described below. FIG. 1 is a block diagram of a nonlinear conversion circuit of the present invention. FIG.
Where 1 is an input signal of a non-linear conversion circuit derived from an absolute value circuit, 2 is a coring value control signal, 3 is a coring circuit, 4 is a coefficient circuit, 5 is a coefficient control signal, 6 is a limit circuit, and 7 is a core. A control circuit for controlling the ring value, the coefficient, and the output upper limit value, 8 is a signal output after nonlinear conversion, and 9 is an output upper limit value control signal.

FIG. 2 is a non-linear characteristic diagram realized by the non-linear conversion circuit of the present invention shown in FIG. In FIG. 2, the horizontal axis is the input X, and the vertical axis is the output Y. From the input zero to the coring value C, the value is clipped to zero, and when the coring value C or higher, the slope A rises and the output upper limit value B or higher. Indicates a limited nonlinear characteristic. 2A shows an example of conversion characteristics when the coring value C is variable, and FIG. 2B is an example of conversion characteristics when the inclination A is variable. Here, a relatively simplified non-linear characteristic that can be expressed by a combination of a straight line having a slope A and a constant is used.

Next, the operation of the non-linear conversion circuit of FIG. 1 will be described. First, in the coring circuit 3, the input signal is clipped to zero in accordance with the coring value C given from the control circuit 7. Next, the coefficient circuit 4 multiplies the signal by a coefficient corresponding to the slope A set by the control means 7 to obtain the slope A.
An output signal having a linear characteristic of is obtained. Next, the limit circuit 6 limits the part where the calculation output of the coefficient circuit 4 is larger than the upper limit value B set by the control means 7. By operating in this way, conversion equivalent to the nonlinear characteristic shown in FIG. 2 can be performed.

Next, an embodiment of the coring circuit 3 will be described with reference to FIG. In FIG. 3, 31 is the input signal of the coring circuit, 32 is the coring set value derived from the control circuit, 33 is the input signal 31 to the coring set value 3
A subtraction circuit for subtracting 2 is a base clip circuit 34 for clipping a signal on the negative side, and 35 is a coring output signal. The operation of this coring circuit will be described. First,
The subtraction circuit 33 converts the input signal 31 to the coring set value 32.
Subtract. As a result, among the input signals 31, the signals smaller than the coring set value 32 become signals below zero. In the clipping circuit 34, if the sign of the signal derived from the subtraction circuit 33 is positive, it is fixed as it is, and if the sign is negative, the output is fixed to zero to obtain the output signal 35 in which the portion smaller than the coring value is base clipped. To be

Next, an embodiment of the coefficient circuit 4 shown in FIG. 1 will be described. FIG. 4 is an explanatory diagram when the settable coefficients of the coefficient circuit 4 are four types of 1/2, 1, 3/2, and 2. In FIG. 4, 41 is an input signal of the coefficient circuit, 42
Is a selector for selecting a signal multiplied by ½ or 1 ×, 43 is an adder, 44 is a ½ circuit realized by bit shift, and 45 is a gate for stopping one input signal of the adder. A circuit, 46 is a control signal for switching the gate circuit on / off, and 47 is a control signal for switching the selector 42. A feature of the coefficient circuit shown here is that a coefficient that can be realized by a combination of addition, bit shift, and a selector is selected without using a multiplier having a large circuit scale, and has a simple configuration.

Next, the operation of the coefficient circuit shown in FIG. 4 will be described. For example, when it is desired to set the coefficient to 2, the selector switching control signal 47 is set so that the selector 42 selects the 1 × signal (direction shown in the drawing), and the gate on / off switching is performed. The control signal 46 is set so that the gate circuit 45 is turned on. That is, the same 1 × signal is introduced to both inputs of the adder 43, and the addition result is output as a 2 × signal. When it is desired to set the coefficient to 3/2, the selector 42 is set to select the output of the 1/2 times circuit 44 in the opposite direction to the direction shown, and the gate circuit 45 is turned on. To do. Similarly, when the coefficient is 1 times, the selector 42 selects the 1 time signal, turns off the gate circuit 45, and sets the coefficient 1
When it is set to / 2, the selector 42 selects the 1/2 signal, gives each control signal to turn off the gate circuit 45, and obtains the coefficient calculation result according to each coefficient setting. Thus, by configuring the coefficient circuit with the bit shift, selector, and addition circuits, the coefficients can be switched without using a multiplier having a large circuit scale.

Next, the limit circuit 6 whose output upper limit value is variable
An example will be described. FIG. 5 is an explanatory diagram of an embodiment of the limit circuit. In FIG. 5, an input signal 51 of the limit circuit and an upper limit value setting signal 52 given from the control circuit 7
Are compared by the comparator 53, and when the input signal 51 is larger than the upper limit value setting signal 52, the selector 54 is configured to be switched to the upper limit value side so that the output signal limited to the set upper limit value. 55 can be obtained. With this configuration, a limit circuit whose output upper limit value is variable can be configured with a simple circuit such as a comparator and a selector.

As described above, according to the present embodiment described with reference to FIGS. 1, 3, 4, and 5, the nonlinear conversion characteristic can be realized with the configuration of the simple logic circuit, and the coring value, the slope, and the output upper limit value can be switched. It becomes controllable.

[0017]

As described above, according to the present invention, the non-linear conversion circuit, which is conventionally composed of the ROM, can be realized by the structure of the simple logic circuit, and the conversion characteristics such as the coring value and the slope can be controlled. Especially, in the case of an LSI, the user can freely change the setting of the conversion characteristic as compared with the ROM.

[Brief description of drawings]

FIG. 1 is a block diagram of a non-linear conversion circuit that is an embodiment of the present invention.

FIG. 2 is a conversion characteristic diagram of the nonlinear conversion circuit of the present invention.

FIG. 3 is an explanatory diagram of an embodiment of a coring circuit.

FIG. 4 is an explanatory diagram of an embodiment of a coefficient circuit.

FIG. 5 is an explanatory diagram of an embodiment of a limit circuit.

FIG. 6 is a block diagram showing a conventional example of a motion detection circuit.

[Explanation of symbols]

3 ... Coring circuit, 4 ... Coefficient circuit, 6 ... Limit circuit, 7 ... Control circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masato Sugiyama, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Stock Company, Institute of Image Media Research, Hitachi, Ltd. (72) Takeshi Sakai 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Hitachi, Ltd. Information & Video Division (72) Inventor Ryo Hasegawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Stock Company (72) Inventor Ryuichi Ikeda 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Hitachi Image Information System Co., Ltd.

Claims (1)

[Claims] 1. A non-linear conversion means in which an output signal corresponding to an input signal has a non-linear characteristic, a coring means having a variable base clip value, a coefficient calculation means having a variable output / input ratio value, and an upper limit value. Non-linear conversion means comprising variable limit means, coring means, coefficient calculation means, and control means for controlling each set value in the limit means.