JPH08316631A - Manufacture of multilayer wiring board - Google Patents
Manufacture of multilayer wiring boardInfo
- Publication number
- JPH08316631A JPH08316631A JP7123575A JP12357595A JPH08316631A JP H08316631 A JPH08316631 A JP H08316631A JP 7123575 A JP7123575 A JP 7123575A JP 12357595 A JP12357595 A JP 12357595A JP H08316631 A JPH08316631 A JP H08316631A
- Authority
- JP
- Japan
- Prior art keywords
- copper foil
- wiring board
- carrier
- multilayer wiring
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、多層配線板の製造法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer wiring board.
【0002】[0002]
【従来の技術】多層配線板の高密度化は、一般に、配線
層を増加することによって行なわれているが、単に配線
層を増加すると、各層の配線を接続するための貫通孔
(以下、スルーホールという。)が増加し、貫通孔の占
める面積が増加し、配線の収容量が低下する。そこで、
接続の必要な箇所にのみ接続孔を設け、非貫通孔(以
下、バイアホールという。)とする方法が提案されてい
る。2. Description of the Related Art Generally, the density of a multilayer wiring board is increased by increasing the number of wiring layers. However, if the number of wiring layers is simply increased, a through hole (hereinafter referred to as a through hole) for connecting the wiring of each layer will be used. The number of holes) increases, the area occupied by the through holes increases, and the amount of wiring accommodated decreases. Therefore,
There has been proposed a method in which a connection hole is provided only at a place where connection is required and a non-through hole (hereinafter referred to as a via hole) is formed.
【0003】例えば、特開平2−62095号公報に開
示されているように、保護用金属箔などによる補強材を
一方の面に設け、他方の面に接着シートを貼り合せ、バ
イアホールとなる箇所に、予め、孔をあけておき、内層
回路板と積層接着し、バイアホール内壁を金属化して、
接続を行なう方法が知られている。For example, as disclosed in Japanese Patent Application Laid-Open No. 2-62095, a reinforcing material such as a protective metal foil is provided on one surface and an adhesive sheet is attached to the other surface to form a via hole. In advance, a hole is made in advance, the inner layer circuit board is laminated and adhered, and the inner wall of the via hole is metalized,
Methods of making connections are known.
【0004】[0004]
【発明が解決しようとする課題】ところで、この保護用
金属箔などによる補強材を一方の面に設け、他方の面に
接着シートを貼り合せ、バイアホールとなる箇所に、予
め、孔をあけておき、内層回路板と積層接着し、バイア
ホール内壁を金属化して、接続を行なう方法では、接着
シートの作成と、銅箔との貼り合せという工程が必要で
あり、製造工程が複雑になると共に、接着シートを単体
で取り扱うために、耐熱性の低いゴム成分を用いて接着
剤層に屈曲性を与えなければならないという課題があ
る。By the way, a reinforcing material such as a metal foil for protection is provided on one surface, an adhesive sheet is attached to the other surface, and a hole is preliminarily formed at a position to be a via hole. In addition, the method of laminating and adhering to the inner layer circuit board, metalizing the inner wall of the via hole, and making the connection requires the steps of forming an adhesive sheet and bonding with a copper foil, which complicates the manufacturing process. However, in order to handle the adhesive sheet as a single body, there is a problem that the adhesive layer must be provided with flexibility by using a rubber component having low heat resistance.
【0005】本発明者らは、鋭意検討の結果、銅箔に接
着剤を塗布して、工程を低減し、また、耐熱性の低いゴ
ム成分を使用しない方法を、特願平6−140028号
によって提案している。ところが、この方法でも、銅箔
が12μm以下になると、図1に示すように、カールす
るという課題が発生した。また、カールしたものは、孔
あけや多層化積層接着工程での作業効率を著しく低下さ
せるばかりか、カールを矯正して平坦にすると、薄い銅
箔が割れてしまうことがある。As a result of earnest studies, the inventors of the present invention have proposed a method of applying an adhesive to a copper foil to reduce the number of steps and not using a rubber component having low heat resistance, as disclosed in Japanese Patent Application No. 6-140028. Have proposed by. However, even in this method, when the copper foil is 12 μm or less, the problem of curling occurs as shown in FIG. Further, the curled material not only significantly lowers the work efficiency in the perforation and the multi-layer lamination adhesion step, but also when the curl is corrected to be flat, the thin copper foil may be broken.
【0006】本発明は、配線密度が高く、かつ、作業効
率優れた多層配線板の製造法を提供することを目的とす
るものである。An object of the present invention is to provide a method for manufacturing a multilayer wiring board having a high wiring density and excellent work efficiency.
【0007】[0007]
【課題を解決するための手段】本発明の多層配線板の製
造法は、 a.キャリア付き極薄銅箔の一方の面に、Aステージ状
またはBステージ状の絶縁接着層を形成したフィルム状
材料の、所定位置に穴明けを行う工程 b.内層回路基板上に、上記穴明けをしたフィルム状材
料を、回路基板と絶縁接着層が接するように重ねて、加
熱加圧し積層一体化する工程 c.キャリアを除去する工程 d.前記キャリを除去したフィルム状材料に設けた穴を
介して、内層回路基板上の回路と、フィルム状材料の銅
箔との電気的接続をめっきによって行う工程 e.フィルム状材料の銅箔を加工し、回路を形成する工
程 を有することを特徴とする。The method for manufacturing a multilayer wiring board according to the present invention comprises: a. A step of forming a hole in a predetermined position of a film material having an A-stage or B-stage insulating adhesive layer formed on one surface of an ultra-thin copper foil with a carrier. B. A step of stacking the perforated film-shaped material on the inner layer circuit board so that the circuit board and the insulating adhesive layer are in contact with each other, and heating and pressurizing to laminate them together c. Step of removing carrier d. A step of electrically connecting a circuit on the inner layer circuit board and a copper foil of the film-like material by plating through a hole provided in the film-like material from which the carry has been removed; e. The method is characterized by having a step of processing a copper foil of a film material to form a circuit.
【0008】このキャリアには、金属箔や、高温での弾
性率が大きい有機材料シートを使用することができ、金
属箔としては、銅、アルミニウム等の金属箔、及びこれ
らに粘着剤等を塗布したもの、あるいは銅箔に異種金属
をめっきして製造したもの等が挙げられる。例えば、7
0μmの厚さのアルミニウム箔と5μmの厚さの銅箔か
らなるピーラブル電解銅箔(古河サーキットフォイル株
式会社製、商品名)、銅箔の厚さが5μmの40E5
(三井金属工業株式会社製、商品名)、銅箔の厚さが9
μmの40E9(三井金属工業株式会社製、商品名)等
がある。また、有機材料シートとしては、ポリイミド、
ポリエチレンテレフタレート、ポリプロピレン、ポリ塩
化ビニリデン、ポリふっ化ビニリデン、ポリ4ふっ化エ
チレン、ポリビニルアルコール、ポリアクリロニトリ
ル、ポリアミド、セロファン等の有機材料シートを用い
ることができる。For this carrier, a metal foil or an organic material sheet having a high elastic modulus at high temperature can be used. As the metal foil, a metal foil such as copper or aluminum, and an adhesive or the like coated on these metal foils. Examples thereof include those produced by plating a copper foil with a dissimilar metal, and the like. For example, 7
Peelable electrolytic copper foil (trade name of Furukawa Circuit Foil Co., Ltd.) consisting of 0 μm thick aluminum foil and 5 μm thick copper foil, 40E5 with copper foil thickness of 5 μm
(Mitsui Metal Industry Co., Ltd., trade name), the thickness of the copper foil is 9
There is 40 μm (trade name) manufactured by Mitsui Kinzoku Kogyo Co., Ltd., etc. Further, as the organic material sheet, polyimide,
Organic material sheets such as polyethylene terephthalate, polypropylene, polyvinylidene chloride, polyvinylidene fluoride, polytetrafluoroethylene, polyvinyl alcohol, polyacrylonitrile, polyamide, and cellophane can be used.
【0009】本発明に用いることのできる絶縁接着層の
組成は、エポキシ樹脂系接着剤、アクリル変性樹脂系、
あるいはポリイミド樹脂系接着剤などが使用できる。絶
縁接着層は、半硬化状であることが必要であり、銅箔に
塗布した後の乾燥条件を、完全に硬化するまでには至ら
ない条件を実験的に求めることができる。本発明では、
40℃以下では粘着性を持たず、多層化接着によって接
着強度が0.6kgf/cm以上を与える状態をいう。
このような絶縁接着剤としては、例えば、市販のものと
して、AS−3000(日立化成工業株式会社製、商品
名)等があり、銅箔に塗布したものとしては、MCF−
3000(日立化成工業株式会社製、商品名)がある。The composition of the insulating adhesive layer which can be used in the present invention is an epoxy resin adhesive, an acrylic modified resin system,
Alternatively, a polyimide resin adhesive or the like can be used. The insulating adhesive layer needs to be semi-cured, and it is possible to experimentally determine a drying condition after coating on the copper foil, which is not enough to completely cure. In the present invention,
At 40 ° C. or lower, it means a state in which it has no tackiness and gives an adhesive strength of 0.6 kgf / cm or more by multilayer adhesion.
As such an insulating adhesive, for example, AS-3000 (manufactured by Hitachi Chemical Co., Ltd., trade name) is commercially available, and as an adhesive coated on a copper foil, MCF-
There is 3000 (trade name, manufactured by Hitachi Chemical Co., Ltd.).
【0010】[0010]
実施例 図3(a)に示すような、ピーラブル電解銅箔(古河サ
ーキットフォイル株式会社製、商品名)の銅箔面に、図
3(b)に示すように、分子量が10万以上の高分子エ
ポキシ重合体を含む接着剤を、乾燥後の厚さが50μm
となるように塗布し、半硬化状にする。このときにカー
ルは発生しなかった。図3(c)に示すように、バイア
ホールとなる箇所に、ドリルで直径0.3mmの孔をあ
ける。図3(d)に示すように、厚さ0.3mmの銅張
り積層板を用意し、通常のエッチドホイル法によって、
内層回路板を作成する。図3(e)に示すように、孔を
あけた接着剤を塗布した銅箔と、前記内層回路板とを重
ね、温度170℃、圧力25kgf/cm2を60分間
加え、多層化接着して一体化する。図3(f)に示すよ
うに、スルーホールをあけ、図3(g)に示すように、
キャリアであるアルミニウムを、機械的に引き剥がし、
図3(h)に示すように、過マンガン酸塩とアルカリを
含む溶液でスミア処理を行ない、めっきを行なって、厚
さ20μmのめっき金属を析出させ、エッチングレジス
トを形成し、不要な銅をエッチング除去して、回路導体
の幅と間隔がいずれも60μmの配線板を作成する。Example On a copper foil surface of a peelable electrolytic copper foil (trade name, manufactured by Furukawa Circuit Foil Co., Ltd.) as shown in FIG. 3 (a), as shown in FIG. 3 (b), a high molecular weight of 100,000 or more was obtained. The adhesive containing the molecular epoxy polymer has a thickness of 50 μm after drying.
So that it is semi-cured. No curl occurred at this time. As shown in FIG. 3 (c), a hole having a diameter of 0.3 mm is drilled at a place to be a via hole. As shown in FIG. 3 (d), a copper-clad laminate having a thickness of 0.3 mm is prepared, and by a usual etched foil method,
Create the inner layer circuit board. As shown in FIG. 3 (e), a copper foil coated with an adhesive having holes is placed on the inner layer circuit board, and a temperature of 170 ° C. and a pressure of 25 kgf / cm 2 are applied for 60 minutes to perform multi-layer adhesion. Unify. As shown in FIG. 3 (f), through holes are opened, and as shown in FIG. 3 (g),
The carrier aluminum is peeled off mechanically,
As shown in FIG. 3 (h), smear treatment is performed with a solution containing permanganate and an alkali, plating is performed to deposit a plating metal having a thickness of 20 μm, an etching resist is formed, and unnecessary copper is removed. By removing by etching, a wiring board having circuit conductors having a width and a spacing of 60 μm is formed.
【0011】比較例1 実施例1のピーラブル電解銅箔(古河サーキットフォイ
ル株式会社製、商品名)に代えて、厚さ12μmの銅箔
を用いた以外は、実施例1と同様にして、配線板を作成
しようとしたが、カールが発生し、孔あけや積層ができ
なかった。Comparative Example 1 Wiring was performed in the same manner as in Example 1 except that a copper foil having a thickness of 12 μm was used in place of the peelable electrolytic copper foil (trade name, manufactured by Furukawa Circuit Foil Co., Ltd.) of Example 1. I tried to make a plate, but curling occurred and I could not punch or stack.
【0012】比較例2 比較例1の銅箔に代えて、18μmの銅箔を用いた結
果、カールは発生せず、実施例1と同様の配線板を作成
することができる。Comparative Example 2 As a result of using a copper foil of 18 μm in place of the copper foil of Comparative Example 1, curling does not occur, and a wiring board similar to that of Example 1 can be prepared.
【0013】[0013]
【発明の効果】以上に説明したように、本発明によっ
て、配線密度が高く、かつ、作業効率優れた多層配線板
の製造法を提供することができる。As described above, according to the present invention, it is possible to provide a method for manufacturing a multilayer wiring board having a high wiring density and excellent work efficiency.
【図1】本発明の課題を説明するための断面図である。FIG. 1 is a sectional view for explaining a problem of the present invention.
【図2】本発明の一実施例を示す断面図である。FIG. 2 is a sectional view showing an embodiment of the present invention.
【図3】(a)〜(h)は、それぞれ本発明の一実施例
を説明するための各工程における断面図である。3 (a) to 3 (h) are cross-sectional views in each step for explaining one embodiment of the present invention.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 高橋 敦之 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 (72)発明者 ▲つる▼ 義之 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 (72)発明者 有家 茂晴 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 (72)発明者 大塚 和久 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Atsushi Takahashi 1500 Ogawa, Shimodate, Ibaraki Shimodate Research Laboratory, Hitachi Chemical Co., Ltd. (72) Inventor ▲ Tsuru ▼ Yoshino, 1500 Ogawa, Shimodate, Ibaraki Shimodate Research Institute Co., Ltd. (72) Inventor Shigeharu Ariya 1500 Ogawa, Shimodate, Ibaraki Hitachi Chemical Co., Ltd. Shimodate Research Institute (72) Inventor Kazuhisa Otsuka 1500 Ogawa, Shimodate City, Ibaraki Hitachi Chemical Co., Ltd. Shimodate In the laboratory
Claims (5)
Aステージ状またはBステージ状の絶縁接着層を形成し
たフィルム状材料の、所定位置に穴明けを行う工程 b.内層回路基板上に、上記穴明けをしたフィルム状材
料を、回路基板と絶縁接着層が接するように重ねて、加
熱加圧し積層一体化する工程 c.キャリアを除去する工程 d.前記キャリを除去したフィルム状材料に設けた穴を
介して、内層回路基板上の回路と、フィルム状材料の銅
箔との電気的接続をめっきによって行う工程 e.フィルム状材料の銅箔を加工し、回路を形成する工
程 を有することを特徴とする多層配線板の製造法。1. A. On one side of the ultra-thin copper foil with carrier,
A step of forming a hole in a predetermined position of the film-shaped material on which an A-stage or B-stage insulating adhesive layer is formed. B. A step of stacking the perforated film-shaped material on the inner layer circuit board so that the circuit board and the insulating adhesive layer are in contact with each other, and heating and pressurizing to laminate them together c. Step of removing carrier d. A step of electrically connecting a circuit on the inner layer circuit board and a copper foil of the film-like material by plating through a hole provided in the film-like material from which the carry has been removed; e. A method for manufacturing a multilayer wiring board, which comprises a step of processing a copper foil of a film material to form a circuit.
2μm以下であることを特徴とする請求項1に記載の多
層配線板の製造法。2. The thickness of the copper foil of the ultra-thin copper foil with a carrier is 1
The method for manufacturing a multilayer wiring board according to claim 1, wherein the thickness is 2 μm or less.
ィルムのいずれかであることを特徴とする請求項1また
は2に記載の多層配線板の製造法。3. The method for producing a multilayer wiring board according to claim 1, wherein the carrier is any one of copper foil, aluminum and resin film.
とする請求項1〜3のうちいずれかに記載の多層配線板
の製造法。4. The method for manufacturing a multilayer wiring board according to claim 1, wherein the carrier is removed by peeling it off.
る除去であることを特徴とする請求項1〜3のうちいず
れかに記載の多層配線板の製造法。5. The method for manufacturing a multilayer wiring board according to claim 1, wherein the carrier is removed by a chemical etching solution.
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7123575A JPH08316631A (en) | 1995-05-23 | 1995-05-23 | Manufacture of multilayer wiring board |
TW084113588A TW334669B (en) | 1994-06-22 | 1995-12-19 | Process for producing multilayer printed circuit board |
EP95309303A EP0744884A3 (en) | 1995-05-23 | 1995-12-20 | Process for producing multilayer printed circuit board |
SG1995002262A SG46967A1 (en) | 1995-05-23 | 1995-12-21 | Process for producing multilayer printed circuit board |
CN95121131A CN1053081C (en) | 1995-05-23 | 1995-12-21 | Method for producing multi-layer printing circuit board |
KR1019950053751A KR100220264B1 (en) | 1995-05-23 | 1995-12-21 | Manufacture of multilayer wiring board |
US08/576,488 US5690837A (en) | 1995-05-23 | 1995-12-21 | Process for producing multilayer printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7123575A JPH08316631A (en) | 1995-05-23 | 1995-05-23 | Manufacture of multilayer wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08316631A true JPH08316631A (en) | 1996-11-29 |
Family
ID=14863982
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7123575A Pending JPH08316631A (en) | 1994-06-22 | 1995-05-23 | Manufacture of multilayer wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH08316631A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6902824B2 (en) | 2000-04-28 | 2005-06-07 | Mitsui Mining & Smelting Co., Ltd. | Copper foil and metal foil with carrier foil for printed wiring board, and semi-additive process for producing printed wiring board using the same |
JP2008036995A (en) * | 2006-08-08 | 2008-02-21 | Namics Corp | Low pressure thermocompression bonding apparatus |
JP2010098086A (en) * | 2008-10-16 | 2010-04-30 | Shinko Electric Ind Co Ltd | Method of manufacturing wiring board |
JP2010199616A (en) * | 2010-05-12 | 2010-09-09 | Shinko Electric Ind Co Ltd | Method of manufacturing wiring board |
JP2011222318A (en) * | 2010-04-09 | 2011-11-04 | Toyota Industries Corp | Cathode active material for lithium ion secondary battery obtained by overcharge/overdischarge treatment |
-
1995
- 1995-05-23 JP JP7123575A patent/JPH08316631A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6902824B2 (en) | 2000-04-28 | 2005-06-07 | Mitsui Mining & Smelting Co., Ltd. | Copper foil and metal foil with carrier foil for printed wiring board, and semi-additive process for producing printed wiring board using the same |
JP2008036995A (en) * | 2006-08-08 | 2008-02-21 | Namics Corp | Low pressure thermocompression bonding apparatus |
JP2010098086A (en) * | 2008-10-16 | 2010-04-30 | Shinko Electric Ind Co Ltd | Method of manufacturing wiring board |
JP4533449B2 (en) * | 2008-10-16 | 2010-09-01 | 新光電気工業株式会社 | Wiring board manufacturing method |
US8394225B2 (en) | 2008-10-16 | 2013-03-12 | Shinko Electric Industries Co., Ltd. | Method of manufacturing wiring substrate |
US8518203B2 (en) | 2008-10-16 | 2013-08-27 | Shinko Electric Industries Co., Ltd. | Method of manufacturing wiring substrate |
JP2011222318A (en) * | 2010-04-09 | 2011-11-04 | Toyota Industries Corp | Cathode active material for lithium ion secondary battery obtained by overcharge/overdischarge treatment |
JP2010199616A (en) * | 2010-05-12 | 2010-09-09 | Shinko Electric Ind Co Ltd | Method of manufacturing wiring board |
JP4546581B2 (en) * | 2010-05-12 | 2010-09-15 | 新光電気工業株式会社 | Wiring board manufacturing method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6500566B1 (en) | Very ultra thin conductor-layers for printed wiring boards | |
US6451710B1 (en) | Method of manufacturing multi-layer printed wiring board | |
JP2002539645A (en) | Laminates for multilayer printed circuits | |
US6702916B2 (en) | Very ultra thin conductor layers for printed wiring boards | |
JPH08316631A (en) | Manufacture of multilayer wiring board | |
JP2003251773A (en) | Metal laminated film | |
JPWO2014046256A1 (en) | Metal foil with carrier | |
JPH0936550A (en) | Manufacture of multilayer printed-wiring board | |
US6316733B1 (en) | Component for use in forming printed circuit boards | |
JPH11204942A (en) | Manufacture of multilayer wiring board | |
WO2000078107A1 (en) | High density substrate and methods for manufacturing same | |
JPH1187923A (en) | Manufacture of multilayered wiring board | |
TWI796378B (en) | Method of manufacturing patterned metal foil-clad laminate, and patterned metal foil-clad laminate | |
JPH10261872A (en) | Material for multilayer wiring board, its manufacture, and manufacture of multilayer wiring board using it | |
JPH1126933A (en) | Film-shaped adhesive for electroless plating and manufacture of printed wiring board using the same | |
JP3680321B2 (en) | Manufacturing method of multilayer printed wiring board | |
JPH08288656A (en) | Manufacture of multilayered printed wiring board | |
JPH08148836A (en) | Multilayered flexrigid wiring board | |
JP2005060802A (en) | Method of depositing metallic thin film on resin film | |
JP3280604B2 (en) | Method of manufacturing metal-clad laminate, method of manufacturing printed wiring board, and method of manufacturing multilayer board | |
JPH06244561A (en) | Flex/rigid compound wiring board | |
JPH02188987A (en) | Material for wiring board and manufacture thereof | |
JPH06125175A (en) | Manufacture of multilayer printed wiring board | |
JPH0951171A (en) | Manufacture of multilayer printed board | |
JPH11150369A (en) | Manufacture of multilayer printed wiring board |