JPH0831250B2 - PCM recording device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a PCM recording apparatus having a high burst error correction capability and having a data array suitable for manual editing.

[Conventional technology]

The analog signal is sampled at a sampling frequency Fs and A / D
There is a PCM recorder or the like as a device for converting and converting into PCM data, collecting a plurality of data into a frame structure, and distributing this to a plurality of tracks to record and reproduce. For the frame and block configurations of these PCM recording / reproducing devices, refer to the document ““ ON THE SIGNAL FORMAT FOR THE IMPROVED
PROFESSIONAL USE 2 CANNELL DIGITAL AUDIO RECORDER "
Y. Isida et al., AES 79th Conv. No 2270 (A-4) ”, there is one shown in FIG. FIG.
Indicates the frame structure, 1 frame is the number of quantization bits
It consists of 16 samples of PCM data (320 bits), 16 bits of sync signal, 8 bits of control signal, and 16 bits of CI check data for error detection and correction, for a total of 360 bits. Further, FIG. 2B shows a block configuration, in which a frame-configured signal is used for PCM data in 6 tracks,
Data is recorded on a total of 8 tracks of 2 tracks for error detection and correction.

Here, the A / D-converted PCM data sequence is not frame-structured in order, but is interleaved to disperse burst errors due to dropout at the time of reproduction, and PCM data delayed for a predetermined time is generated. I try to make a frame together. FIG. 4 shows how the data is interleaved on the recording / reproducing medium. The A / D-converted PCM data is generated in the order of W ₀ , W ₁ , W ₂ , ... Here, W indicates 1-word PCM data sampled at the same time, and is data of 2 channels × 16 bits = 32 bits in this example. Also, W ₁ ′, W ₃ ′, ..., W
_Like ‘ ₁₁ ’, PCM data with ‘’ is an odd-numbered PCM data W ₁ , W ₃ , ..., W of the PCM data W _{0 to} W _11.
This is odd PCM data delayed by a delay amount d _{1 with} respect to ₁₁ . C ₀ , C ₁ , C ₂ , C ₃ are even-numbered PCM data of the above PCM data and delayed odd PCM data W ₀ , W ₁ ′,
W _2, W ₃ ', a C2 inspection data generated for ....

Even PCM data above, odd PCM data, delayed odd number
FIG. 5 shows a data interleave sequence for arranging the PCM data and the C2 check data as shown in FIG. 4, and the interleave operation will be described below with reference to this figure. First, A / D converted PCM data is even PCM data W _12i , W _{12i + 2} , ... And odd PCM data.
W _{12i + 1} , W _{12i + 3} , ..., and odd PCM data is d ₁
Be delayed. Then, the even PCM data and the C2 encoding the d ₁ delayed odd PCM data is performed, n = 4 pieces of C2
_{C4i + 3} , _{C4i + 2} , _{C4i + 1} , and _{C4i + 0} are generated as inspection data. Then, the delayed odd PCM data and two (= n−n)
_The C 2 inspection data C _{4i + 3} and C _{4i + 1} of ₁ ) are given a delay of d ₂ , and each data is given a delay of d _{3 to} 7d ₃ as shown in FIG. Here, i of W _{12i + 1} is an integer,
Therefore, this data interleave is repeated by 12 units. Also, in the example of FIG. 4, d ₁ = 20, d ₂ = 160, d ₃ = 20
(The delay amount in one block corresponds to 5).

In this way, each data is arranged as shown in FIG. That is, even-numbered PCM data and odd-numbered PCM data are arranged apart from each other, and even when a burst error occurs, correction such as average value interpolation can be performed from the preceding and following values. The reason for providing odd PCM data with different delay amounts is that if the C2 check data cannot be corrected and the code data is judged to be completely erroneous, the even PCM data is corrected by the odd PCM data W ₁ , W ₃ ,. This is to prevent abnormal noise from being generated by continuously correcting the PCM data.

A block diagram of a PCM recording / reproducing apparatus having such a data array is shown in FIG. In the figure, 1 is an input terminal of an analog signal of 2 channels, 2 is an A / D conversion circuit, 3 is an encoding circuit, 4 is a track distribution circuit, 5, 6 and 7 are modulation circuits,
8, 9 and 10 are recording amplifiers, and 11, 12 and 13 are recording heads. Also, 14,15,16 are playback heads, 17,18,19 are playback amplifiers, 2
0, 21, 22 are demodulation circuits, 23, 24, 25 are time axis correction circuits (hereinafter T
(Abbreviated as BC circuit), 26 is a decoding circuit, 27 is a digital-analog conversion circuit, 28 is a 2-channel analog output terminal, 29
Is a clock generation circuit.

Next, the operation will be described. First, on the recording side, the analog signal input from the input terminal 1 is converted by the A / D conversion circuit 2 into PCM data with the quantization bit number B = 16, and caused by the defect of the medium such as tape in the encoding circuit 3. Two types of error correction detection codes, C2 check data and C1 check data, are added so that error correction can be detected. The track distribution circuit 4 adds a control signal to the encoded signal, distributes it to 8 tracks, and sends it to the modulation circuits 5, 6, and 7. Modulation circuit 5,6,7
After being modulated to a signal suitable for recording and reproducing on the medium,
A synchronization signal is added, and the data is recorded on the medium from the recording amplifiers 8, 9, 10 through the recording heads 11, 12, 13.

On the reproducing side, the signals reproduced by the reproducing heads 14, 15, 16 are amplified by the reproducing amplifiers 17, 18, 19 and are demodulated by the demodulating circuits 20, 21, 22.
The sync signal is detected and protected by the clock recovery, and the clock and the data that separates the sync signal from the TBC circuit 2
It is sent to 3,24,25. The TBC circuits 23, 24, 25 remove the jitter, wow and flutter from the reproduced data, and the decoding circuit
Sent to 26. The decoding circuit 26 performs error correction detection based on the C1 inspection data and C2 inspection data, and the D / A conversion circuit 27
Is converted into the original analog signal and output from the output terminal 28. The control signal is the type of sampling frequency Fs,
It is used to control the device such as the presence or absence of emphasis. The clock generation circuit 29 supplies a clock to each circuit.

Next, a block diagram of the encoding circuit 3 is shown in FIG. 30 is a memory, 31 is a memory control circuit, 32 is a C1 encoder,
33 is a C2 encoder. In order to simplify the memory control circuit 31, as shown in FIG.
PCM data W ₀ from the A / D conversion circuit 2 is provided for each block.
It is good to record at the positions of W ₁ , W ₂ , .... continue,
W ₀ , W ₁ ′, W ₂ , ... In this order, the PCM data is taken out from the memory 30, C2 encoded by the C2 encoder 33, and the C2 inspection data is stored in the memory.
Record at 30. When one frame or more of C2-encoded data is stored in this way, the C1 encoder 32 performs C1 encoding.
C1 test data is generated. The data encoded in this way is sent to the track distribution circuit 4.

Since the conventional PCM recording / reproducing apparatus is configured as described above, the following performance can be obtained. As can be seen from FIG. 4, the C2-encoded data is distributed in 61 blocks at equal intervals in 4-block units, so the error correction capability when errors occur in block units is When detecting and correcting the error with the C2 code, up to 4 errors can be corrected, so that up to 16 block burst errors can be corrected.

On the other hand, let us consider a case where hand-cut editing is performed with such a PCM recording / reproducing apparatus. FIG. 8 is a conceptual diagram at the time of manual cutting editing.
Suppose media 1 and 2 recorded separately are connected at a connection point.
Since the media 1 and 2 are recorded separately, when reproduced from the left side, in the medium 1, the signals are reproduced in the order of the normal reproduction section A, the error correction section B, and the error correction section C. On the medium 2, the signals are reproduced in the reverse order, that is, the error correction section C, the error correction section B, and the normal reproduction section A in this order. Here, the error correction section B refers to a section in which the original signal can be restored by performing error correction with the C1 and C2 codes, and the error correction section C cannot correct errors, but even PCM data or odd PCM data. It is a section in which data is reproduced correctly and an error can be interpolated every other sample. Since the signals of the mediums 1 and 2 are reproduced in this manner, the signals in the error correction section C overlap in time as shown in FIG. In this portion, the signal of the medium 1 is faded out, and the signal of the medium 2 is faded in and added (hereinafter referred to as crossfade), whereby the reproduction signal at the hand-cut edit point can be smoothed. This crossfade section is determined by the data array in Fig. 4,
There are 12 blocks between the last word W ₁₀ of even PCM data and the first word W ₁ of odd PCM data.

Considering concrete values here, the sampling frequency Fs
Is 48 KHz, 1 frame contains 2 channels of data.
Since it is composed of 0 pieces and PCM data is arranged on 6 tracks, the frequency of one block is 48 / (10 × 6) = 0.8 KHz. Therefore, 12 blocks in the crossfade section are 12 / 0.8
KHz = 15msec. Actually, an error occurs near the hand-cutting edit point, so this time becomes even shorter. Also,
In the above example, the number of quantization bits was considered to be 16, but if it is set to 20 bits, the crossfade time becomes short.

[Problems to be solved by the invention]

Since the conventional PCM recording device is configured as described above, there is a problem that the crossfade section at the time of hand-cut editing can take only 12 blocks, and it cannot cope with the case where a long crossfade time is required.

The present invention has been made to solve the above problems, and has a PCM recording having a PCM data array in which the memory capacity used is constant and the crossfade section can be lengthened without degrading the burst error correction capability. The purpose is to obtain the device.

[Means for solving problems]

A PCM recording apparatus according to the present invention is a PC for converting analog signals of N channels (N is an integer) from analog to digital.
After converting to M data, adding error correction code to the PCM data, and combining some data into a frame structure, Tr pieces (Tr is an integer) are formed along the longitudinal direction of the recording / reproducing medium. In a PCM recording device that distributes and records in tracks, encoding is performed from one or more even-numbered PCM data of continuous PCM data and one or more odd-numbered PCM data delayed by a predetermined amount. An encoding means for generating a number (n is an integer of 1 or more) of the inspection data, and when recording the even-numbered, odd-numbered and delayed odd-numbered PCM data and the inspection data on a recording / reproducing medium, Data is the even-numbered PCM data, n ₁ (n ₁ is 0 ≦ n
₍₁ ≤ n integer) inspection data, delayed odd-numbered PCM data, and (n-n ₁ ) inspection data, one data is located in a separate frame and distributed over Tr tracks. By providing the data interleaving means arranged in such a manner, even PCM data and odd PCM data are separated as much as possible, and error check data is generated from even PCM data and delayed odd PCM data, and a part of the even PCM data is generated.
It is arranged between the CM data and the delayed odd PCM data, and the remaining error check data is arranged after the delayed odd PCM data.

[Action]

According to the present invention, since the PCM data and the error check data are evenly distributed within the determined memory capacity by the configuration as described above, the burst error correction capability is maximized, and the even PCM data and the odd PCM data are Since they are separated as much as possible, a large crossfade section can be taken when editing by hand.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing the arrangement of PCM data on a recording / reproducing medium. A / D converted PCM data is W ₀ , W ₁ , W ₂ ,
It is generated in the order of. W ₀ , W ₂ , W ₄ , ... Are even PCM data, W ₁ , W ₃ , W ₅ , ... Are odd PCM data, and W ₁ ′, W ₃ ′, W
₅ 'is an odd PCM data delayed. C ₃ , C ₂ , C ₁ , C ₀
C2 code check data is generated from even PCM data and delayed odd PCM data. The inspection data C ₃ and C ₁ are arranged after the even PCM data, and the inspection data C ₂ and C ₀ are arranged after the delayed odd PCM data. Each piece of PCM data is arranged in blocks of 4 blocks.

Next, a method of generating the data arrangement of FIG. 1 will be described with reference to the encoding of FIG. 2 and the diagram showing the data interleaving sequence thereof. Of the A / D converted PCM data, odd PCM data W _{12i + 1} , W _{12i + 3} , ... Of them are delayed by d ₁ . Next, C2 encoding is performed from the even PCM data and the delayed odd PCM data, and C _{4i + 3} , C are obtained as n = 4 C2 check data.
Generates _{4i + 2} , C _{4i + 1} , and C _{4i + 0} . Then, the delayed odd PCM data and n−n ₁ = 2 C2 inspection data C _{4i + 2} , C
_{4i + 0} is given a delay of d ₂ and each data has a _second delay
As shown in the figure, a delay of d _{3 to} 7d ₃ is given. In this way, the data arrangement shown in FIG. 1 is obtained. Where W _{12i + 1}
I is an integer and is repeated in 12 units. If one word has 2 channels and 16 bits, W _12i and W _{12i + 7} are arranged in the same track. Therefore, from the frame structure of FIG. 3, 320 / (2 × 16 × 2) = 5 times the second After the sequence shown in the figure is repeated, C1 encoding is performed for each track to generate C1 inspection data. The amount of delay in one block is 5
Therefore, d ₁ = 40, d ₂ = 160, d ₃ = 20.

The encoding circuit for obtaining the above data arrangement is
A memory control circuit in the encoding circuit 3 shown in FIG.
It is only necessary to change 31 to match the delay amount shown in FIG. 2, and the memory capacity may be the capacity corresponding to 61 blocks as in the conventional case.
Further, the decoding circuit 26 can be easily obtained by constructing the sequence opposite to that of FIG.

The following performance is obtained with a PCM recording device having such a data arrangement. That is, the burst error correction capability when an error occurs in block units is as follows:
When correcting an error with a code, up to 4 errors can be corrected, so that up to 16 blocks can be corrected, which is the same as the conventional example. Next, the cross-fade section at the connection point in the case of performing the hand-cutting editing is improved to 20 blocks between the last data W ₁₀ of the even PCM data and the first data W ₁ of the odd PCM data. I understand. This is 25 msec when Fs = 48 KHz, which is 1.7 times the conventional value.

In the above embodiment the number of C2 inspection data arranged after each odd PCM data delayed an even PCM data the same, and although the _{d 1 = (n-n 1} ) × d 3, n 1 ≠
The same effect can be obtained with n ₂ . Also, d ₁ = (n−n ₁ ) ×
The maximum effect is obtained at d ₃ , but it goes without saying that d ₁ ≠ n ₂ × d ₂ .

Further, in the above embodiment, N = 2 and Tr = 8 are set, but it is obvious that other integers can be applied.

〔The invention's effect〕

As described above, according to the PCM recording apparatus of the present invention, an N-channel (N is an integer) analog signal is converted from analog to digital to PCM data, and an error correction code is added to the PCM data. In a PCM recording device that records some data in a frame structure that is distributed and recorded in Tr (Tr is an integer) tracks that are formed along the longitudinal direction of the recording / reproducing medium. Coding is performed from one or more even-numbered PCM data and one or more odd-numbered PCM data delayed by a predetermined amount to generate n (n is an integer of 1 or more) check data. Means and the even-numbered, odd-numbered, and delayed odd-numbered PCM data and the inspection data are recorded on the recording / reproducing medium, the data are recorded in the even-numbered PCM data, n ₁ (n ₁ is 0 integer of ≦ n ₁ ≦ n) test of Data, odd PCM data delayed, and data interleaving means for arranging so that each one of data located in a separate frame, and dispersed in Tr pieces of tracks in the order of (n-n ₁₎ pieces of inspection data The C2 code is divided into even PCM data and the delayed odd PCM data which are included in the C2 code, and the C2 inspection data is divided and arranged at equal intervals, and the odd PCM data is separated from the even PCM data as much as possible. Therefore, it is possible to obtain the maximum burst error correction capability and the ability to lengthen the crossfade section at the hand-cutting edit point with a fixed memory capacity.

[Brief description of drawings]

FIG. 1 is a data layout diagram on a recording / reproducing medium of a PCM recording apparatus according to an embodiment of the present invention, FIG. 2 is a conceptual diagram showing its encoding and a data interleave sequence, and FIG. 3 is a data frame of the apparatus. FIG. 4 is a conceptual diagram showing a block configuration, FIG. 4 is a data arrangement diagram on a recording / reproducing medium of a conventional device, FIG. 5 is a conceptual diagram showing an encoding and data interleaving sequence thereof, and FIG. 6 is a block diagram of a PCM recording / reproducing device. , FIG. 7 is a block diagram of the encoding circuit, and FIG. 8 is a conceptual diagram showing a reproduction signal at the time of hand-cut editing. 30 …… Memory, 31 …… Memory control circuit, 33 ……
C2 encoder. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (2)

[Claims] 1. An N-channel (N is an integer) analog signal is analog-to-digital converted and converted into PCM data.
An error correction code is added to the CM data, some data are put together into a frame structure, and this is distributed and recorded on Tr (Tr is an integer) tracks formed along the longitudinal direction of the recording / reproducing medium. In a PCM recording device, one or more even-numbered PCMs of continuous PCM data
Encoding means for encoding n pieces (n is an integer of 1 or more) of data by encoding data and one or more odd-numbered PCM data delayed by a predetermined amount, and the even-numbered, odd-numbered, and Delayed odd numbered PC
When the M data and the inspection data are recorded on the recording / reproducing medium, the data are the even-numbered PCM data, n ₁ (n ₁
Is 0 ≦ n ₁ ≦ n) inspection data, delayed odd-numbered PCM data, and (n−n ₁ ) pieces of inspection data, in this order 1
And a data interleaving means for arranging one data in a separate frame and distributing it in Tr tracks. 2. The even-numbered PCM data, n ₁ pieces of inspection data, the delayed odd-numbered PCM data, and (n−n ₁ ) pieces of inspection data are arranged at equal intervals, and the data are arranged. When the delay amount between them is d ₃ , the delay amount between this d ₃ and the delay amount d ₁ of the delayed odd-numbered PCM data is d ₁ = (n
The PCM recording device according to claim 1, characterized in that there is a relationship of −n ₁ ) × d ₃ .