JPH08307173A - Compander circuit and radio telephone system - Google Patents

Abstract

PURPOSE: To suppress production of noise by providing an input signal amplitude detection circuit and a control circuit to adjust the attenuation of an attenuation circuit depending on a fluctuation of an amplitude of an output signal of the detection circuit so as to adjust a period of stopping revision of the attenuation of the attenuation circuit longer or shorter thereby smoothing adjustment of an electronic volume with respect to the fluctuation state of a level of an input signal. CONSTITUTION: When an amplitude detection circuit 11 detects a fluctuation in an amplitude of an input signal, a control circuit 12 receiving an output signal of the amplitude detection circuit 11 sets longer a period to stop revision of an attenuation of an electronic volume 13 when the fluctuation in the amplitude of the input signal is below a prescribed value and sets shorter a period to stop revision of an attenuation of the electronic volume 13 when the fluctuation in the amplitude of the input signal exceeds the reference value. Since the fluctuation in the amplitude of the input signal is detected and the period to revise the attenuation of the electronic volume 13 is adjusted by the control circuit 12, a rapid change in the attenuation is not caused and a steep amplitude change of the output signal is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compander circuit and a radiotelephone device, and more particularly, to a circuit for amplifying or attenuating an analog signal to compress or expand an output level with respect to an input level, and its applied device. It is about.

[0002]

2. Description of the Related Art In recent years, S / N (signal to noise) has been added to telephones that use radio such as car telephones and cordless telephones.
A so-called compander circuit is used to prevent the deterioration of the ratio. The compander circuit is a generic term for both the compressor circuit and the expander circuit. The compressor circuit adjusts the gain of the analog signal to compress the output level with respect to the input level, and the expander circuit adjusts the gain of the analog signal to expand the output level with respect to the input level. By applying such a compander circuit to a slave unit or a master unit of a wireless telephone device, noise intervening in a radio wave can be removed during transmission / reception between the slave unit and the master unit. The first characteristic required of the compander circuit is that the sound quality is less deteriorated.

FIG. 9 shows a configuration diagram of a compander circuit according to a conventional example. In FIG. 9, 1 is a level detection circuit, which is a rectifier circuit 1A and a low-pass filter (LPF) 1.
B, Comparator 1C. The rectifier circuit 1A full-wave rectifies an analog input signal (hereinafter simply referred to as an input signal) such as a voice signal or an acoustic signal and outputs the rectified voltage to the low pass filter 1B. The filter 1B removes a high frequency component from the rectified voltage to form a DC voltage DC, and outputs this voltage DC to the comparator 1C. The comparator 1C compares the magnitude of the DC voltage DC with the magnitude of the reference voltage VR to detect the level of the input signal.

A volume control circuit 2 comprises an overflow counter 2A, a clock stop circuit 2B and an up / down counter 2C. The overflow counter 2A outputs the output data of the comparator 1C to the clock signal C.
It counts based on K and outputs down data (hereinafter referred to as D data) or up data (hereinafter referred to as U data) to the up / down counter 2C.

Further, the overflow counter 2A outputs an enable signal (hereinafter referred to as an EN signal) to the clock stop circuit 2B. EN signal is up / down counter 2
It is a control signal for turning on / off a clock signal for supplying to C, and when the level of the input signal is constant,
When the level of the input signal changes to "H" level, it changes to "L" level. Clock stop circuit 2B is E
When the N signal = "L" level, the clock signal is turned on, and when the EN signal = "H" level, the clock signal is turned off. The up / down counter 2C generates volume control data based on D or U data and a clock signal.

Reference numeral 3 is an electronic potentiometer, which selects one reference voltage VR from a plurality of reference voltages VREF according to volume control data, and uses this voltage VR as a comparator 1.
Output to C. An electronic volume 4 amplifies or attenuates the input signal according to the volume control data to adjust the output level with respect to the input level. When this compander circuit is used as a compressor circuit, the output signal of the electronic volume control 4 is input to the level detection circuit 1 in FIG. When this is used as an expander circuit, the input signal of the electronic volume 4 is input to the level detection circuit 1.

Next, the operation of the expander circuit will be described with reference to FIG. FIG. 10 shows a case in which an input signal of a constant level undergoes a large stepwise level change.
First, in the level detection circuit 1, the input signal is full-wave rectified by the rectifier circuit 1A, and the rectified voltage is converted into the DC voltage DC through the low-pass filter 1B. The magnitude of this voltage DC and the reference voltage VR from the electronic volume 3 are set. Of the input signal is compared by the comparator 1C and the level of the input signal is detected.

In the volume control circuit 2, the overflow counter 2A counts the output data of the comparator 1C based on the clock signal CK. For example,
When the "H" level continues, U data is output to the up / down counter 2C. Further, the overflow counter 2A outputs an EN signal to the clock stop circuit 2B. Here, when the level of the input signal changes and the counter 2A overflows, the EN signal becomes "L" level.

Further, when the level of the input signal is constant and the counter 2A does not overflow, EN
The signal becomes "H" level. In the clock stop circuit 2B, the clock signal is turned on by the EN signal = “L” level.
Then, this clock signal is output to the up / down counter 2C. The up / down counter 2C generates volume control data from the D data and the clock signal, and outputs this data to the electronic volumes 3 and 4. As a result, in the electronic volume 3, one reference voltage VR is selected from the plurality of reference voltages VREF based on the control data, and this voltage VR is output to the comparator 1C. In the electronic volume 4, the input signal is attenuated by following the voltage DC of the low-pass filter 1B in conjunction with the electronic volume 3, and the output level with respect to the input level is extended.
As a result, the output signal VOUT is output from the electronic volume 4, and the deterioration of the S / N ratio due to the gain variation is prevented.

[0010]

However, as shown in FIG. 11, even when the level of the input signal continuously changes, the comparator 1C outputs data that does not cause overflow to the overflow counter 2A. In that case, the EN signal is fixed to the "H" level, so that the clock signal to the up / down counter 2C is turned off by the clock stop circuit 2B. Even when the level of the input signal continuously changes during the period in which the EN signal is at the “H” level (hereinafter referred to as the period in which the change in the gain such as the amplification degree and the attenuation degree is stopped). , EN signal does not go to "L" level, so the up / down counter cannot be operated.

Therefore, even when the level of the input signal continuously changes, the gain change stop period is inserted, and when the EN signal changes from "H" to "L" level, I have already missed the time to adjust the electronic volume. At this point, the low-pass filter 1B
Output has changed greatly and up / down counter 2
In C, D data and the clock signal turned on by the clock stop circuit 2B generate control data that causes the gain to change abruptly.

As a result, the output of the electronic volume 3 that has received this control data changes in a large stepwise manner with respect to the output of the low pass filter 1B, so that the gain of the electronic volume 4 suddenly changes. Noise occurs at this change point. This noise is ringing tone RBT (Ring BackTone: 40) in the wireless telephone device.
When a gain of a signal obtained by amplitude-modulating a sine wave of 0 Hz with a sine wave of 16 Hz) is changed by a compander circuit, it appears as an offensive sound, which leads to deterioration of the S / N ratio of the compander circuit.

The present invention was created in view of the problems of the conventional example, and it is possible to smoothly adjust the electronic volume and suppress the generation of noise even when the level of the input signal continuously changes. It is an object of the present invention to provide a compander circuit and a radiotelephone device that enable the above.

[0014]

As shown in FIG. 1, a first compander circuit according to the present invention includes an attenuator circuit for attenuating the amplitude of an input signal and a variation in the amplitude of the input signal. Inputting the output signal of the amplitude detection circuit and the amplitude detection circuit, and when the fluctuation of the amplitude of the input signal is less than or equal to a reference, a period for stopping the change of the attenuation degree of the attenuation circuit is set to be long, and the input signal And a control circuit for adjusting the attenuation degree of the attenuation circuit by setting a short period for stopping the change of the attenuation degree of the attenuation circuit when the amplitude exceeds the reference.

As shown in FIG. 8A, the second compander circuit of the present invention detects an amplitude circuit that amplifies the amplitude of an input signal and a fluctuation of the amplitude of the output signal of the amplifier circuit. When the amplitude detection circuit and the output signal of the amplitude detection circuit are input and the fluctuation of the amplitude of the output signal of the amplification circuit is less than or equal to a reference, a long period is set to stop changing the amplification degree of the amplification circuit, And a control circuit for adjusting the amplification degree of the amplification circuit by setting a short period for stopping the change of the amplification degree of the amplification circuit when the amplitude of the output signal of the amplification circuit exceeds a reference. And

In the first and second compander circuits of the present invention, the control circuit preferably adjusts a period during which the change in the attenuation of the attenuation circuit is stopped or a period during which the change in the amplification of the amplifier circuit is stopped. An overflow counter that counts the output signal of the amplitude detection circuit based on an adjustment signal, outputs up data or down data, and outputs a clock control signal, and a clock stop circuit that stops the clock signal based on the clock control signal. An up / down counter that outputs volume control data based on the clock signal and up data or down data; a memory circuit that temporarily holds the up data or down data; and the up data or down data held in the memory circuit, Compare with the output signal of the amplitude detection circuit Characterized in that it consists comparing circuit for outputting the adjustment signal.

As shown in FIG. 6, a third compander circuit of the present invention is the first and second compander circuits, wherein the control circuit outputs the output signal of the amplitude detection circuit to a memory circuit. It is characterized by holding the data temporarily and comparing the data held in the memory circuit with the up data or the down data output from the overflow counter.

As shown in FIG. 7, the first radiotelephone device of the present invention has a compressor circuit for amplifying an input signal and compressing an output amplitude with respect to an input amplitude, and a compressor circuit for compressing the output signal. An expander circuit that attenuates the output signal of the receiver and expands the output amplitude with respect to the input amplitude. The circuit comprises the first compander circuit of the present invention, and the compressor circuit comprises a second compander circuit.

A second wireless telephone device of the present invention comprises a first wireless telephone used as a slave and a second wireless telephone used as a master of the slave, and the first wireless telephone. And a second radiotelephone comprising the first radiotelephone device of the present invention to achieve the above object.

[0020]

[Operation] The operation of the first compander circuit of the present invention will be described. First, when the amplitude detection circuit detects a variation in the amplitude of the input signal, the control circuit that has input the output signal of the amplitude detection circuit determines that the amplitude of the input signal is constant when the variation in the amplitude of the input signal is less than or equal to the reference. , And set a longer period to stop changing the attenuation of the attenuation circuit. Further, the control circuit, when the fluctuation of the amplitude of the input signal exceeds the reference,
It is determined that “the amplitude of the input signal changes”, and the period for stopping the change of the attenuation after the change of the attenuation of the attenuation circuit is set to be short.

As described above, in the first compander circuit of the present invention, when the amplitude of the input signal is constant, the period for stopping the change of the attenuation degree is set to be long, so that the attenuation circuit during the period is changed. Attenuation change can be prevented. Further, when the amplitude of the input signal changes, the period for stopping the change of the attenuation degree is set to be short, so the change cycle of the attenuation degree becomes short, and the attenuation circuit's attenuation follows the amplitude change of the input signal. The degree can be adjusted in small steps.

Therefore, in the case where the input signal changes in the direction of abrupt increase or decrease, it is possible to set a short period for stopping the change of the attenuation. In addition, when the input signal changes gradually or continuously in the direction of increasing or decreasing, the period for which the change of the attenuation is stopped can be set to be long, so that no sudden change in the attenuation occurs and the output signal is not changed. It is possible to prevent a sudden change in the amplitude.

In the second compander circuit of the present invention, when the amplitude of the output signal of the amplifier circuit is constant, the period for stopping the change of the amplification degree is set to be long, so that the amplifier circuit during this period is The change in amplification can be prevented. Further, when the amplitude of the output signal of the amplification circuit changes, the period for stopping the change of the amplification degree is set to be short, so the change cycle of the amplification degree becomes short and the amplitude change of the output signal of the amplification circuit is tracked. Then, the amplification degree of the amplifier circuit can be changed in small steps.

Therefore, in the case where the output signal of the amplifier circuit changes in the direction of abrupt increase or decrease, the period for stopping the change of the amplification degree can be set short. In addition, when the output signal of the amplifier circuit changes gradually or continuously in the direction of increasing or decreasing, the period for stopping the change of the amplification degree can be set to be long, so that no sudden change in the amplification degree occurs. ,
It is possible to prevent a sudden change in the amplitude of the output signal.

In the radiotelephone apparatus of the present invention, the expander circuit is composed of the first compander circuit of the present invention and the compressor circuit is composed of the second compander circuit. Therefore, the compressor circuit and the expander circuit receive By sandwiching a communication path such as a transmitter and a transmitter, noise peculiar to radio waves can be removed, and noise at the time of compressing and expanding the level of a call signal can be removed.

[0026]

Embodiments of the present invention will now be described with reference to the drawings. 1 to 8 are explanatory views of a compander circuit and a wireless telephone device according to an embodiment of the present invention. (1) Description of First Embodiment FIG. 1 shows a configuration diagram of a compander circuit according to a first embodiment of the present invention. In FIG. 1, 11 is a level detection circuit for detecting the level (amplitude) of the input signal, which is an example of an amplitude adjustment circuit. The level detection circuit 11 includes a rectifier circuit 21, a low pass filter circuit (LPF) 22 and a comparator 23. The rectifier circuit 21 is an analog input signal such as a voice signal or an audio signal (hereinafter simply referred to as an input signal VIN).
Full-wave rectified, and this rectified voltage is applied to the low-pass filter 22.
Output to. The filter 22 removes a high frequency component from the rectified voltage to obtain a DC voltage DC, and outputs this voltage DC to the comparator 23. The comparator 23 compares the magnitude of the DC voltage DC with the magnitude of the reference voltage VR to compare the input signal V
Detect the IN level. The output data (DATA) of the comparator 23 is “H” when the voltage DC <VR.
(High) level and when the voltage DC> VR,
It becomes the “L” (low) level.

Reference numeral 12 is a volume control circuit, and when the level of the input signal VIN is constant according to the output data of the comparator 23, the period for stopping the change of the attenuation of the electronic volumes 13 and 14 is set to be long, Alternatively, when the level of the input signal VIN changes, the period in which the change in the attenuation of the electronic volume 13 or 14 is stopped is set to be short.

The volume control circuit 12 includes a variable bit length overflow counter 24 and a clock stop circuit 2.
5, D-type flip-flop circuit (hereinafter referred to as FF circuit) 26, comparison circuit 27, and up-down counter 28
Consists of. The overflow counter 24 counts the output data of the comparator 23 based on the clock signal CK and a bit length variable signal (adjustment signal: BLEN signal), and outputs down data (hereinafter D data) or up data (hereinafter U data). The data is output to the up / down counter 28. For example, counter 2
As shown in FIG. 2, 4 is four flip-flop circuits F1 to F4 and one two-input AND circuit 201,
Two-input NAND circuit 202, two-input OR circuit 206, and 5
Two two-input NOR circuits 203, 204, 207, 208 and 209
Consists of.

The circuits F1 to F4 form a 4-bit counter, and the two-input NOR circuits 203 and 207 make this 4-bit counter a 2-bit counter function based on the BLEN signal. The output of each of the circuits F1 and F2 is connected to the input of the circuit 202 and the input of the circuit 206, respectively.
The respective outputs of 4 are connected to the inputs of the circuit 201 and the circuit 205, respectively. Also, the output of the circuit 201 and BLE
The N signal is input to the circuit 203, and the output of the circuit 205 and BLE
The N signals are input to the circuit 207, respectively. Circuit 202
And the output of circuit 203 are connected to circuit 204
The output of 6 and the output of circuit 207 are connected to circuit 208, respectively. The output of circuit 204 is D or U data.

The BLEN signal is a signal for switching the 4-bit counter to a 2-bit counter, and is a signal for changing the bit length of the counter output from 4 bits to 2 bits. By changing this bit length, the electronic volume 1
It is possible to adjust the period in which the change of the attenuation degree of 3 or 14 is stopped.
As for the output of the circuit 204, depending on the content of the output data of the comparator 23, when the “H” level continues, U data is output to the up / down counter 28, and when the “L” level continues, the D data is up / down counter. Two
8 is output.

Further, the overflow counter 24 outputs an enable signal (clock control signal: hereinafter referred to as EN signal) to the clock stop circuit 25. The EN signal is a control signal that is output from the circuit 209 and turns on / off the clock signal (CK) for supplying to the up / down counter 28. The EN signal becomes "H" level when the level of the input signal VIN is constant, and becomes "L" level when the level of the input signal VIN changes. In addition, EN
The pulse width of the “H” level of the signal is the electronic volume 13
This is a period in which the change of the attenuation degree of or 14 is stopped (hereinafter referred to as an attenuation degree change stop period), and the pulse width of the “L” level is equal to the period of changing the attenuation degree of the electronic volume 13 or 14.

The clock stop circuit 25 stops the clock signal based on the EN signal. For example, the circuit 25 is composed of a two-input NOR circuit and turns off the clock signal when the EN signal = “H” level and turns on the clock signal when the EN signal = “L” level. The FF circuit 26 is an example of a memory circuit, and temporarily holds the U data or D data previously output from the overflow counter 24 to the up / down counter 28. The comparison circuit 27 compares the U data or D data held in the FF circuit 26 with the output data of the comparator 23 this time, and outputs the BLEN signal to the overflow counter 24. The comparison circuit 27 comprises a two-input EXNOR circuit as shown in FIG.

For example, the comparison circuit 27 determines that the logical value of the previous U data or D data matches the logical value of the output data of the comparator 23 this time, that is, the input signal V.
When IN changes continuously, B of "L" level
The LEN signal is output to the counter 24. In other cases, that is, when there is no change in the input signal VIN, the BLEN signal of "H" level is output to the counter 24.

The up / down counter 28 generates volume control data based on the D or U data and the clock signal. The control data is, for example, 3-bit data D
0 to D2, and 8 kinds of data are electronic volume 13
And is output to 14. Reference numeral 13 denotes an electronic volume that attenuates the input signal VIN according to the control data D0 to D2,
It is an example of an attenuation circuit. For example, as shown in FIG. 3A, the electronic volume 31 used in the compressor circuit is
Eight reference resistors R for adjusting the gain, eight switch elements S0 to S7 for selecting the reference resistors, and control data D0 to
It comprises a decoder 301 for decoding D2 and an operational amplifier 302 for amplifying the input signal VIN. The compressor circuit amplifies the input signal VIN and compresses the output level with respect to the input level. FIG. 4B shows the input / output characteristics of the compressor circuit. In FIG. 4 (B), the vertical axis is the relative output level Gout dB, and the horizontal axis is the relative input level Gin.
It is dB. Table 1 shows the control data D in the compressor circuit.
The contents of 0 to D2, the switch elements S0 to S7 that are turned on, and the relationship between the gains are summarized.

[0035]

[Table 1]

As shown in FIG. 4A, the electronic volume 32 used in the expander circuit has nine reference resistors R for adjusting the gain and eight switch elements S0 to S7 for selecting the reference resistors. And a decoder 303 for decoding the control data D0 to D2, and an operational amplifier for attenuating the input signal VIN.
It consists of 304. The expander circuit attenuates the input signal VIN and extends the output level with respect to the input level. FIG. 4C shows the input / output characteristic of the expander circuit. In FIG. 4C, the vertical axis represents the relative output level G.
out dB, and the horizontal axis is the relative input level G in dB. Table 2 shows the control data D0 to D2 in the expander circuit.
The above is a summary of the relationship among the contents of, the switch elements S0 to S7 that are turned on, and the gain.

[0037]

[Table 2]

Reference numeral 14 denotes an electronic potentiometer which selects one reference voltage VR from a plurality of reference voltages VREF according to the control data D0 to D2 and outputs this voltage VR to the comparator 23. As shown in FIG. 3B, the electronic volume 14 has nine reference resistors R for dividing the reference voltage VREF.
And eight switch elements S0 to S7 for selecting the reference resistance
And a decoder 401 for decoding the control data D0 to D2.

Next, the operation of the compander circuit (expander) of this embodiment will be described. For example, an input signal V obtained by amplitude-modulating a 400 Hz sine wave with a 16 Hz sine wave.
When adjusting the level of IN (see FIG. 5), first, the level detection circuit 11 detects the level of the input signal VIN. At this time, the input signal VIN is full-wave rectified by the rectifier circuit 21,
This rectified voltage is converted into a DC voltage DC by the low-pass filter 22, and the magnitude of this voltage DC and the magnitude of the reference voltage VR are compared by the comparator 23. The output data (DATA) of the comparator 23, when the voltage DC <VR,
It goes to "H" (high) level, and goes to "L" (low) level when the voltage DC> VR.

Further, in the volume control circuit 12, FIG.
Since the level of the input signal VIN is increasing as shown in, the output data of the comparator 23 continues to be "H" level. Then, the overflow counter 24
The output data of the respective flip-flop circuits F1 to F4 are all at "H" level. In response to this, the output of the two-input AND circuit 201 is at the “H” level, and the two-input NAND circuit 202
Output of the two-input NOR circuit 205 becomes "L" level, and the output of the two-input OR circuit 206 becomes "H" level.

Further, in this embodiment, since the input signal VIN is continuously changing, the U data previously output from the overflow counter 24 to the up / down counter 28 and the output data of the comparator 23 at this time coincide with each other.
At this time, the BLEN signal becomes "L" level. Receiving this, the output of the two-input NOR circuit 203 is at "L" level,
The output of the two-input NOR circuit 207 becomes "L" level. As a result, the 4-bit counter 24 is switched to the 2-bit counter function, and 2 bits of the 4-bit counter output are used. The output of the two-input NOR circuit 204 that receives the outputs of the circuits 202 and 203, that is, the U data becomes the "H" level.

The output of the two-input NOR circuit 208 becomes "L" level, and the output of the two-input NOR circuit 209 which receives this and the output "H" level of the circuit 204, that is, E
The N signal becomes "L" level. As a result, the clock stop circuit 25 sends the clock signal to the up / down counter 2
Output to 8. The counter 28 receives the U data at the “H” level and the clock signal to generate control data D0 to D2, and outputs this data D0 to D2 to the electronic volume 13 or 1.
4 is output. At this time, in the electronic volumes 13 and 14, the attenuation change stop period is set short by the BLEN signal. Therefore, the attenuation is adjusted little by little during the period in which the U data is maintained at the “H” level, and the level of the input signal VIN is changed. Is extended.

Further, as shown in FIG. 5, when the level of the input signal VIN shifts from the increasing direction to the different direction and becomes constant, each flip-flop of the overflow counter 24
The output data of the flop circuits F1 to F4 repeat "H" or "L" level. Also, the U data previously output from the overflow counter 24 to the up / down counter 28 and the output data of the comparator 23 at this time do not match. At this time, the BLEN signal becomes "H" level. As a result, the preceding 2-bit counter is switched to the 4-bit counter and the counter output 4-bit is used. Two-input N that receives this BLEN signal = “H” level and the output of each logic circuit 201, 202, 205, 206
The output of the OR circuit 203 is an "H" level, two-input NOR circuit
The output of 207 becomes "H" level.

The output of the two-input NOR circuit 203 is at "H" level and the output of the two-input NOR circuit 207 is at "H" level. The output of the two-input NOR circuit 208 becomes "H" level, and the output of the two-input NOR circuit 209 which receives this and the output "H" level of the circuit 204, that is, the EN signal becomes "H" level. As a result, the clock stop circuit 25 stops the clock signal to the up / down counter 28, and stops changing the attenuation of the electronic volumes 13 and 14. At this time, since the attenuation degree change stop period is set to be long by the BLEN signal, it is possible to prevent the attenuation degree of the electronic volumes 13 and 14 from changing during this period.

In FIG. 5, the operation of decreasing the level of the input signal VIN from the constant level is the same as the case where the input signal VIN is continuously changing as described above. Therefore, its explanation is omitted. In this way, in the compander circuit according to the first embodiment of the present invention, when the level of the input signal VIN does not change to a certain level, the BLEN signal output from the comparison circuit 27 = “H”.
Since the overflow counter 24 functions as a 4-bit counter depending on the level, the electronic volume 13
It is possible to set the attenuation change stop period of 14 or 14 to be long. During this period, the change in the amplification degree of the electronic volume 13 or 14 can be prevented.

When the level of the input signal VIN shifts from a certain level to an increase or decrease once, the BLEN signal = “L” until the level of the input signal VIN becomes constant.
Since the counter 24 functions as a 2-bit counter depending on the level, the attenuation change stop period of the electronic volumes 13 and 14 can be set short. Therefore, the input signal VIN
If the value changes rapidly in the direction of increasing or decreasing, by setting a short attenuation change stop period,
The change in the attenuation of the electronic volume controls 13 and 14 can be made to follow the change in the input signal VIN in small steps. Further, when the input signal VIN gradually and continuously changes in the direction of increasing or decreasing, the attenuation degree change stop period can be set to be long, so that the electronic volumes 13 and 14 are attenuated with respect to the change of the input signal VIN. The change in degree can be made to follow gently. As a result, it is possible to prevent noise at the change point and abrupt amplitude change of the output signal.

(2) Description of Second Embodiment FIG. 6 is a block diagram of the volume control circuit of the compander circuit according to the second embodiment of the present invention. Unlike the first embodiment, the second embodiment temporarily holds the output data (DATA) of the level detection circuit and compares this data with the U data or D data output from the overflow counter 34. .

The volume control circuit 30 used in the second embodiment is shown in FIG. 6 in which the bit length variable type overflow counter 34, the clock stop circuit 35, and the D type flip-flop.
Flop circuit (hereinafter referred to as FF circuit) 36, comparison circuit 3
7 and an up / down counter 38. The memory circuit 36 temporarily holds the output data (DATA) of the level detection circuit based on the clock signal. The comparison circuit 37 compares the U or D data output from the overflow counter 34 to the up / down counter 38 this time with the FF.
The previous comparator 23 temporarily held in the circuit 36
Compare with the output data of. When the input signal VIN is continuously changing, this data matches,
The comparison circuit 37 outputs the BLEN signal = “L” level to the counter 34. Further, when the input signal VIN is constant, this data is different.
The LEN signal = “H” level is output to the counter 34.
Other configurations and those having the same names as those in the first embodiment have the same functions, and therefore their explanations are omitted.

As described above, in the compander circuit according to the second embodiment of the present invention, the BLE output from the comparison circuit 37 is output.
The overflow counter 34 functions as a 4-bit counter depending on the N signal = “H” level. Therefore, when there is no constant change in the level of the input signal VIN, the attenuation degree change stop period and the amplification degree change stop of the electronic volume are stopped. The period can be set long. During this period, it is possible to prevent changes in the attenuation and amplification of the electronic volume.

When the level of the input signal VIN shifts from a certain level to the direction of increasing or decreasing once, the BLEN signal = “L” until the level of the input signal VIN becomes constant.
Since the counter 34 functions as a 2-bit counter depending on the level, the attenuation change stop period or the amplification change stop period of the electronic volumes 13 and 14 can be set short.

Therefore, as in the first embodiment, the electronic volume 13 is adjusted with respect to the change of the input signal VIN by adjusting the attenuation degree change stop period and the amplification degree change stop period according to the change state of the input signal VIN. The variable gain of 14 and 14 can be smoothly controlled. (3) Description of Third Embodiment FIG. 7 shows a block diagram of a parent-child telephone to which a compander circuit according to a third embodiment of the present invention is applied. In FIG. 7, reference numeral 100 denotes a cordless telephone (slave unit), which has a microphone unit.
101, compressor circuit 102, transmitter 103, signal input / output terminal 104, antenna 105, receiver 106, expander circuit 107, and speaker section 108. 200 is a main phone (main unit), and includes an antenna 201, a signal input / output terminal 202,
205, a receiver 203, an expander circuit 204, a compressor circuit 206, and a transmitter 207.

The compressor circuit 102 is composed of the compander circuit of the first or second embodiment of the present invention, and as shown in FIG.
2. It comprises a level detection circuit 11 and an electronic volume 14. For the operation of the compressor circuit 102, refer to
The operation will be described. Further, the expander circuit 107 comprises the compander circuit of the first or second embodiment of the present invention, and as shown in FIG. 8B, the electronic volume 32, the volume control circuit 12, the level detection circuit 11 and the electronic volume are provided. It consists of 14. Since the operation of the expander circuit 107 has been described in the first embodiment, its description will be omitted.

The operation of the child device 100 of the parent-child telephone according to this embodiment will be described. First, the voice of the user is converted into a call signal by the microphone unit 101, the call signal is amplified by the compressor circuit 102, and the output level is compressed with respect to the input level. At this time, in the compressor circuit 102, when the level detection circuit 11 detects the level of the output signal of the electronic volume 12, when the detection result of the level detection circuit 11 is “the amplitude of the output signal is constant”, the volume control is performed. The circuit 12 sets the amplification change stop period of the electronic volume 31 or 14 to be long. Further, when the detection result of the level detection circuit 11 is “the amplitude of the output signal changes”, the volume control circuit 12 sets the amplification degree change stop period of the electronic volumes 31 and 14 to be short.

The call signal compressed by the compressor circuit 102 is converted into a radio wave by the transmitter 103,
This radio wave is transmitted from the antenna 105 to the parent device 200 via the signal input / output terminal 104. Further, in the parent device 200, the radio wave arriving at the antenna 201 is received by the receiver 203, and this radio wave is demodulated. The demodulated signal is expanded by the expander circuit 204. The operation of this circuit 204 is as described in the first embodiment. The call signal expanded here is sent to the telephone line via the signal input / output terminal 205. In addition, the call signal from the other party is received from the telephone line through the signal input / output terminal 205 and the compressor circuit 20
Entered in 6. The speech signal is amplified by the compressor circuit 206, and the output level is compressed with respect to the input level. The compressed call signal is converted into a radio wave by the transmitter 207, and the antenna is sent via the signal input / output terminal 202.
Transmitted from 201 to handset 100.

Further, in the slave unit 100, the radio wave arriving at the antenna 105 is received by the receiver 106, and this radio wave is demodulated. The demodulated signal is expanded by the expander circuit 107. Then, the other party's voice reaches the user's ear from the speaker unit 108. In this way, in the parent-child telephone to which the compander circuit according to the third embodiment of the present invention is applied, the compressor circuit 102 and the expander circuit 107 of the child device 100 and the expander circuit 204 and the compressor circuit 206 of the parent device 200 are provided. It is composed of the compander circuit of this embodiment. Therefore, by the compressor circuit 107 of the slave unit 100 and the expander circuit 204 of the master unit 200,
Transmitter 103, signal input / output terminal 104, antennas 105, 201
By sandwiching the receiver 203, it is possible to remove noise that enters in the propagation path of the radio wave when transmitting from the slave 100 to the master 200. Further, when receiving from the parent device 200 to the child device 200, noise entering the radio wave can be removed by the compressor circuit 206 of the parent device 200 and the expander circuit 104 of the child device 100 as in the case of transmission.

Moreover, in the compressor circuits 102 and 206 used in the parent and child telephones of this embodiment, the electronic volume 31
When the level of the output signal of 14 or 14 is constant, the amplification degree change stop period is set to be long, so that the change of the amplification degree of the electronic volume 31 or 14 during this period can be prevented.
Further, when the level of the output signal of the electronic volume 31 or 14 changes, the amplification degree change stop period is set to be short, so that the amplification degree change cycle becomes short and the electronic volume 3
The gain of the electronic volume control 31 or 14 can be adjusted in small increments by following the level change of the output signal 1 or 14.

Therefore, in the case where the output signal of the electronic volume control 31 or 14 changes gradually or continuously in the increasing or decreasing direction such as a call signal passing through the RBT circuit, the compressor circuits 102 and 206 are used. Since the amplification degree change stop period can be set to be long, a rapid change in the amplification degree does not occur, and a rapid level change in the output signal can be prevented. As a result, the S / N ratio of the parent and child phones can be improved, and the sound quality is improved.

[0058]

As described above, according to the compander circuit of the present invention, when the amplitude of the input signal is constant, the attenuation change stop period and the amplification change stop period are set long. It is possible to prevent changes in the attenuation of the attenuation circuit and the amplification of the amplifier during this period. Also, when the amplitude of the input signal changes, the attenuation change stop period and the amplification change stop period are set short, so the attenuation change cycle and the amplification change cycle become short, and the amplitude change of the input signal is suppressed. You can follow it to adjust the attenuation and amplification in small steps.

Further, in the radiotelephone device of the present invention, the compressor circuit and the expander circuit configured by the compander circuit of the present invention can remove the noise peculiar to the radio wave and the noise at the time of compressing and expanding the level. As a result, it contributes to improving the sound quality of parent-child phones, car phones and the like.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a compander circuit according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a volume control circuit according to the first embodiment of the present invention.

FIG. 3 is a configuration diagram of an electronic volume used in a compressor circuit according to each embodiment of the present invention.

FIG. 4 is a configuration diagram of an electronic volume used in an expander circuit according to each embodiment of the present invention and an input / output characteristic diagram of a compander circuit.

FIG. 5 is an operation waveform diagram of the compander circuit according to the first embodiment of the present invention.

FIG. 6 is a configuration diagram of a volume control circuit according to a second embodiment of the present invention.

FIG. 7 is a configuration diagram of a parent-child telephone to which a compander circuit according to a third embodiment of the present invention is applied.

FIG. 8 is a configuration diagram of a compressor circuit and an expander circuit according to each embodiment of the present invention.

FIG. 9 is a configuration diagram of a compander circuit according to a conventional example.

FIG. 10 is an operation (expander) waveform diagram of the expander circuit according to the conventional example.

FIG. 11 is an operation waveform diagram of a compander circuit for explaining a problem in the conventional example.

[Explanation of symbols]

1, 11 ... Level detection circuit, 2, 12 ... Volume control circuit, 3, 4, 13, 14, 31, 32 ... Electronic volume, 1A, 21 ... Rectifier circuit, 1B, 22 ... Low-pass filter, 1C, 23 ... Comparator 2A ... Overflow counter, 24, 34 ... Bit length variable overflow counter, 2B, 25, 35 ... Clock stop circuit, 2
6, F1 to F4, 36 ... D-type flip-flop circuit,
27, 37 ... Comparison circuit, 2C, 28, 38 ... Up / down counter, 100 ... Slave unit, 101 ... Microphone section, 102, 206
… Compressor circuit, 103, 207… Transmitter, 104, 202
, 205 ... Signal input / output terminal, 105, 201 ... Antenna, 106
, 203… Receiver, 107, 204… Expander circuit, 200
… Master unit, 201… Two-input AND circuit, 202… Two-input NA
ND circuit, 203-205, 207-209 ... Two-input NOR circuit, 206 ... Two-input OR circuit, 301, 303, 401 ... Decoder, 302, 304 ... Operational amplifier.

Claims (6)

[Claims] 1. An attenuator circuit for attenuating the amplitude of an input signal, an amplitude detector circuit for detecting a variation in the amplitude of the input signal, and an output signal of the amplitude detector circuit for inputting a variation in the amplitude of the input signal. When the value is equal to or less than the reference, a period for stopping the change of the attenuation of the attenuation circuit is set to be long, and when the amplitude of the input signal exceeds the reference, the period for stopping the change of the attenuation of the attenuation circuit is set to be short. And a control circuit for adjusting the degree of attenuation of the attenuation circuit. 2. An amplifier circuit that amplifies the amplitude of an input signal, an amplitude detection circuit that detects fluctuations in the amplitude of the output signal of the amplifier circuit, and an output signal of the amplitude detection circuit, and an output of the amplifier circuit. When the fluctuation of the amplitude of the signal is below the reference, the period for stopping the change of the amplification degree of the amplifier circuit is set to be long, and when the amplitude of the output signal of the amplifier circuit exceeds the reference, the amplification degree of the amplifier circuit is increased. And a control circuit that adjusts the amplification degree of the amplification circuit by setting a short period for stopping the change of the compander circuit. 3. The output signal of the amplitude detection circuit based on an adjustment signal for adjusting a period during which a change in the attenuation degree of the attenuation circuit is stopped or a period during which a change in the amplification degree of the amplifier circuit is stopped. An overflow counter that counts, outputs an up data or a down data, and outputs a clock control signal, and a clock stop circuit that stops the clock signal based on the clock control signal,
An up / down counter that outputs volume control data based on the clock signal and up data or down data, a memory circuit that temporarily holds the up data or down data, and the up data or down data held in the memory circuit and the amplitude. 3. The compander circuit according to claim 1, comprising a comparison circuit for comparing the output signal of the detection circuit and outputting the adjustment signal. 4. The control circuit temporarily holds the output signal of the amplitude detection circuit in a memory circuit, and compares the data held in the memory circuit with the up data or the down data output from the overflow counter. The compander circuit according to claim 1 or 2, wherein 5. A compressor circuit for amplifying an input signal and compressing an output amplitude with respect to an input amplitude, and a transmitter for converting the signal compressed by the compressor circuit into a radio wave.
4. A receiver for receiving an incoming radio wave, and an expander circuit for attenuating an output signal of the receiver and expanding the output amplitude with respect to an input amplitude, wherein the expander circuit comprises:
5. A radiotelephone device comprising the compander circuit according to any one of claims 4 and 5, wherein the compressor circuit comprises the compander circuit according to any one of claims 2, 3 and 4. 6. A first wireless telephone used as a child device and a second wireless telephone used as a parent device of the child device, wherein the first wireless telephone and the second wireless telephone are claimed. 6. A wireless telephone device comprising the wireless telephone device according to item 5.