JPH08306865A - Capacitor which uses laminar bismuth ferroelectric material and manufacture of this capacitor - Google Patents

Capacitor which uses laminar bismuth ferroelectric material and manufacture of this capacitor

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Publication number
JPH08306865A
JPH08306865A JP7112837A JP11283795A JPH08306865A JP H08306865 A JPH08306865 A JP H08306865A JP 7112837 A JP7112837 A JP 7112837A JP 11283795 A JP11283795 A JP 11283795A JP H08306865 A JPH08306865 A JP H08306865A
Authority
JP
Japan
Prior art keywords
capacitor
bismuth
electrodes
ferroelectric
pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7112837A
Other languages
Japanese (ja)
Other versions
JP2692646B2 (en
Inventor
Taku Hase
卓 長谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
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Priority to JP7112837A priority Critical patent/JP2692646B2/en
Publication of JPH08306865A publication Critical patent/JPH08306865A/en
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Publication of JP2692646B2 publication Critical patent/JP2692646B2/en
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Expired - Fee Related legal-status Critical Current

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  • Inorganic Compounds Of Heavy Metals (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Ceramic Capacitors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE: To increase the density of a capacitor element which uses ferroelectric material and reduce the driving voltage by efficiently use the residual polarization of the laminar bismuth ferroelectric material. CONSTITUTION: A capacitor which uses laminar bismuth ferroelectric material of c-axis orientation is provided by arranging a pair of electrodes 1 which are composed of a first and second electrodes, and permitting the pair of electrodes 1 to have relative position relation that generates an electric field in a direction parallel to a substrate 3 at a part within the ferroelectric material 2. The pair of electrodes 1 are preferably arranged so as to apply the electric field in the maximum polarization direction or mainly in such direction. After forming the laminar bismuth ferroelectric material 2 of c-axis orientation, the maximum polarization direction of the film is detected, and the capacitor is provided by the manufacture that forms the pair of electrodes 1 which apply electric field mainly in this direction.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】ビスマス系層状強誘電体を用いた
キャパシタとその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitor using a bismuth-based layered ferroelectric substance and a manufacturing method thereof.

【0002】[0002]

【従来の技術】ビスマス系層状強誘電体は擬ペロブスカ
イト構造が酸化ビスマス層に挟まれた構造を持ち不揮発
メモリへの応用が期待される材料である。その強誘電性
は酸化ビスマス層に挟まれた擬ペロブスカイト部分のB
サイトイオンの変位を起源としているが結晶軸に対する
異方性が強く、c軸方向の強誘電性に比べa軸方向の強
誘電性が大きいことがわかっている。
2. Description of the Related Art A bismuth-based layered ferroelectric substance has a structure in which a pseudo-perovskite structure is sandwiched between bismuth oxide layers, and is a material expected to be applied to a nonvolatile memory. Its ferroelectricity is B of the pseudo-perovskite part sandwiched between bismuth oxide layers.
Although it originates from the displacement of site ions, it is known that the anisotropy with respect to the crystal axis is strong, and the ferroelectricity in the a-axis direction is larger than that in the c-axis direction.

【0003】従来このような材料を用いたキャパシタ構
造としては、例えば、インターナショナルパテント W
O 93/12542(International
Patent Publication Number
WO 93/12542)にも示されているようなも
のがある。その基本構造は、図7に示すように絶縁性基
板3上に強誘電体薄膜2を上部電極5と、下部電極6と
を挟んで積層した構造であった。
Conventionally, as a capacitor structure using such a material, for example, International Patent W
O 93/12542 (International
Patent Publication Number
Some of them are also shown in WO 93/12542). The basic structure thereof was a structure in which a ferroelectric thin film 2 was laminated on an insulating substrate 3 with an upper electrode 5 and a lower electrode 6 sandwiched therebetween, as shown in FIG.

【0004】[0004]

【発明が解決しようとする課題】ビスマス層状強誘電体
は残留分極に結晶軸に対する異方性があり、最大残留分
極が得られるのはa軸方向で、c軸方向の残留分極は非
常に小さいことがわかっている。ところがこの材料を薄
膜化する場合、スパッタ法や蒸着法等の物理的気相成長
(PVD)法や化学的気相成長(CVD)法等の従来の
成長方法ではc軸配向膜が得られやすく、最大の分極軸
方向を基板面に垂直な方向に配向させることが難しかっ
た。このため基板面と垂直方向に電界を印加する構造で
ある従来の素子構造では有効に残留分極を利用できず、
素子の微細化、低電圧化が難しいという問題があった。
In the bismuth layered ferroelectric substance, the remanent polarization has anisotropy with respect to the crystal axis, and the maximum remanent polarization is obtained in the a-axis direction, and the remanent polarization in the c-axis direction is very small. I know that. However, when thinning this material, a c-axis oriented film is easily obtained by a conventional growth method such as a physical vapor deposition (PVD) method such as a sputtering method or an evaporation method or a chemical vapor deposition (CVD) method. It was difficult to align the maximum polarization axis direction with the direction perpendicular to the substrate surface. Therefore, the conventional element structure, which is a structure in which an electric field is applied in the direction perpendicular to the substrate surface, cannot effectively utilize remanent polarization,
There is a problem that it is difficult to miniaturize the element and reduce the voltage.

【0005】また一般的にビスマス層状強誘電体薄膜成
膜時には700C以上の高温が必要でなおかつ酸化雰囲
気中にさらされるため、下部電極、強誘電体、上部電極
の積層構造では強誘電体成膜時には下部電極と強誘電体
の反応、下部電極の酸化による導通不良がおこり、良好
な特性の素子を作製することが困難であった。
Further, in general, when forming a bismuth layered ferroelectric thin film, a high temperature of 700 C or higher is required and the film is exposed to an oxidizing atmosphere. Therefore, in the laminated structure of the lower electrode, the ferroelectric and the upper electrode, the ferroelectric film is formed. At times, a reaction between the lower electrode and the ferroelectric substance and a conduction failure due to oxidation of the lower electrode occurred, making it difficult to manufacture an element having good characteristics.

【0006】本発明の目的は、上記従来の欠点を解消し
たキャパシタの構造及び製造方法を提供することにあ
る。
An object of the present invention is to provide a structure and manufacturing method of a capacitor which eliminates the above-mentioned conventional drawbacks.

【0007】[0007]

【課題を解決するための手段】本発明は、絶縁性基板上
にc軸配向ビスマス系層状強誘電体及び電極を有するキ
ャパシタにおいて、前記強誘電体中の少なくとも一部分
に基板面と平行な方向の電界を発生する第1、第2の電
極からなる一対の電極が、前記強誘電体に接して設けら
れていることを特徴としている。このとき、電極は、c
軸配向ビスマス系層状強誘電体の最大分極方向に最大の
電界が印加される位置に設けられていることによりいっ
そうの低電圧化がはかれるために好ましい。
The present invention relates to a capacitor having a c-axis oriented bismuth-based layered ferroelectric substance and an electrode on an insulating substrate, and at least a part of the ferroelectric substance in a direction parallel to the substrate surface. A pair of electrodes including a first electrode and a second electrode for generating an electric field are provided in contact with the ferroelectric substance. At this time, the electrode is c
It is preferable that the axially oriented bismuth-based layered ferroelectric substance is provided at a position where the maximum electric field is applied in the maximum polarization direction, because the voltage can be further lowered.

【0008】また本発明によるビスマス系層状強誘電体
キャパシタの製造方法は、基板上にc軸配向ビスマス系
層状強誘電体を形成し、パターニングする第1の工程
と、前記強誘電体に1対の電極を形成する第2の工程と
からなることを特徴としている。ここで、強誘電体を形
成した後、もしくはパターニングを行った後に前記強誘
電体の最大分極方向を検出すれば、検出された最大分極
方向に電界を印加しうる1対の電極をパターニングされ
た強誘電体表面に形成することもできる。
The method of manufacturing a bismuth-based layered ferroelectric capacitor according to the present invention comprises a first step of forming and patterning a c-axis oriented bismuth-based layered ferroelectric on a substrate, and a pair of the ferroelectrics. And a second step of forming the electrode. Here, if the maximum polarization direction of the ferroelectric substance is detected after forming the ferroelectric substance or after patterning, a pair of electrodes capable of applying an electric field in the detected maximum polarization direction is patterned. It can also be formed on the ferroelectric surface.

【0009】[0009]

【作用】図1に本発明によるキャパシタ構造を示す。一
対の電極を用いて、絶縁性基板上のc軸配向ビスマス層
状強誘電体に基板面と平行な電界を印加することによ
り、基板面に平行な面内に制限されているa軸方向の残
留分極を有効に利用することができる。即ち小さい電極
面積で必要な電荷を得られるため素子の微細化を図るこ
とができる。また電極を強誘電体成膜後に作製すること
により、高温下での、強誘電体膜と電極との反応や、電
極の酸化が抑制され、素子の信頼性の向上をはかること
ができる。さらに、最大分極軸方向が基板面に平行な面
内で主に1方向にそろっている場合は、更に有効電荷密
度が高くなるので、より小さい電界でキャパシタの分極
反転が可能となりさらなる低電圧化が可能である。
FIG. 1 shows a capacitor structure according to the present invention. By applying an electric field parallel to the substrate surface to the c-axis oriented bismuth layered ferroelectric on the insulating substrate using a pair of electrodes, the residual in the a-axis direction limited in the plane parallel to the substrate surface. The polarization can be effectively used. That is, the required charges can be obtained with a small electrode area, so that the element can be miniaturized. Further, by manufacturing the electrode after forming the ferroelectric film, the reaction between the ferroelectric film and the electrode and the oxidation of the electrode at high temperature can be suppressed, and the reliability of the element can be improved. Furthermore, when the maximum polarization axis direction is aligned mainly in one direction in the plane parallel to the substrate surface, the effective charge density is further increased, so that the polarization reversal of the capacitor can be performed with a smaller electric field and the voltage can be further lowered. Is possible.

【0010】[0010]

【実施例】【Example】

(実施例1)ビスマス層状強誘電体としてストロンチウ
ム酸タンタル酸ビスマス(SrBi2 Ta2 9 、以下
SBT)、絶縁性基板として表面酸化処理されたシリコ
ン基板、電極材料としてWを用い、SBTの成膜方法と
してRFマグネトロンスパッタを用いた場合の実施例を
図2に示す。キャパシタ作製手順は次の通りであった。
表面酸化処理されたシリコン基板上にRFマグネトロン
スパッタ法で1μm 厚のSBTを作製すると、基板温度
700C以上でc軸に配向したSBT薄膜が形成され
た。続いてこのSBT薄膜を底面0.5μm ×5μm 、
高さ1μm の凸構造にエッチング加工した後、CVD法
でWを0.3μm の厚さに堆積した。その後SBT凸構
造の1μm ×5μm の側面、それからつながる引き出し
電極を残してWをエッチング除去した。このとき1μm
×5μm の面の2つの引き出し電極は、他の素子の同一
側面からの引き出し電極とつながっており、複数のキャ
パシタを並列に接続した構造となっている。この構造の
キャパシタで得られたヒステリシス特性を図3に示す。
比較対象として上部と下部のPt電極で強誘電体を挟ん
だ従来構造の特性も同時に示した。上下に電極が積層さ
れた場合(一点鎖線)は残留分極値が1.4μC/cm2
と非常に小さいのに対し、基板に平行な電界を印加した
場合(実線)は10.5μC/cm2 となり残留分極値の
著しい増加が見られ、素子の高密度化が図れることが示
された。
(Example 1) Bismuth tantalate strontate (SrBi 2 Ta 2 O 9 , hereinafter referred to as SBT) was used as the bismuth layered ferroelectric, a surface-oxidized silicon substrate was used as the insulating substrate, and W was used as the electrode material to form the SBT. FIG. 2 shows an embodiment in which RF magnetron sputtering is used as the film method. The capacitor manufacturing procedure was as follows.
When a 1 μm-thick SBT was produced on the surface-oxidized silicon substrate by the RF magnetron sputtering method, a c-axis oriented SBT thin film was formed at a substrate temperature of 700 C or higher. Then, apply this SBT thin film to the bottom surface of 0.5 μm × 5 μm,
After etching to a convex structure having a height of 1 μm, W was deposited to a thickness of 0.3 μm by the CVD method. After that, W was removed by etching, leaving 1 μm × 5 μm side surface of the SBT convex structure and a lead electrode connected thereto. At this time 1 μm
The two extraction electrodes on the surface of × 5 μm are connected to the extraction electrodes from the same side surface of the other element, and have a structure in which a plurality of capacitors are connected in parallel. The hysteresis characteristics obtained with the capacitor having this structure are shown in FIG.
For comparison, the characteristics of the conventional structure in which the ferroelectric substance is sandwiched between the upper and lower Pt electrodes are also shown. When electrodes are stacked on the top and bottom (dashed line), the remanent polarization value is 1.4 μC / cm 2
However, when an electric field parallel to the substrate was applied (solid line), it was 10.5 μC / cm 2 , and the remanent polarization value increased remarkably, showing that the device density can be increased. .

【0011】(実施例2)ビスマス層状強誘電体として
ストロンチウム酸ニオブ酸ビスマス(SrBi2Nb2
9 、以下SBN)、またはチタン酸ビスマス(Bi4
Ti3 12、以下BIT)、絶縁性基板として表面処理
されたシリコン基板、電極材料としてWを用い、成膜方
法としてRFマグネトロンスパッタを用いた場合を示
す。キャパシタ作製手順は実施例1と同様である。この
構造のキャパシタで得られた強誘電特性を表1に示す。
残留分極の絶対値は小さいがSBT膜の場合と同様に基
板に平行な電界を印加した場合は残留分極値の増加が見
られ、素子の高密度化が図れることが示された。
Example 2 Bismuth strontium niobate (SrBi 2 Nb 2 ) as a bismuth layered ferroelectric substance
O 9 , hereafter SBN, or bismuth titanate (Bi 4
Ti 3 O 12 , hereinafter referred to as BIT), a surface-treated silicon substrate as an insulating substrate, W as an electrode material, and RF magnetron sputtering as a film forming method are shown. The procedure for manufacturing the capacitor is the same as that in the first embodiment. Table 1 shows the ferroelectric characteristics obtained with the capacitor having this structure.
Although the absolute value of the remanent polarization is small, the remanent polarization value increased when an electric field parallel to the substrate was applied as in the case of the SBT film, and it was shown that the device density can be increased.

【0012】[0012]

【表1】 [Table 1]

【0013】(実施例3)絶縁体基板としてMgO単結
晶(100)面を用いて実施例1と同様の方法でSBT
を成膜し、実施例1と同様なキャパシタ構造を形成し
た。この場合SBT薄膜はMgO基板に対してエピタキ
シャル成長するため基板に平行な面内でも分極方向がそ
ろっていた。電界を印加する方向を決定するため、SB
T膜表面上に図4の様なドット状の電極群を作製し、電
極Aと電極BからFの間でそれぞれ2端子法により残留
分極を測定した。測定結果の一例を図5に示す。この場
合では電極Aと電極Dの間での分極値がもっとも大きく
この方向が最大分極軸方向であることがわかった。この
結果に従い、電極A−D方向と平行に電圧が印加される
ように電極を形成した。この構造のキャパシタで得られ
た分極のヒステリシス特性を図6に示す。比較対象とし
てPt電極が上部と下部に形成された同一試料の特性を
示す。上下に電極が積層された場合(一点鎖線)はほと
んどヒステリシス特性を示さないのに対し、基板に平行
な電界を印加した場合(実線)は13.7μC/cm2
なり残留分極値の著しい増加が見られた。実施例1の基
板に平行な電界を印加した場合に比べても残留分極値で
30%増加し、抗電界で22%減少しており、素子の高
密度化、低電圧化が図れることが示された。
(Embodiment 3) Using the MgO single crystal (100) plane as an insulating substrate, the SBT was carried out in the same manner as in Embodiment 1.
Was deposited to form a capacitor structure similar to that of Example 1. In this case, since the SBT thin film was epitaxially grown on the MgO substrate, the polarization directions were aligned even in the plane parallel to the substrate. To determine the direction of applying the electric field, SB
A dot-shaped electrode group as shown in FIG. 4 was prepared on the surface of the T film, and the residual polarization between the electrodes A and the electrodes B to F was measured by the two-terminal method. An example of the measurement result is shown in FIG. In this case, it was found that the polarization value between the electrodes A and D was the largest and this direction was the maximum polarization axis direction. According to this result, the electrodes were formed so that the voltage was applied in parallel with the directions of the electrodes A-D. FIG. 6 shows the hysteresis characteristic of polarization obtained by the capacitor having this structure. For comparison, the characteristics of the same sample having Pt electrodes formed on the upper and lower portions are shown. When the upper and lower electrodes are stacked (dashed line), almost no hysteresis characteristics are shown, whereas when an electric field parallel to the substrate is applied (solid line), it becomes 13.7 μC / cm 2 and the remanent polarization value increases significantly. I was seen. The remanent polarization value was increased by 30% and the coercive electric field was decreased by 22% as compared with the case where an electric field parallel to the substrate of Example 1 was applied, showing that the device can be made higher in density and lower in voltage. Was done.

【0014】なお、以上の実施例で用いた材料は2、3
の例であり、本発明は、以上の実施例で述べた材料に限
定されず、c軸配向強誘電体で、最大分極方向がc軸に
一致しない全ての材料に適用することが可能である。
The materials used in the above-mentioned examples are two or three.
The present invention is not limited to the materials described in the above embodiments, and can be applied to all materials of c-axis oriented ferroelectric substance whose maximum polarization direction does not match the c-axis. .

【0015】[0015]

【発明の効果】本発明による素子構造を用いることによ
りビスマス層状強誘電体の残留分極の有効な利用が達成
でき、結果的に素子の高密度化、駆動電圧の低減が可能
である。さらに下部電極の導通不良が減少し高信頼化が
実現できる。
By using the device structure according to the present invention, it is possible to effectively utilize the remanent polarization of the bismuth layered ferroelectric substance, and as a result, it is possible to increase the device density and reduce the driving voltage. Further, the conduction failure of the lower electrode is reduced, and high reliability can be realized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明によるキャパシタ構造を示す図である。FIG. 1 is a diagram showing a capacitor structure according to the present invention.

【図2】作製したキャパシタ素子構造を示す図である。FIG. 2 is a diagram showing a manufactured capacitor element structure.

【図3】作製したキャパシタ素子のヒステリシス特性を
示す図である。
FIG. 3 is a diagram showing a hysteresis characteristic of a manufactured capacitor element.

【図4】電界印加方向を決定するためのドット状電極群
を示す図である。
FIG. 4 is a diagram showing a dot-shaped electrode group for determining an electric field application direction.

【図5】ドット状電極間の残留分極値を示す図である。FIG. 5 is a diagram showing a remanent polarization value between dot-shaped electrodes.

【図6】絶縁性基板として単結晶基板を用いた場合のキ
ャパシタ素子のヒステリシス特性を示す図である。
FIG. 6 is a diagram showing a hysteresis characteristic of a capacitor element when a single crystal substrate is used as an insulating substrate.

【図7】従来法の薄膜キャパシタ構造を示す図である。FIG. 7 is a view showing a conventional thin film capacitor structure.

【符号の説明】[Explanation of symbols]

1 電極 2 ビスマス層状強誘電体 3 絶縁性基板 4 引き出し電極 5 上部電極 6 下部電極 7 ドット状電極 1 Electrode 2 Bismuth Layered Ferroelectric 3 Insulating Substrate 4 Extraction Electrode 5 Upper Electrode 6 Lower Electrode 7 Dot-shaped Electrode

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 C30B 29/30 H01G 4/12 391 H01G 4/12 391 7/06 7/06 9276−4M H01L 27/10 651 H01L 27/108 21/8242 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI Technical display location C30B 29/30 H01G 4/12 391 H01G 4/12 391 7/06 7/06 9276-4M H01L 27 / 10 651 H01L 27/108 21/8242

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】絶縁性基板上にc軸配向ビスマス系層状強
誘電体及び電極を有するキャパシタにおいて、前記強誘
電体中の少なくとも一部分に基板面と平行な方向の電界
を発生する第1、第2の電極からなる一対の電極が、前
記強誘電体に接して設けられていることを特徴とするビ
スマス層状強誘電体を用いたキャパシタ。
1. A capacitor having a c-axis oriented bismuth-based layered ferroelectric substance and an electrode on an insulating substrate, wherein first and first electric fields are generated in at least a part of the ferroelectric substance in a direction parallel to the substrate surface. A capacitor using a bismuth layered ferroelectric, wherein a pair of electrodes composed of two electrodes are provided in contact with the ferroelectric.
【請求項2】一対の電極が、c軸配向ビスマス系層状強
誘電体の最大分極方向に最大の電界が印加される位置に
設けられていることを特徴とする請求項1記載のビスマ
ス系層状強誘電体を用いたキャパシタ。
2. The bismuth-based layered structure according to claim 1, wherein the pair of electrodes are provided at positions where a maximum electric field is applied in the maximum polarization direction of the c-axis oriented bismuth-based layered ferroelectric substance. Capacitor using ferroelectric material.
【請求項3】基板上にc軸配向ビスマス系層状強誘電体
を形成し、パターニングする第1の工程と、前記強誘電
体に1対の電極を形成する第2の工程とからなることを
特徴とするビスマス系層状強誘電体を用いたキャパシタ
の製造方法。
3. A first step of forming and patterning a c-axis oriented bismuth-based layered ferroelectric substance on a substrate, and a second step of forming a pair of electrodes on the ferroelectric substance. A method of manufacturing a capacitor using a characteristic bismuth-based layered ferroelectric substance.
【請求項4】強誘電体を形成した後、もしくはパターニ
ングを行った後に前記強誘電体の最大分極方向を検出
し、検出された最大分極方向に電界を印加しうる1対の
電極をパターニングされた強誘電体表面に形成すること
を特徴とする請求項3記載のビスマス系層状強誘電体を
用いたキャパシタの製造方法。
4. After forming a ferroelectric substance or after patterning, a maximum polarization direction of the ferroelectric substance is detected, and a pair of electrodes capable of applying an electric field in the detected maximum polarization direction is patterned. The method of manufacturing a capacitor using a bismuth-based layered ferroelectric according to claim 3, wherein the capacitor is formed on the surface of the ferroelectric.
JP7112837A 1995-05-11 1995-05-11 Capacitor using bismuth-based layered ferroelectric and its manufacturing method Expired - Fee Related JP2692646B2 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004044934A1 (en) * 2002-11-12 2004-05-27 Tdk Corporation Thin film capacitor for reducing power supply noise
WO2004044935A1 (en) * 2002-11-12 2004-05-27 Tdk Corporation Capacitor composite circuit element and ic card multilayer capacitor
WO2004061881A1 (en) * 2002-12-27 2004-07-22 Tdk Corporation Thin film capacitor and method for manufacturing same
US7413913B2 (en) * 2004-03-25 2008-08-19 Fujitsu Limited Semiconductor device and method of manufacturing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08249876A (en) * 1995-03-14 1996-09-27 Olympus Optical Co Ltd Ferroelectric device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08249876A (en) * 1995-03-14 1996-09-27 Olympus Optical Co Ltd Ferroelectric device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004044934A1 (en) * 2002-11-12 2004-05-27 Tdk Corporation Thin film capacitor for reducing power supply noise
WO2004044935A1 (en) * 2002-11-12 2004-05-27 Tdk Corporation Capacitor composite circuit element and ic card multilayer capacitor
WO2004061881A1 (en) * 2002-12-27 2004-07-22 Tdk Corporation Thin film capacitor and method for manufacturing same
US7413913B2 (en) * 2004-03-25 2008-08-19 Fujitsu Limited Semiconductor device and method of manufacturing the same

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