JPH08305679A - Pattern classifier - Google Patents

Abstract

PURPOSE: To provide the thin film forming device having an excellent performance which prevents the use efficiency of coating liquid from being bad and prevents the film thickness of a thin film from being not uniform and doesn't waste the coating liquid and freely generates the thin film having a prescribed film thickness with respect to a spin coater used for formation of the thin film. CONSTITUTION: An ink jet head 11 having plural minute nozzles, a rotating means which rotates a substrate 10 to be coated, to which liquid discharged from the ink jet head 11 is stuck, around a prescribed revolving shaft 13, a relative movement means which relatively moves the ink jet head 11 and the substrate 10 between an area near the revolving shaft and an area distant from the revolving shaft, and a relative movement control means which controls the relative movement means so as to reduce the speed of relative movement of the relative movement means in accordance with relative movement of the ink jet head 11 and the substrate 10 from the former area to the latter are provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern classifying device to which a neural network is applied, and more particularly to a cluster classifying method which can be accurately realized on a small scale when the storage capacity is limited. It can be used to calculate the representative pattern of the cluster and the frequency of occurrence.

[0002]

2. Description of the Related Art In recent years, pattern classifiers using neural networks have been applied in many fields such as voice recognition and image recognition. Learning Vector Quantization (LVQ) is one of the pattern classification methods that apply neural networks (reference: T.
Kohonen, "Self-Organization and Associative Memor
y ", Springer-Verlag, 1988). The present invention improves LVQ and realizes a small-scale and highly accurate classifier.

A conventional pattern classifying device will be described below. FIG. 11 shows a block diagram of a conventional pattern classification device, which is disclosed in Japanese Patent Laid-Open No. 189572/1993. In FIG. 11, 100 is an input terminal, 101 is an output terminal, 102 is a teacher signal input terminal, 1
-1 to 1-4 are reference vector circuits for calculating the distance between the reference vector stored inside and the input signal, 7-1 to 7-
Reference numeral 4 is an input frequency correction circuit that corrects the distance signal from the reference vector circuit according to the input frequency information held inside, and 2 is a reference vector that receives the correction distance signal from each input frequency correction circuit and gives the minimum correction distance value. Comparator circuit for outputting the minimum correction distance number signal of the circuit, 4 is a category storage circuit for storing the category corresponding to each reference vector circuit, and 3 is a minimum correction distance number signal from the comparison circuit for receiving the minimum correction distance signal from the category storage circuit. A read circuit for reading the category designated by the distance number signal and outputting it as a category output, a decision circuit for comparing the category output from the read circuit with the teacher signal, and outputting a match / mismatch as a decision output,
Reference numeral 6 receives the minimum correction distance number signal from the comparison circuit and the judgment circuit signal from the judgment circuit, and modifies the reference vector stored in the reference vector circuit and the input frequency information of the input frequency correction circuit by a given algorithm. It is a learning signal generation circuit that generates a learning signal.

The operation of the pattern classifying apparatus configured as described above will be described below with reference to FIG. First, the initial learning of this type of pattern classification device will be described, and then the normal learning will be described.

The initial learning can be considered equivalent to the initial setting of the pattern classifying device. That is, when the number of reference vector circuits included in the pattern classifying apparatus is N, the initial N inputs are set to the initial state of the pattern classifying apparatus. Specifically, the n-th (n ≦ N) input from the beginning is used as a reference vector stored in the n-th reference vector circuit 1-n, and the teacher signal giving the category of the n-th input is the category storage circuit. 4 is stored in a location corresponding to the nth reference vector circuit, and the input frequency information of the input frequency correction circuit 7-n is set to an appropriate positive initial setting value. Initial learning is performed on the first N pieces of data. The write circuit for performing this procedure is not shown in FIG. 11 because it only complicates the drawing.

In normal learning, first, the input signal X is input from the input terminal 100, and all the reference vector circuits 1-1 to 1-1.
The input signal X is sent to 1-4. Reference vector circuit 1-
n is the input signal X and the reference vector Rf stored internally.
Distance from (n)

[0007]

[Equation 1]

Is calculated and output as a distance signal D (n). The input frequency correction circuit 7-n adds the non-negative input frequency information H (n) held therein to the distance signal D (n) from the reference vector circuit 1-n to obtain the corrected distance signal HD (n) = Output as D (n) + H (n). The comparison circuit 2 includes each input frequency correction circuit 7
The correction distance signal HD (n) is received from -n, and the minimum correction distance number signal nmin giving the number of the reference vector giving the minimum value is output. The reading circuit 3 receives the minimum correction distance number signal nmin from the comparison circuit 2, and reads out and outputs the category signal C (min) of the reference vector circuit 1-nmin corresponding to the minimum correction distance number signal nmin from the category storage circuit 4. . The category signal C (min) is output from the output terminal 101 and is sent to the determination circuit 5 at the same time.
The determination circuit 5 outputs the category signal C (mi
n) and the teacher signal T from the teacher signal input terminal 102, respectively. When T = C (min), the determination signal J = (match) When T ≠ C (min), the determination signal J = (mismatch) Is output. The learning signal generation circuit 6 is
The minimum correction distance number signal nmin is received from the comparison circuit 2 and the judgment signal J is received from the judgment circuit 5, and the reference vector Rf (nmin) stored in the reference vector circuit 1-nmin corresponding to the minimum correction distance number signal nmin is received. , J = (match), Rf (nmin) → Rf (nmin) + α (X−Rf (nmin)) If J = (mismatch), Rf (nmin) → Rf (nmin) −α (X−Rf (Nmin)) (where α is a positive number), and the input frequency correction circuit 7
-A learning signal L that outputs the input frequency correction information H (nmin) within nmin as H (nmin) → H (nmin) -1 is output (however, H (nmin)-
If 1 <0, H (nmin) = 0).

By repeating this procedure, the reference vector Rf in the reference vector circuits 1-1 to 1-4 does not have a large number of reference vectors distributed in a region where the input frequency is high, and the reference vectors are efficiently distributed. The pattern classifying device can be realized. Further, the input frequency information H in the input frequency correction circuits 7-1 to 7-4 can have a value reflecting the input frequency.

As another conventional example, Bayes decision (reference: Junichiro Toriwaki, “Pattern Recognition and Image Processing”, Asakura Shoten, 1992) is known.

A pattern classification device using Bayes decision will be described below. FIG. 12 is a block diagram for explaining this conventional example. In FIG. 12, 100 is an input terminal, 1
Reference numeral 01 denotes an output terminal, 12-1 to 12-4 hold previously known in-cluster probability density functions, and an in-cluster probability density function value calculation circuit for calculating the function value for the input X, 13 Reference numerals -1 to 13-4 denote cluster occurrence probability storage circuits that store known cluster occurrence probabilities, 14
-1 to 4 are simultaneous occurrence probability calculation circuits that calculate the simultaneous occurrence probabilities by receiving the intra-cluster probability density function value signals from the intra-cluster probability density function value calculation circuits and the cluster occurrence probability signals from the cluster occurrence probability storage circuit, Reference numeral 2 is a comparison circuit which receives the simultaneous occurrence probability signal from the simultaneous occurrence probability calculation circuit and outputs a category having the maximum simultaneous occurrence probability.

The operation of the pattern classifying apparatus configured as described above will be described. FIG. 13 is a flow chart for explaining the operation. First, the input X is the intra-cluster probability density function value calculation circuit 12-i (i = 1 to 1 in FIG.
4) is input (step (a) in FIG. 13). Intra-cluster probability density function value calculation circuit 12-i (i = 1 to 4)
Is a probability density function p (x
| I) is held. That is, assuming that there are a plurality of clusters, each cluster is numbered and the cluster density function corresponding to the i-th cluster is held in the intra-cluster probability density function value calculation circuit 12-i. Now, since i = 1 to 4 is assumed here, it is assumed that there are four clusters. However, in general, when n clusters exist, n clusters There will be a probability density function value calculation circuit. The same can be said for the cluster occurrence probability storage circuit and the simultaneous occurrence probability calculation circuit described later. The intra-cluster occurrence probability density function value calculation circuit 12-i calculates the intra-cluster probability density function value signal K (i) = p (X | i) using the input X and outputs it (see FIG. Step 13 (b)). FIG.
4 is a conceptual diagram for explaining the operation. In this conceptual diagram, the input X is one-dimensional. When the input X is input, the function value p (X | i) is obtained by substituting it in the cluster occurrence probability density function.

The cluster occurrence probability memory circuit holds a known occurrence probability P (i) of each cluster, and the intra-cluster probability density function output from the intra-cluster probability density function value calculation circuit 12-i. The cluster occurrence probability signal P (i) is output in synchronization with the value signal K (i).

The co-occurrence probability calculation circuit 14-i receives the intra-cluster probability density function value signal K (i) and the cluster occurrence probability signal P (i) and converts the co-occurrence probability signal A (i) into A (i). = K (i) × P (i) and outputs the co-occurrence probability signal A (i) (FIG. 1).
Step 3 (C)).

The comparison circuit 2 uses the simultaneous occurrence probability signal A (i).
In response, the category in which the co-occurrence probability signal A (i) is maximized is determined, and the category signal C is output. (Step (d) in FIG. 13).

By performing the above operation, the category of the input X can be determined so as to minimize the probability of erroneous category determination.

[0017]

However, the above-mentioned conventional structure has the following three problems.
The first point is that the input frequency information H (n) is directly added to the distance signal D (n) without considering the scale of the input space, so that a certain reference vector is the nearest region. There is a problem that the range may exceed the scale of the input space and appropriate category classification cannot be performed.

The second point is that the value of the input frequency information H (n) is 0.
Since the value does not change after becoming 0, there is a problem that if the input frequency changes after becoming 0, it cannot follow it.

As a third point, the conventional example using Bayes decision has a problem that it cannot be used unless the probability density function of each cluster and the occurrence probability of each cluster are known in advance. .

The present invention solves the above-mentioned conventional problems. Regarding the first problem, an appropriate cluster is obtained by adding a value obtained by converting the input frequency in accordance with the scale of the input space to the distance signal. With respect to the second problem, by standardizing the input frequency within a certain range and handling it, it is possible to always follow up even when the input frequency changes. For the problem of the conventional example using Bayes decision, by adopting competitive learning with Bayes decision rule as a distance measure, heuristically determine clusters, and cluster classification is performed even when there is no information of input data in advance. It is an object of the present invention to provide a highly accurate pattern classification device with a small storage capacity that enables the above.

[0021]

In order to achieve this object, the pattern classifier of the present invention converts the distance between the input data and the reference vector in accordance with the input frequency according to the scale of the input space. A pattern is classified by providing a means for correcting using the value and a means for converting the input frequency into a value within a certain range and holding the value.

Therefore, a reference vector circuit for calculating the distance between the reference vector stored internally and the input signal, an input frequency calculating circuit for internally converting the input frequency into a value within a certain range, and holding it. A bias value calculation circuit that receives the distance signal from the reference vector circuit and the input frequency information signal from the input frequency calculation circuit and corrects the distance by a value matched to the input space, and the corrected distance signal from each bias value calculation circuit The comparator circuit that receives and outputs the minimum correction distance number signal of the reference vector circuit, the category storage circuit that stores the category corresponding to each reference vector circuit, and the minimum correction distance number signal from the comparison circuit A read circuit that receives and reads the category specified by the minimum correction distance number signal from the category storage circuit and outputs it as a category output A decision circuit that compares the category output from the read circuit with the teacher signal and outputs a match / mismatch as a decision output, and a reference vector circuit that receives the minimum correction distance number signal from the comparison circuit and the decision signal from the decision circuit And a learning signal generating circuit for generating a learning signal for correcting the input frequency information held in the input frequency calculating circuit by a given algorithm.

On the other hand, the pattern classification apparatus of the present invention is used to achieve the purpose of heuristically determining clusters and performing cluster classification using Bayes decision by introducing competitive learning using the Bayes decision rule as a distance measure. In addition to the above configuration, is provided with a variance calculation circuit that outputs a variance signal indicating the distribution range of the cluster of the input vector, the bias value calculation circuit receives the distance signal, the input frequency information signal and the variance signal. It has a configuration in which the distance signal is converted according to the Bayes decision rule and is output as a Bayes decision distance signal, which is replaced with a Bayes decision distance calculation circuit.

[0024]

With this configuration, the input frequency information signal is converted by the bias value calculation circuit into a value that matches the scale of the input space, and the distance between the input and the reference vector is corrected by the converted value, so that a specific reference The problem that the range of the region closest to the vector exceeds the scale of the input space is solved. Further, since the input frequency calculation circuit converts the input frequency into a value in a certain specific range and holds it, the input frequency information H (n), which has been a problem in the past,
If the input frequency changes after the value of becomes 0, the problem that it cannot follow it can be solved.

Further, in the pattern classification apparatus using Bayes decision, the variance calculation circuit is provided to heuristically find the variance indicating the distribution range of the cluster, and the input frequency calculation circuit is provided to heuristically determine the cluster occurrence probability. Finding and Bayesian decision A typical pattern of clusters can be found heuristically by updating the reference vector using the Bayes decision rule as a distance measure by providing a distance calculation circuit and a reference vector circuit. It is possible to solve the problem that can be used only when the input data information is known in advance.

[0026]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 100 is an input terminal and 101
Is an output terminal, 102 is a teacher signal input terminal, 1-1 to 1-
4 is a reference vector circuit for calculating the distance between the reference vector stored inside and the input signal, 8-1 to 8-4 are input frequency calculation circuits for calculating the input frequency, and 9-1 to 9-4 are each A bias value calculation circuit that receives the input frequency signal from the input frequency calculation circuit, calculates a bias value, and corrects the distance signal from each reference vector circuit based on the bias value.
Receives the correction distance signal from each bias value calculation circuit,
A comparison circuit that outputs the minimum correction distance number signal of the reference vector circuit that gives the minimum correction distance value, 4 is a category storage circuit that stores the category corresponding to each reference vector circuit, 3
Is a reading circuit for receiving the minimum correction distance number signal from the comparison circuit and reading the category specified by the minimum correction distance number signal from the category storage circuit and outputting it as a category output. Reference numeral 5 is a category output from the reading circuit and a teacher signal. And a reference vector stored in the reference vector circuit and the input frequency, which receives the minimum correction distance number signal from the comparison circuit and the determination signal from the determination circuit. It is a learning signal generation circuit for generating a learning signal for correcting the input frequency information of the calculation circuit by a given algorithm.

The operation of the pattern classifying apparatus configured as described above will be described below with reference to FIG. First, the initial learning of this type of pattern classification device will be described, and then the normal learning will be described.

The initial learning can be considered equivalent to the initial setting of the pattern classification device. That is, when the number of reference vector circuits included in the pattern classifying apparatus is N, the initial N inputs are used to bring the pattern classifying apparatus into the initial state. Specifically, the nth from the beginning (n
≤N) and a teacher signal giving the category thereof are stored in the reference vector circuits 1-n of the nth reference vector, and the teacher signal corresponds to the nth reference vector circuit of the category storage circuit 4. The category is stored in the place, and the value of the input frequency information of the input frequency calculation circuit 8-n is set to zero. Initial learning is performed on the first N pieces of data. The write circuit for performing this procedure is not shown in FIG. 1 because it only complicates the drawing.

Next, in the normal learning, first, the input terminal 100
Input signal X is input from all reference vector circuits 1
The input signal X is sent to -1 to 1-4. The reference vector circuit 1-n calculates the distance between the input signal X and the reference vector Rf (n) stored inside.

[0031]

[Equation 2]

## EQU1 ## is calculated and output as a distance signal D (n). The bias value calculation circuit 9-n receives the input frequency information signal H (n) from the input frequency calculation circuit and receives the bias value B.
(N) is calculated by, for example, B (n) = R (1-H (n)). However, R is a positive constant and the reference vector Rf
It defines the range of the region closest to (n),
H (n) is a real number of 0 or more and 1 or less. Next, the bias value calculation circuit uses the distance signal D from the reference vector circuit 1-n.
It is added to (n) and is output as a corrected distance signal HD (n) = D (n) + (B (n)) ² . The comparison circuit 2 receives the correction distance signal HD (n) from each bias value calculation circuit 9-n and outputs the minimum correction distance number signal nmin giving the reference vector number giving the minimum value. The reading circuit 3 receives the minimum correction distance number signal nmin from the comparison circuit 2, and reads out and outputs the category signal C (min) of the reference vector circuit 1-nmin corresponding to the minimum correction distance number signal nmin from the category storage circuit 4. . The category signal C (min) is output from the output terminal 101 and is sent to the determination circuit 5 at the same time. The determination circuit 5 receives the category signal C (m
in), the teacher signal T from the teacher signal input terminal 102,
Receiving each, when T = C (min), the decision signal J = (match) When T ≠ C (min), the decision signal J = (non-match) is output. The learning signal generation circuit 6 is
The minimum correction distance number signal nmin is received from the comparison circuit 2 and the judgment signal J is received from the judgment circuit 5, and the reference vector Rf (nmin) stored in the reference vector circuit 1-nmin corresponding to the minimum correction distance number signal nmin is received. , J = (match), Rf (nmin) → Rf (nmin) + α (X−Rf (nmin)) If J = (mismatch), Rf (nmin) → Rf (nmin) −α (X−Rf (Nmin)) (where α is a positive number), and the input frequency calculation circuit 8
If the input frequency correction information H (n) in −n is n = nmin, H (nmin) → H (nmin) + β (1−H (nmin)) If n ≠ nmin, H (n) → H (n) The learning signal L to be changed to + β (0-H (n)) is output (where β is a positive number).

By repeating this procedure, the reference vector Rf in the reference vector circuits 1-1 to 1-4 and the input frequency information H in the input frequency calculation circuits 8-1 to 8-4 are used for pattern classification. , And the output C (min) of the pattern classifier gives an appropriate category classification.

As described above, according to the present embodiment, first, the bias value calculating circuit can set the bias value in accordance with the scale of the input space, so that an appropriate cluster classification can be performed. it can. Secondly, by converting the input frequency into a real number in the range of 0 to 1 and holding it, it is possible to follow changes in the input frequency and always obtain appropriate frequency information.

(Second Embodiment) A second embodiment of the present invention will be described below.

The structure of this embodiment is similar to that of the first embodiment (FIG. 1). The difference from the first embodiment is in the reference vector changing method in the operation of the reference vector circuit.
If the reference vector Rf (nmin) is J = (match), Rf (nmin) → Rf (nmin) + α (X−Rf (nmin)) If J = (mismatch), Rf (nmin) → Rf (nmin) ), And change (where α is a positive number).

As described above, the point that the reference vector is changed only when J = (match) is different from the first embodiment. As in the present embodiment, the reference vector changing method is updated only when J = (match), and when J = (mismatch), it is not changed, thereby stabilizing the motion of the reference vector and achieving higher accuracy. Enables cluster classification.

(Embodiment 3) A third embodiment of the present invention will be described below with reference to the drawings.

In FIG. 2, 100 is an input terminal and 101
Is an output terminal, 8-1 to 8-4 are input frequency calculation circuits, 9-
1 to 9-4 are bias value calculation circuits, and 2 is a comparison circuit. The above is the same as the configuration of the first embodiment (FIG. 1) and operates in the same manner. The difference from Example 1 is 1-1 to
Of the operations of the reference vector circuit 1-4, the part relating to the change of the reference vector, and different parts will be described below. Each of the reference vector circuits holds a reference vector number nref in advance inside, and receives the minimum correction distance number signal nmin output from the comparison circuit, and nref = nmin.
In the case of, Rf (nmin) → Rf (nmin) + α (X−Rf (nmin)) If nref ≠ nmin, change to Rf (nmin) → Rf (nmin) (where α is a positive number).

This embodiment corresponds to the case where the teacher signal is not given from the outside, and even in such a case, it is possible to obtain the appropriate cluster classification and the occurrence frequency. Further, in the case of the present embodiment, the signal output from the output terminal 101 is the minimum correction distance signal nmin, and its value directly corresponds to the category number.

(Embodiment 4) A fourth embodiment of the present invention will be described below with reference to the drawings.

In FIG. 3, 100 is an input terminal, 101
Is an output terminal, 102 is a teacher signal input terminal, 8-1 to 8-
3 is an input frequency calculation circuit, 2 is a comparison circuit, 4 is a category storage circuit, 3 is a read circuit, 5 is a determination circuit, 6 is a learning signal generation circuit, and the above is the same as that of the first embodiment (FIG. 1). With the configuration, the same operation is performed. Reference vectors 1-1 to 1-3 have the same operation as that of the first or second embodiment, but the outputs have reference signals held by the reference vector circuits in addition to the distance signal. The point that a vector is also output is different. Numerals 10-1 to 10-3 are dispersion calculation circuits for calculating a value reflecting the area range which is the nearest neighborhood of each reference vector based on the reference vector signal and the input signal from each reference vector circuit. Bias value calculation circuits 9-1 to 9-3 correct the distance signal based on the distance signal from the reference vector circuit, the dispersion signal from the dispersion calculation circuit, and the input frequency information signal from the input frequency calculation circuit. It is a thing.
This embodiment is characterized in that a dispersion calculation circuit is newly provided and the operation of the bias value calculation circuit is changed.

The operation of the variance calculation circuit and the bias value calculation circuit will be described below. First, the operation of the dispersion calculation circuit will be described. The variance calculation circuits 10-1 to 3 receive the learning signal, and when J = (match), G (nmin) → G (nmin) + γ‖X−Rf (nmin) ‖ ² J = (mismatch) , G (nmin) → G (nmin) and the variance signal G (nmin) are changed (where γ is a positive number). However, the initial setting of G (nmin) is performed at the time of initial learning, and the value 0 is set. Next, the operation of the bias value calculation circuit will be described. The nth bias value calculation circuits 9-1 to n (n ≦ 3) have the distance signal D (n), the dispersion signal G (n), and the input frequency information signal H.
Based on (n), the corrected distance signal HD (n) is calculated by, for example, HD (n) = D (n) + (R (1-H (n)) / (1 + εG (n))) ² ( However, ε is a positive number).

As described above, in the present embodiment, the distance signal H is calculated by using the information reflecting the area range which is the closest to each reference vector.
The feature is that (n) is corrected. The effects peculiar to this embodiment will be described below. FIG. 4 is a conceptual diagram for explaining the effect of this embodiment. Here, one-dimensional input data will be described as an example. In FIG. 4, the horizontal axis represents the input data X and the vertical axis represents the probability density p (X) of the input X. It is assumed that r1 is a reference vector of the attribute of category 1 and r2 is a reference vector of the attribute of category 2, which are respectively located at the positions marked with X in FIG. From FIG. 4, the cluster 1 having the attribute of category 1 and the cluster 2 having the attribute of category 2 are close to each other, and the occurrence frequency of the input data of the cluster 2 is concentrated in a narrow area. The frequency of data generation is wider than that of cluster 2. When learning is further advanced from this state, the correction distance HD (n) = D (n) + (R (1-H (n))) ² shown in the first embodiment.
, The input frequency information H of the reference vector r2
The value of (r2) becomes larger than H (r1) of r1,
The range closest to r2 expands to the range of cluster 1. In that case, r2 may move from the center position of the cluster 2 toward the cluster 1, and a correct representative pattern and frequency of occurrence may not be obtained. The present embodiment is characterized in that the distance measure includes a value that takes into consideration the area range that is the closest to each reference vector, and the advantage of this embodiment is that this feature prevents the above occurrence.

The present embodiment can be applied to the case where the teacher signal is not given from the outside as in the third embodiment (FIG. 2), and the same effect can be obtained.

(Embodiment 5) A fifth embodiment of the present invention will be described below with reference to the drawings.

In FIG. 5, 100 is an input terminal and 101
Is an output terminal, 102 is a teacher signal input terminal, 8-1 to 8-
Reference numeral 4 is an input frequency calculation circuit, 4 is a category storage circuit, 3 is a read circuit, 5 is a determination circuit, 6 is a learning signal generating circuit, and the above is the same configuration as that of the first embodiment (FIG. 1). It operates. Reference vector circuits 1-1 to 1-4 update the reference vector Rf by the same method as in the first or second embodiment, but regarding the output, the reference vector Rf.
Besides, it outputs the distance in each axial direction between the input signal X and the reference vector Rf stored in each reference vector circuit. Reference numerals 10-1 to 10-4 are variance calculation circuits that calculate a value that reflects the range of the reference vector signal Rf and the input signal X from the reference vector circuit, which range is the closest in each axial direction of each reference vector. It is a thing. Bias value calculation circuits 9-1 to 9-4 are distance signals in each axial direction from the reference vector circuit, dispersion signals in each axial direction from the dispersion calculation circuit,
The distance signal is corrected based on the input frequency information signal from the input frequency calculation circuit. 2 is a comparison circuit, 9-1
It outputs the minimum correction distance number signal of the reference vector circuit which receives the correction distance signals from 4 to 4 and gives the minimum correction distance value. The feature of the present embodiment is that the output from the reference vector circuit is in the form of outputting the distance in each axial direction of the input space, and the output of the variance calculation circuit is the closest to the reference vector in each axial direction. The point is that the value that reflects the area range is output, and that the area range that is the closest to the reference vector in each axial direction is taken into consideration in the method of calculating the correction distance of the bias value calculation circuit. The operation of the part peculiar to this embodiment will be described below. First n-th (n ≤
Regarding the distance calculation method in the reference vector circuit 1-n of 4), the input data X = (x1, x2, ..., x
m) ^t , reference vector Rf (n) = (rn1, rn2,
, Rnm) ^t , the reference vector circuit 1-n
Is the distance in each axial direction Dxi (n) = ‖xi-rni‖ ²
(However, i is an integer of 1 ≦ i ≦ m) is output. Next, a method of calculating a dispersion signal in each axial direction of the dispersion calculation circuit 10-n will be described. Dispersion signal Gxi in xi axis direction
When (n) receives the learning signal L and J = (match), Gxi (nmin) → Gxi (nmin) + γ‖xi−rnmini‖ ² J = (mismatch), Gxi (nmin) → Gxi ( The variance signal Gxi (n) is changed as follows (where γ
Is a positive number). Next, a method of calculating the correction distance of the bias value calculation circuit will be described. The bias value calculation circuit 9-n outputs the correction distance signal HD (n) to, for example,

[0048]

(Equation 3)

Calculate with. As described above, the feature of the present embodiment is that a weighted distance scale using a value that reflects the region range that is the closest to the reference vector in each axial direction is used. This embodiment is different from the fourth embodiment in that Since the classification is performed in consideration of the regions in each axial direction of the cluster, more detailed classification is possible.

This embodiment can be applied to the second to third embodiments, and the same effect can be obtained.

(Embodiment 6) A sixth embodiment of the present invention will be described below with reference to the drawings.

In FIG. 6, 100 is an input terminal, 101
Is an output terminal, 102 is a teacher signal input terminal, 1-1 to 1-
Reference numeral 4 is a reference vector circuit, 9-1 to 9-4 are bias value calculation circuits, 2 is a comparison circuit, 4 is a category storage circuit, 3 is a read circuit, 5 is a determination circuit, 6 is a learning signal generation circuit, and above. The configuration is the same as that of the first embodiment (FIG. 1) and operates in the same manner. The difference from the configuration of FIG. 1 is that noise generation circuits 11-1 to 11-4 are newly provided, and the noise generation circuit 11-
1 to 4 are, for example, synchronized with the input timing of the input signal X, and output the noise Sn at a rate of once every time the input signal X is input N times. Also 8-1 to 8
The input frequency calculation circuit -4 receives the noise signal Sn from the noise generation circuit and updates the input frequency information signal H (n) updated by the method described in the first embodiment from H (n) → H (n) + Sn. Calculate with.

As described above, the feature of the present embodiment is that a noise generating circuit is newly provided to generate low-level noise, and the input frequency information is fluctuated using the noise. The effects peculiar to this embodiment will be described below. FIG. 7 is a conceptual diagram for explaining the effect of this embodiment. Here, one-dimensional input data will be described as an example. In FIG. 7, the horizontal axis represents the input data X and the vertical axis represents the probability density p (X) of the input X. r
Both 1 and r2 are reference vectors having attributes of category 1. From FIG. 7, since r1 and r2 are both located at the same input occurrence frequency, only one of the reference vectors cannot move to the center of the cluster.
There is a possibility that the correct representative pattern and the frequency of occurrence cannot be obtained. In such a case, by adding a low level noise to the input frequency information H (r1) and H (r2) corresponding to each reference vector, the balance between the two is disturbed so that only one of the reference vectors becomes a cluster. It becomes possible to move it to the center of.

The present embodiment can be applied to the second to fifth embodiments, and the same effect can be obtained.

(Embodiment 7) A seventh embodiment of the present invention will be described below with reference to the drawings.

In FIG. 8, 100 is an input terminal, 101
Is an output terminal, 102 is a teacher signal input terminal, 8-1 to 8-
Reference numeral 3 is an input frequency calculation circuit, 4 is a category storage circuit, 3 is a read circuit, and 5 is a determination circuit. The above is the same configuration as that of the first embodiment (FIG. 1) and operates similarly. Reference numeral 2 is a comparison circuit, which obtains the reference vector number having the minimum value based on the Bayesian determination distance signal and outputs it as the minimum Bayesian determination distance number signal. Reference numeral 6 is a learning signal generation circuit, which is based on the minimum Bayesian determination distance number signal and the determination signal.
A learning signal for instructing the dispersion calculation circuit and the input frequency calculation circuit to operate according to a predetermined rule is output. The dispersion calculation circuits 10-1 to 10-3 have the same configuration as that of the fourth embodiment and operate in the same manner. 15-1 to 1
A Bayes determination distance calculation circuit 5-3 calculates a discriminant used in the Bayes decision rule based on the distance signal, the dispersion signal, and the input frequency information signal, and outputs it as a Bayes determination distance signal. Reference vector circuits 1-1 to 1-3 receive the input signal, output a distance signal, and update the reference vector in accordance with a predetermined rule.

First, the flow of operation of the entire embodiment will be described. Note that the initial learning is the same as in the first embodiment and will not be described. FIG. 9 is a flowchart explaining the operation. First, the input X is input to the reference vector circuit. In the reference vector circuit 1-i (i = 1 to 3), different reference vectors Rf (i) are held inside, and the Euclidean distance D (i) = the input X and the reference vector Rf (i) = ‖X-Rf (i) ‖ is calculated and output (step (a) in FIG. 9).

Next, the Bayesian determination distance calculation circuit 15-i
Based on the distance signal D (i), the dispersion signal G (i), and the input frequency information signal H (i), the Bayesian determination distance signal HD (i)
To

[0059]

[Equation 4]

The calculation is performed by (step (b) in FIG. 9).
(Formula 4) is generally called a discriminant function. As can be seen from (Equation 4), here, the cluster occurrence probability is the input frequency information signal H (i), the intra-cluster probability density function is assumed to be a normal distribution, and the average vector is the reference vector Rf.
(I) and the variance is G (i). Regarding the input frequency information signal H (i) as a cluster occurrence probability,
Since (i) represents the frequency with which the input X occurs in the region where the reference vector Rf (i) is closest to the input, the region where Rf (i) is the closest is considered as one cluster. Then, H (i) can be considered as the cluster occurrence frequency.

Next, the comparison circuit 2 outputs the Bayesian determination distance signal H
D (i) is received, and the reference vector number nmin that satisfies HD (nmin) = min {HD (i)} is output as the minimum Bayes determination distance number signal (step (c) in FIG. 9). The read circuit 3 receives the minimum Bayesian determination distance number signal nmin from the comparison circuit 2, and reads out and outputs the category signal C (min) of the reference vector corresponding to the minimum Bayesian determination distance number signal nmin from the category storage circuit 4. The category signal C (min) is output from the output terminal 101 and is sent to the determination circuit 5 at the same time. The determination circuit 5 is the read circuit 3
From the category signal C (min) to the teacher signal input terminal 1
Each of the teacher signals T is received from No. 02, and when T = C (min), the determination signal J = (match), and when T ≠ C (min), the determination signal J = (non-match) is output. The learning signal generation circuit 6 is
The minimum Bayesian determination distance number signal nmin from the comparison circuit 2
Each of the determination signals J is received from the determination circuit 5, and a learning signal L for updating the reference vector Rf (i), the input frequency information signal H (i), and the variance signal G (i) is output as follows, for example. (Steps (d) to (f) in FIG. 9).
First, the reference vector Rf (i) is updated by the reference vector circuit 1-nm corresponding to the minimum Bayesian determination distance number signal nmin.
The reference vector Rf (nmin) stored in in is J =
In the case of (match), Rf (nmin) → Rf (nmin) + (α / G (i)) (X−Rf (nmin)) When J = (mismatch), Rf (nmin) → Rf (nmin) − Change to (α / G (i)) (X-Rf (nmin)) (where α is a positive number). The update coefficient of the reference vector is set to α / G (i) because the distance measure HD
This is because (i) is defined by (Equation 4) and the steepest descent method is used to find the minimum value.

Next, the update of the input frequency information signal H (i) is carried out in the case of i = nmin H (nmin) → H (nmin) + β (1-H (nmin)) i ≠ nmin H (i) → H (i) + β (0−H (i)) (where β is a positive number).

Next, the variance value G (i) is updated in the case of J = (match), in the case of G (nmin) → G (nmin) + γ‖X−Rf (nmin) ‖ ² J = (mismatch) , G (nmin) → G (nmin) and the variance signal G (nmin) are changed (where γ is a positive number).

In the procedure described above, the reference vector is updated so that the reference vector is located in the place where the input is concentrated so that the reference vector becomes stable. Therefore, by repeating the procedure described above, the reference vector Rf In the case of (i), it can be moved to a place where the input data is concentrated. Therefore, if the reference vector itself becomes a representative pattern of the cluster and one region in which one reference vector is the closest to the input X is considered as one cluster, the input frequency information signal H (i) of each reference vector generates a cluster. Since it can be the frequency, in the conventional example, when there is no information of the input data in advance, Bayesian determination could not be used for pattern classification, but the present invention, even when there is no information about the input data, By sequentially repeating the above procedure each time input data is generated, information of the input data can be heuristically acquired, and thus pattern classification using the Bayes decision rule is possible.

Further, as a notable effect of this embodiment, as can be seen from (Equation 4), the boundary line of the region in which each reference vector is the nearest can have a quadratic form, so a small number of reference vectors can be used. Can form boundaries of various shapes. Therefore, even when clusters are complicatedly inserted, it is possible to properly separate them with a small number of reference vectors.

This embodiment can also be applied to the case of so-called unsupervised learning in which the teacher signal is not given from the outside, and in that case, the updating formula of the reference vector signal Rf (i) and the dispersion signal G ( The same effect can be obtained by performing the same operation as described above, except that the updating formula of i) is changed as follows. The method of updating the reference vector Rf (i) and the dispersed signal G (i) will be described below. First, the reference vector Rf (i)
When i = nmin, Rf (nmin) → Rf (nmin) + (α / G (i)) (X−Rf (nmin)) When i ≠ nmin, Rf (i) → Rf (i ), The update of the variance signal G (i) is: G (nmin) → G (nmin) + γ‖X−Rf (nmin) ‖ ² i ≠ nmin when i = nmin, G (i) → G (I)

In the above description, the reference vector circuit, the variance calculation circuit, the input frequency calculation circuit, and the Bayesian determination distance calculation circuit are set as one set, and three sets are described as an example. Needless to say, can be extended to (a positive integer).

(Embodiment 8) An eighth embodiment of the present invention will be described below with reference to the drawings.

In FIG. 10, 100 is an input terminal and 10 is an input terminal.
1 is an output terminal, 102 is a teacher signal input terminal, 8-1 to 8
-3 is an input frequency calculation circuit, 2 is a comparison circuit, 4 is a category storage circuit, 3 is a read circuit, 5 is a determination circuit. The above is the same configuration as that of the seventh embodiment (FIG. 8), and the same operation. Is what you do. Reference numeral 6 is a learning signal generation circuit for instructing the reference vector circuit, the covariance matrix calculation circuit, and the input frequency calculation circuit to operate according to a predetermined rule based on the minimum Bayes determination distance number signal and the determination signal. The learning signal of is output. Reference numerals 16-1 to 16-3 are covariance matrix calculation circuits, which obtain a covariance matrix for a region in which the corresponding reference vector is the nearest, based on the input signal and the reference vector signal, and output the covariance matrix signal. 15-1 to 15-
Reference numeral 3 denotes a Bayesian determination distance calculation circuit, which calculates a discriminant used in the Bayesian decision rule based on the distance signal, the covariance matrix signal, and the input frequency information signal, and outputs it as a Bayesian determination distance signal. Reference numerals 1-1 to 1-3 are reference vector circuits that receive an input signal, output a distance signal, and receive a learning signal to update the reference vector in accordance with a predetermined rule. The operations of the Bayesian determination distance calculation circuit 15-i, the learning signal generation circuit 6, the covariance matrix calculation circuit 16-i, and the reference vector circuit 1-i, which are circuits that operate differently from the seventh embodiment, will be described below. To do. First, the operation of the Bayesian determination distance calculation circuit will be described. The Bayesian determination distance calculation circuit 15-i calculates the Bayesian determination distance signal HD (i) based on the distance signal D (i), the covariance matrix signal G (i), and the input frequency information signal H (i).

[0070]

(Equation 5)

Bayes decision distance signal HD (i)
Is output. (Equation 5) is the dispersed signal G in (Equation 4)
This corresponds to an extension of (i) to the covariance matrix SSi.

Next, the operation of the learning signal generating circuit 6 will be described. The learning signal generation circuit 6 receives the minimum Bayesian determination distance number signal nmin from the comparison circuit 2 and the determination signal J from the determination circuit 5, and receives the reference vector Rf (nmi
n), input frequency information signal H (i), covariance matrix signal S
For example, the learning signal L that updates (nmin) as follows is output. First, a method of updating the covariance matrix signal S (nmin) will be described. The update is performed by updating the covariance matrix SSnmin held in the covariance matrix calculation circuit 16-nmin at the timing when the learning signal L is input to the covariance matrix calculation circuit. The update is performed only when J = (match), otherwise it is not updated. Regarding the updating method, the case where the number of dimensions of the input X is two-dimensional is described in the following description, but it can be generally expanded to the case of n-dimensional. Here, the component of the input X is X = (x,
y) ^t , the component of the reference vector Rf (nmin) is Rf (nmi
n) = (rx, ry) ^t . At this time, the covariance matrix SSn
min is

[0073]

(Equation 6)

Update with. Covariance matrix signal S (nmin)
Is the covariance matrix SSnmin, for example, S (nmin) = (σ
_xx , σ _xy , σ _yx , σ _yy ) may be converted into a time series signal and output. Next, a method of updating the reference vector Rf (nmin) will be described. The update is performed only on the reference vector Rf (nmin) corresponding to the minimum Bayesian determination distance number signal nmin, and is performed at the timing when the learning signal L is input in the reference vector circuit 1-nmin. When J = (match), a specific updating method is Rf (nmin) → Rf (nmin) + (α / 2 × (SSi ⁻¹ + (SSi ⁻¹ ) ^t )) (X−Rf (nmin) ) When J = (mismatch), change to Rf (nmin) → Rf (nmin)-(α / 2 × (SSi ^-1 + (SSi ^-1 ) ^t )) (X-Rf (nmin)) (however) , Α is a positive number).

The updating of the input frequency information signal H (i) is the same as that in the seventh embodiment, and therefore its explanation is omitted.

By repeating the above procedure, it is possible to obtain the same effect as in the previous seventh embodiment, but the feature of this embodiment is that each reference vector is shared by the regions that are the nearest to the input. Since the covariance matrix is reflected in the learning, the effect of this feature is that it can properly separate even directional clusters.

The present embodiment can also be applied to the case of so-called unsupervised learning in which the teacher signal is not given from the outside, and in this case, the updating formula of the reference vector signal Rf (i) is i = nmin. Rf (nmin) → Rf (nmin) + (α / 2 × (SSi ⁻¹ + (SSi ⁻¹ ) ^t )) (X−Rf (nmin)) i ≠ nmin, Rf (i) → Rf (i), the covariance matrix S (i) is updated only when i = nmin, and other operations have the same effect by performing the same operations as described above. Can be obtained.

In the above description, the reference vector circuit, the covariance matrix calculation circuit, the input frequency calculation circuit, and the Bayesian determination distance calculation circuit are set as one set, and three sets are explained. Needless to say, it can be extended to (n is a positive integer).

[0079]

As described above, according to the present invention, by providing the bias value calculation circuit, the input frequency information signal is converted into a value matched with the scale of the input space, and the converted value is used to convert between the input and the reference vector. Since the distance is corrected, proper cluster classification can be performed. Further, by providing the input frequency calculation circuit, the input frequency is converted into a value in a certain specific range and held, so that even if the input frequency changes after long-term learning, it can always be followed. Further, in contrast to the conventional example using the Bayesian determination, the present invention provides a Bayesian determination distance calculation circuit and a reference vector circuit to update the reference vector using the Bayes decision rule as a distance measure, thereby representing a representative pattern of clusters. So that the cluster variance can be found heuristically by providing a variance calculation circuit, and the cluster occurrence probability can be found heuristically by providing an input frequency calculation circuit. Therefore, in the conventional example, the input data is previously
According to the present invention, the Bayesian determination, which can be used only when the information of the data is known, can heuristically obtain the information of the input data, and even if there is no information of the input data in advance, the Bayesian determination is performed on the cluster classification. It is possible to realize an excellent pattern classification device that enables the use of judgment.

[Brief description of drawings]

FIG. 1 is a block connection diagram showing a configuration of a pattern classification device according to a first embodiment and a second embodiment of the present invention.

FIG. 2 is a block connection diagram showing a configuration of a pattern classification device according to a third embodiment of the present invention.

FIG. 3 is a block connection diagram showing a configuration of a pattern classification device according to a fourth embodiment of the present invention.

FIG. 4 is a conceptual diagram for explaining the effect of the pattern classification device according to the fourth embodiment of the present invention.

FIG. 5 is a block connection diagram showing a configuration of a pattern classification device according to a fifth embodiment of the present invention.

FIG. 6 is a block connection diagram showing a configuration of a pattern classification device according to a sixth embodiment of the present invention.

FIG. 7 is a conceptual diagram for explaining the effect of the pattern classification device according to the sixth embodiment of the present invention.

FIG. 8 is a block connection diagram showing a configuration of a pattern classification device according to a seventh embodiment of the present invention.

FIG. 9 is a flowchart for explaining the operation of the pattern classification device in the seventh embodiment of the present invention.

FIG. 10 is a block connection diagram showing a configuration of a pattern classification device according to an eighth embodiment of the present invention.

FIG. 11 is a block connection diagram of a conventional pattern classification device.

FIG. 12 is a block connection diagram of a conventional pattern classification device.

FIG. 13 is a flowchart for explaining the operation of a conventional pattern classification device.

FIG. 14 is a conceptual diagram for explaining the operation of an intra-cluster probability density function value calculation circuit in a conventional pattern classification device.

[Explanation of symbols]

1-1 to 1-4 Reference Vector Circuit 2 Comparison Circuit 3 Readout Circuit 4 Category Storage Circuit 5 Judgment Circuit 6 Learning Signal Generation Circuit 7-1 to 7-4 Input Frequency Correction Circuit 8-1 to 8-4 Input Frequency Calculation Circuit 9-1 to 9-4 Bias value calculation circuit 10-1 to 10-4 Dispersion calculation circuit 11-1 to 11-4 Noise generation circuit 12-1 to 12-4 Intra-cluster probability density function value calculation circuit 13-1 to 13-4 Cluster occurrence probability storage circuit 14-1 to 14-4 Simultaneous occurrence probability calculation circuit 15-1 to 15-3 Bayesian determination distance calculation circuit 16-1 to 16-3 Covariance matrix calculation circuit 100 Input terminal 101 Output terminal 102 teacher signal input terminal

Claims (7)

[Claims] 1. A distance calculation means for calculating a distance from each reference vector to an input vector, a holding means for converting the input frequency of the input vector into a value in a predetermined range and holding the value, and the distance calculation means. Correction means for correcting the distance by a value obtained by converting the input frequency according to the scale of the input space in response to the output of the holding means and the output of the holding means, and the reference vector for giving the minimum value of the output of the correcting means. A pattern classifying apparatus having a correcting means for performing. 2. A reference vector circuit for calculating a distance between a reference vector stored inside and an input vector and outputting it as a distance signal, and converting the input frequency of the input vector into a value in a predetermined range. An input frequency calculation circuit that holds the input frequency information signal, a bias value calculation circuit that receives the distance signal and the input frequency information signal, corrects the distance signal according to the scale of the input space, and outputs the corrected distance signal. And a comparator circuit that receives the correction distance signal and outputs a minimum correction distance number signal that specifies a reference vector circuit that gives the minimum value of the correction distance; and a reference vector circuit that is specified by the minimum correction distance number signal. A read circuit for reading the selected category and outputting it as a category output, and a teacher signal that is a category of the category output and the input vector, And a determination circuit that determines whether they match or does not match and outputs a determination signal, the reference vector stored in the reference vector circuit that receives the minimum correction distance number signal and the determination signal, and the input frequency. A pattern classifying device, comprising: a learning signal generating circuit for generating a learning signal for modifying an information signal. 3. A dispersion calculation circuit for receiving a learning signal and outputting a dispersion signal indicating a distribution range of a cluster of an input vector, wherein the bias value calculation circuit receives a distance signal, an input frequency information signal and the dispersion signal. 3. The pattern classification device according to claim 1, wherein the distance signal is corrected according to the scale of the input space and is output as a corrected distance signal. 4. The pattern classification device according to claim 3, wherein the variance calculation circuit outputs a variance signal indicating a distribution range of the cluster in a plurality of directions. 5. The pattern classification device according to claim 1, further comprising a noise generation circuit that generates low-level noise and adds it to the input frequency information signal. 6. A reference vector circuit for calculating a distance between a reference vector stored inside and an input vector and outputting it as a distance signal, and converting the input frequency of the input vector into a value in a predetermined range. An input frequency calculation circuit that holds the input frequency information signal, a dispersion calculation circuit that outputs a dispersion signal indicating the distribution range of the cluster of input vectors, a distance signal, the input frequency information signal, and the dispersion signal A Bayesian determination distance calculating circuit that converts a signal according to the Bayesian determination distance signal and outputs it as a Bayesian determination distance signal, and a minimum Bayesian determination that specifies a reference vector circuit that receives the Bayesian determination distance signal and gives a minimum value of the Bayesian determination distance. A comparator circuit that outputs a distance number signal and a comparator that corresponds to the reference vector circuit specified by the minimum Bayes determination distance number signal. A read circuit for reading the category and outputting it as a category output; and a decision circuit for comparing the category output with a teacher signal that is a category of the input vector to decide whether they match or not and output them as a decision signal.
A learning signal generating circuit for receiving the minimum Bayes determination distance number signal and the determination signal, and generating a learning signal for correcting the reference vector, the input frequency information signal and the variance signal stored inside the reference vector circuit; A pattern classification device comprising: 7. The pattern classification device according to claim 6, wherein the variance calculation circuit indicates the distribution range of the cluster of the input vector by a covariance matrix and is replaced by a covariance matrix calculation circuit that outputs a covariance matrix signal.