JPH0829708B2 - A method for determining the location of failures in automobile control circuits - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a failure point determination method for a vehicle control circuit for determining a failure point when an electronic circuit such as a power steering apparatus fails.

[Conventional technology]

In recent years, electronic circuits have been frequently used for steering control of automobiles. For example, in the case of a power steering device,
The solenoid valve is driven according to the values of the steering angle amount, the engine speed, the vehicle speed, etc., and the flow rate of oil supplied to the power steering device is controlled to obtain the optimum steering force.

[Problems to be Solved by the Invention]

However, in such a conventional device, when the sensors are distributed in various places, an electric signal is used. Therefore, in the field of conventional automobile maintenance, there are many service persons who are unfamiliar with handling electric circuits, and it is difficult to find a faulty part. It was difficult and time consuming.

The present invention has been made in order to solve such a problem, and the purpose thereof is to use a general-purpose DC meter such as a tester to easily and quickly detect a failure point in descending order of priority. An object of the present invention is to provide a method for determining a failure location of a control circuit for an automobile that can make a determination.

[Means for solving the problem]

In order to achieve such an object, the present invention sends output signals corresponding to signals from a plurality of sensors (1) for detecting abnormalities at different places, and outputs an abnormality detection signal from these sensors (1). When input, an output signal sending means (2) for sending an output signal corresponding to the abnormality detection signal having a high priority, and the sensor (1) of the sensor (1) based on the output signal from the output signal sending means (2). When none of them detects an abnormality, it outputs a high frequency signal, and when the sensor (1) detects an abnormality, it outputs a low frequency signal corresponding to the output signal from the output signal sending means (2). And a signal output means (3) for outputting the pulse signal of (3) is provided, and the frequency of the high-frequency signal is determined as an appropriate frequency (for example, 50 Hz) higher than the operation tracking frequency of a predetermined DC meter (tester). Signal output means The level of the output signal from (3) is measured using the DC meter (tester), and the failure point is determined from the measurement result.

[Action]

Therefore, according to the present invention, a plurality of sensors (1)
When neither of the above has detected an abnormality, a high frequency signal is output from the signal output means (3). In this case, when the level of the output signal from the signal output means (3) is measured using a DC meter (tester), the measurement result shows a value that is approximately half the amplitude value of the output signal.

On the other hand, when the sensor (1) detects an abnormality, a low frequency pulse signal corresponding to the output signal from the output signal sending means (2) is output from the signal output means (3). . In this case, when the level of the output signal from the signal output means (3) is measured using a DC meter (tester), the measurement result shows the amplitude value for each pulse of the output signal.

When an abnormality detection signal is input from a plurality of sensors (1), an output signal corresponding to the abnormality detection signal having a high priority is sent from the output signal sending means (2). Thus, when the level of the output signal from the signal output means (3) is measured by using the DC meter (tester), the abnormality of high priority is detected first.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numeral ₁₁ denotes a solenoid disconnection sensor for detecting disconnection of a solenoid (a solenoid that drives a valve that controls the flow rate of oil supplied to the power steering device).
1 ₂ solenoid short circuit sensor for detecting a short circuit of the solenoid, 1 ₃ steering angle signal abnormality sensor that detects an abnormality of the steering angle signal, 1 ₄ engine signal abnormality sensor, 1 ₅ is a vehicle speed signal abnormality sensor, they The details are disclosed in JP-A-61-54363 and JP-A-60-56671.

2 is a priority encoder in which the input terminal 2a has the highest priority and the input terminal 2e has the lowest priority, 3 is a presettable counter, 4 is an oscillator, and 5 is an output terminal. When no abnormality detection signal is supplied to any of the input terminals, that is, when the control circuit of the power steering apparatus is normal, the priority encoder 2 sends out "0" level output signals from all output terminals. It has become. The presettable counter 3 outputs the output signal of the oscillator 4 as it is when the signals of all the output terminals of the priority encoder 2 are at "0" level.

The operation of the device configured as described above is as follows.
When all the sensors have not detected an abnormality, the priority encoder 2 outputs the signal of "0" level from all the output terminals. As a result, the presettable counter 3 outputs the output signal of the oscillator 4 as it is. At this time, the oscillation frequency of the oscillator 4 is set to an appropriate frequency (for example, about 50 Hz) slightly higher than the operating frequency of a predetermined DC meter (in this embodiment, the tester), and the tester is set to the DC range. When the signal level is measured, the tester cannot completely follow this output signal, so the measurement result shows a value that is approximately half the amplitude value of the output signal. Therefore, if the tester indicates a voltage of such a value, it can be seen that the control circuit of the power steering apparatus is normal.

Now, for example, if any failure occurs, an abnormality detection signal is generated from the sensor that has detected the failure and is supplied to the priority encoder 2. As a result, the priority encoder 2 outputs an output signal according to the failure situation. The presettable counter 3 responds to an output signal from the priority encoder 2 with an oscillator 4
A signal obtained by dividing the output signal of is output. This signal is, for example, a signal as shown in Table 1.

That is, the output signal from the presettable counter 3 is a pulse signal having a frequency lower than the operation follow-up frequency of the tester, and the number of pulses during the predetermined time T is changed according to the output signal from the priority encoder 2. At this time, the pulse duration in FIGS. 2B to 2F is set to a value at which the amplitude value can be sufficiently measured by the tester (for example, the constant voltage output time is 1 second or more). Note that FIG. 2A shows an output waveform of the presettable counter 3 when all the sensors have not detected an abnormality.

Here, when the level of the output signal from the presettable counter 3 is measured by a tester, the measurement result shows the amplitude value for each pulse of the output signal. That is, when the tester is connected to the output terminal 5 and the needle of the tester shows the amplitude value of the pulse 5 times within the predetermined time T, the solenoid is disconnected and the output signal is determined according to the solenoid short circuit and the failure content if it is 4 times. Thereby, the details of the failure can be known easily and promptly from the number of times the needle of the tester shakes.

When two or more types of failures have occurred, the priority encoder 2 outputs an output signal corresponding to the abnormality detection signal of high priority. Therefore, the failure detected by the tester is only the failure content of high priority, but if the instruction of the tester is confirmed again after repairing this failure, the failure content of the lower priority can be detected this time. That is,
According to this embodiment, a high-priority fault is first detected, a repair is performed, then a next-highest-priority fault is detected, and so on. It becomes possible to detect all failures without fail while repairing in order of priority and confirming the completion of the repair.

FIG. 3 is a block diagram of the present invention applied to a power steering apparatus. In the figure, 10 is a vehicle speed sensor, which outputs a signal of "0" level from the terminal 10a when the vehicle speed is abnormal. Reference numeral 11 denotes an engine rotation sensor, which outputs a signal of "0" level from the terminal 11a when the engine signal is abnormal. Reference numeral 12 denotes a steering angle sensor, which outputs a "0" level signal from the terminal 12a when the steering angle signal is abnormal. 13 is an output detector,
A "1" level signal is sent from the terminal 13a when the solenoid is shorted, and a "0" level signal is sent from the terminal 13b when the solenoid is disconnected. 14 is an output control circuit, 15 is a solenoid, 16a to 16d are inverters, 17 is a NOR circuit, 18 is a clock circuit, 19 is an AND circuit, 20 is an OR circuit, 21a to 21e are gate circuits, and 22 to 26 are pattern memories. is there. The operation of this circuit is the same as that of the circuit of FIG. 1, but the portions of the pattern memories 22 to 26 that output the waveforms shown in FIGS. 2B to 2F will be described in detail.

The pattern memories 22 to 26 are 8-bit memories 22a to 26a in which patterns as shown in FIGS. 4 (a) to 4 (e) are stored.
have. Further, the pattern memories 22 to 26 are shift registers 22b to 26b whose "1" level is set for a predetermined one bit out of 8 bits as shown in FIGS. 5 (a) to (e).
The bit of the "1" level is moved to adjacent bits in a ring shape every 2 seconds, and the shift registers 22b to 26b are logically ANDed with the respective bits of the memories 22a to 26a. To be processed.

For example, the pattern memory 22 is as shown in FIG. In the figure, 22a is a pattern memory shown in FIG. 4 (a), 22b is a shift register shown in FIG. 5 (a), 22c to 22k are AND circuits, 22l is an OR circuit, and 22m is a monomultivibrator. is there. In the pattern memory 22 configured in this way, "1" of the shift register 22b
Since the level bit is moved to an adjacent bit, for example, the bit on the left side every 2 seconds, the AND circuit 22f, in which the "1" levels of the memory 22a and the shift register 22b match,
22k sends out "1" level output sequentially. Therefore, this signal is given to the mono multivibrator 22m via the OR circuit 22l, and the mono multivibrator 22m is driven. At this time, if the operating time of the mono-multi vibrator 22m is set to about 1 second, the signal shown in FIG. 2 (b) can be obtained. The other pattern memories 21 to 26 are similarly configured.

〔The invention's effect〕

As is apparent from the above description, according to the present invention, when none of the plurality of sensors detects an abnormality, a high frequency signal is output from the signal output means, and a DC meter (tester) The measurement result shows a value that is approximately half of the amplitude value of the output signal from the signal output means. On the other hand, when the sensor detects an abnormality, it fails due to the number of deflections of the needle of the DC meter (tester). It becomes possible to determine the location, and it becomes possible to easily and quickly determine the location of failure using a general-purpose DC meter such as a tester.

Further, according to the present invention, when two or more types of faults occur, the fault with the higher priority is detected first, the fault with the next higher priority is detected after the repair, and so on. Then, failures are detected in descending order of priority, and it is possible to detect all failures without fail while repairing in order of priority and confirming the completion of the repair.

[Brief description of drawings]

1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram showing an example of an output signal from a presettable counter, FIG. 3 is a block diagram showing another embodiment, and FIG.
FIGS. 5, 5 and 6 are diagrams for explaining the operation of the pattern memory. 1 ₁ to ₁₅ ... Sensor, 2 ... Priority encoder, 3 ... Presettable counter, 4 ... Oscillator, 5
...... Output terminal.

Claims (1)

[Claims] 1. An output signal corresponding to signals from a plurality of sensors for detecting anomalies at different places is sent out, and when the anomaly detection signals are input from these sensors, the anomaly detection signals having a high priority are dealt with. Based on the output signal from the output signal transmitting means and the output signal from the output signal transmitting means, when neither of the sensors detects an abnormality, a high frequency signal is output and the sensor outputs an abnormality. And a signal output means for outputting a low-frequency pulse signal according to the output signal from the output signal sending means when detecting the, the frequency of the high-frequency signal operation tracking frequency of the predetermined DC instrument After determining the higher appropriate frequency, the level of the output signal from the signal output means is measured using the DC meter, and the failure point is determined from the measurement result. Fault location method for determining the automobile control circuit, characterized in that the.