JPH08293644A - Mounting of semiconductor array element - Google Patents

Abstract

PURPOSE: To provide a method of mounting semiconductor array elements, which aligns the elements with high accuracy. CONSTITUTION: In a method of mounting semiconductor array elements, which are subjected to flip chip bonding, the number of electrodes 3 to be connected electrically with the elemnts is assumed to be N to include (N+2) pieces or more of the electrodes in the N, the semiconductor array elements 1 are cut out from a semiconductor wafer to form and more than one piece of electrodes 2 provided at both ends of a group of the elements 1 are used as electrodes for alignment with substrates 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting an array type semiconductor element, and more particularly to an array type semiconductor element for aligning an array type semiconductor element such as a laser diode or a photodiode in which optical semiconductor elements are arranged with high accuracy. Regarding the implementation method.

[0002]

2. Description of the Related Art A conventional example will be described with reference to FIG. Figure 2
FIG. 3 is a perspective view showing a state where the array type semiconductor element 1 is mounted on the substrate 6 by a flip chip bonding method. The array-type semiconductor element 1 shown in FIG. 2 is composed of eight semiconductor elements, and each semiconductor element has a signal electrode 3 ₁
And a common ground electrode 3 _e is formed. The array-type semiconductor element 1 is shown as if it is a square bar having a thickness in the vertical direction in FIG. 2, but is actually a thin plate made of a semiconductor material such as InP, InGaAsP, GaAs, and Si. As shown in FIG. 2, when the surface of the array-type semiconductor element 1 on which the signal electrode 3 ₁ is formed faces downward and the surface of the array-type semiconductor element 1 on which the common ground electrode 3 _e is formed faces upward, The signal electrode 3 ₁ is soldered and connected to the electrode 20 _{6 of the} substrate 6,
A method of mounting and mounting the array-type semiconductor element 1 on the substrate 6 is called a flip chip bonding method. By such a flip-chip bonding method, the array-type semiconductor element 1 can be mounted on the substrate 6 with high precision by positioning and mounting. Here, the signal electrode 3 ₁ on the array type semiconductor element 1 side
A spherical Pb-Sn solder bump is formed on the.

FIG. 3 is a side view for explaining a method of aligning the array type optical semiconductor element 1 with respect to the substrate 6 in the flip chip bonding method. The alignment is
As shown in FIG. 3, the array type optical semiconductor element 1 and the substrate 6 are opposed to each other in the vertical direction, and the camera 8 is inserted between the two.
_{Both 1} and the electrode 20 ₆ of the substrate 6 are directly observed, and these electrodes are superposed. The light emitting portion 9 of the optical semiconductor element and the signal electrode 3 ₁ satisfy a predetermined positional relationship, and when both the signal electrode 3 ₁ and the electrode 20 ₆ of the substrate 6 are completely overlapped, the optical semiconductor element The light emitting section 9 and the light receiving element (not shown) are aligned and a sufficient optical coupling is achieved between them.

This flip chip bonding method is
Signal electrode 3 ₁ and substrate 6 of array type optical semiconductor element 1
Since this is a method in which both of the electrodes 20 ₆ are directly observed while trying to overlap each other, it is possible to accurately position the light emitting section 9 of the array type optical semiconductor element 1 to be mounted on the substrate 6 originally. It should be possible. But,
The electrodes to be electrically connected, either one of the electrodes 20 ₆ array type semiconductor device 1 side signal electrode 3 ₁ or the substrate 6 side, or solder bumps on both is formed. However, since the surface of the solder bump is not smooth like an ordinary electrode film, the sharpness of the observed image is deteriorated due to this. Impairing the sharpness of the alignment observation image means that the alignment accuracy is reduced accordingly.

In FIG. 5, a marker 4 ₁₁ and a marker 4 ₁₂ dedicated for alignment are added to both sides of the signal electrode 3 ₁ pattern on the side of the array type semiconductor device 1 and alignment is also performed on both sides of the electrode 20 ₆ pattern on the side of the substrate 6. Dedicated marker 4 ₆₁ and marker 4
It is a figure which shows the prior art example which added ₆₂ . In this way, a dedicated marker for alignment is formed, and the alignment is implemented while observing that the marker 4 ₁₁ and the marker 4 ₆₁ are completely overlapped and the marker 4 ₁₂ and the marker 4 ₆₂ are completely overlapped. Has been done. In this case, the array-type semiconductor element 1 has 8
Assuming that it is a ch array type element, the semiconductor wafer is formed by incorporating the marker 4 for every eight signal electrodes.

FIG. 4 is a perspective view showing the array type semiconductor element 1 mounted on the substrate 6 by a normal bonding method. Reference numeral 7 is a lead wire, and 9 is a light emitting portion. In this case, since the signal electrode surface is directed upward and alignment is performed with the outer shape of the array-type semiconductor element 1, the light-emitting portion 9 is displaced due to the accuracy of the outer-dimensional dimension of the array-type semiconductor element 1, and the flip-flop becomes High accuracy cannot be expected compared with the chip bonding method.

[0007]

As described above, in the conventional example of the flip-chip bonding method, since the electrodes on which the solder bumps whose surfaces are not smooth are formed are observed, it is possible to perform highly accurate positioning. I can't hope for a match. In the step of forming the semiconductor wafer, as shown in FIG. 5, the alignment is easily performed by incorporating the markers 4 ₁₁ and the markers 4 ₁₂ in advance on both sides of the electrode 3 ₁ pattern of the array type semiconductor element 1 to form the semiconductor wafer. can do. However, in this way, the region where the array type semiconductor element is cut out from the semiconductor wafer is defined between them including the marker 4 ₁₁ and the marker 4 ₁₂ . The array type semiconductor device is regarded as a defective product unless all of the semiconductor devices arranged in succession are good products. For example, if it is an 8ch array type semiconductor element and a semiconductor wafer is manufactured by inserting the markers 4 ₁₁ and 4 ₁₂ as shown in FIG. 5, even if one defective element is tested out of the 8 elements inside the marker. If it is recognized by, the entire array type semiconductor device is regarded as a defective product. here,
If a general semiconductor wafer that does not incorporate markers in which semiconductor elements are isotropically arranged in a matrix is not manufactured without forming a special semiconductor wafer in which alignment markers are incorporated, it is defective. Eight consecutive good semiconductor elements can be arbitrarily cut out as an array type semiconductor element while avoiding the semiconductor element recognized as being, and the yield of the array type semiconductor element is greatly improved. Therefore, it is desirable to avoid incorporating the dedicated marker as shown in FIG. 5 into the semiconductor wafer.

The present invention provides a method for mounting an array type semiconductor device which solves the above-mentioned problems.

[0009]

In a method of mounting an array type semiconductor element by flip chip bonding, the array type semiconductor element 1 is a semiconductor including (N + 2) or more electrodes, where N is the number of electrodes 3 to be electrically connected. A method of mounting an array-type semiconductor element in which one or more electrodes 2 on both ends were cut out from a wafer and used as alignment electrodes for the substrate 6 was constructed.

Then, a method of mounting an array type semiconductor element in which the alignment marker 4 corresponding to the alignment electrode 2 is formed on the substrate 6 is constructed. Further, the mounting method of the array-type semiconductor element in which the positional displacement evaluation scale 5 is formed inside the alignment marker 4 is configured. Further, the mounting method of the array type semiconductor element is characterized in that the alignment is performed while observing with the infrared camera 8.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to FIG. FIG. 1 is a diagram showing an electrode pattern of an array type semiconductor device and an electrode pattern of a substrate according to the present invention. FIG.
On the side of the array-type semiconductor chip shown in (1), an electrode pattern composed of a total of 10 electrodes is formed. by the way,
Since the array-type semiconductor element 1 shown in the figure has 8 ch, solder bumps are formed on the inner 8 electrodes shown by 3 ₁ of the 10 electrodes corresponding to these, and these electrodes are signaled. The electrode pattern is used. Solder bumps are not formed on the electrodes on both the left and right sides indicated by 2 ₁₁ and 2 ₁₂ , but these are used as electrodes for alignment.

[0012] substrate 6 side shown in FIG. 1, the electrode pattern consisting of eight electrodes indicated by 20 _6, the alignment marker of left and right end indicated by 4 ₆₁ and 4 ₆₂ are formed. Then, inside the alignment marker 4, a positional deviation evaluation scale indicated by 5 is formed. The position alignment marker 4 is formed in a rectangular shape, and the position shift evaluation scale 5 is positioned and formed in the vicinity of four sides of the position alignment marker 4.

Here, in order to explain how to position the array type optical semiconductor element 1 with respect to the substrate 6, the array type optical semiconductor element 1 and the substrate 6 in FIG. Then, the camera 8 is inserted between the two. The camera 8 directly observes both the alignment marker 4 on the substrate 6 and the alignment electrode 2 of the array type optical semiconductor element 1, and the left alignment electrode 2 ₁₁ on which the solder bumps of the array type optical semiconductor element 1 are not formed. the right positioning electrode 2 ₁₂ with aligning the left alignment marker 4 ₆₁ aligned with the right side alignment marker 4 _62, it is superimposed on the array type optical semiconductor element 1 and the substrate 6. The electrodes are soldered to each other in the aligned and superposed state. In this case, the alignment electrode 2 and the alignment marker 4 are merely in contact with each other, and there is no solder or any other substance between them. The light emitting portion 9 of the array-type optical semiconductor element 1 and the signal electrode 3 ₁ satisfy a predetermined positional relationship, and the alignment marker 4 on the substrate 6 and the array-type optical semiconductor element 1 are arranged.
When both of the positioning electrodes 2 are completely overlapped with each other, the light emitting portion 9 of the array-type optical semiconductor element 1 and the light receiving element (not shown) are aligned and a sufficient optical coupling is achieved between them. The precondition of being satisfied is satisfied.

InP forming the array type semiconductor device 1,
Since a thin plate made of a semiconductor material such as InGaAsP, GaAs, and Si transmits infrared rays, it is possible to observe the electrode marker alignment state even after soldering by using an infrared camera. If there is a displacement in the bonding position between the alignment marker 4 and the alignment electrode 2, the alignment marker 4 is attached via the alignment electrode 2 on which no solder bump is formed by observation with an infrared camera. The displacement evaluation scale 5 can be seen through.

In the above embodiment, one alignment electrode 2 is provided at each of the left and right ends of the array type optical semiconductor element 1.
However, the number of positioning electrodes 2 is not limited to one, but a plurality of positioning electrodes 2 can be used to further improve the positioning accuracy.

[0016]

According to the present invention, since it is not necessary to form a marker dedicated to alignment on a semiconductor wafer, when the array type semiconductor element is cut out, the cutout position of the semiconductor element of the semiconductor wafer is limited by the marker dedicated to alignment. The yield of array-type semiconductor devices is greatly improved.

The above alignment is carried out while observing with the infrared camera 8. Since the solder bumps are not formed on the alignment electrode 2, the alignment marker can be clearly observed, which is high. Accurate alignment can be easily performed. Further, in the past, the electrodes for alignment were also soldered, so even if an alignment marker was to be formed, this had to be formed on the outside of the electrodes, which was caused by the protrusion of solder after soldering. Although the marker is hidden and it is difficult to measure it, according to the present invention, since the alignment marker can be seen through, the marker can be observed clearly and accurately.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of electrodes on an array type semiconductor element side and a substrate side.

FIG. 2 is a perspective view of a flip-chip bonded device.

FIG. 3 is a diagram illustrating a method of aligning flip chip bonding.

FIG. 4 is a perspective view of a normally bonded element.

FIG. 5 is a view showing a conventional example of electrodes on an array type semiconductor element side and a substrate side.

[Explanation of symbols]

 1 Array type semiconductor element 2 Positioning electrode not forming solder bumps 3 Solder bump electrode 4 Positioning marker 5 Position shift scale 6 Substrate 7 Wire 8 Camera 9 Light emitting part

Claims (4)

[Claims] 1. A method of mounting an array-type semiconductor element by flip-chip bonding, wherein an array-type semiconductor element including (N + 2) or more electrodes is cut out from a semiconductor wafer, and the number of electrodes to be electrically connected is N. A method for mounting an array-type semiconductor device, wherein one or more electrodes are used as electrodes for alignment with respect to a substrate. 2. The method for mounting an array-type semiconductor element according to claim 1, wherein a positioning marker corresponding to the positioning electrode is formed on the substrate. 3. The method for mounting an array-type semiconductor element according to claim 2, wherein a misalignment evaluation scale is formed inside the alignment marker. 4. The array-type semiconductor device according to claim 2, wherein the alignment is performed while observing with an infrared camera. How to implement.