JPH08287030A - Device and method for automatically restarting multiple computer system - Google Patents

Abstract

PURPOSE: To improve the operation rate and reliability of a multiple computer system by automatically restarting a stopped CPU when system down occurs in the system. CONSTITUTION: The multiple computer system is provided with a system down judging means 104 arranged on the outside of the system and capable of checking the combination of abnormal states of computers causing system down based upon state signals inputted from respective computers and judging whether system down occurs or not, a restart signal processing means 107 for outputting restart signals 111 as reset start signals at the time of a 1st restart request or as initializing start signals at the time of a 2nd restart request or after, and when the number of restart requests reaches a prescribed value, giving up the restart and plural memories 112 for storing the contents of a main storage device by computers having received the reset start signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic restarting apparatus and method for a multi-system computer system (multi-system), and more particularly, to automatically restarting a stopped central processing unit (CPU) when a system down occurs. The present invention relates to an automatic restart apparatus and method for a multi-system computer system that makes a request.

[0002]

2. Description of the Related Art As shown in FIG. 7, a conventional triple computer system has a CPU1 (701) and a CPU2 (70).
2), the computers of the CPU 3 (703) are connected to each other, and the system status is monitored as follows. The computer status monitoring of the CPU2 (702) and the CPU3 (703) is performed by the CPU1 through the lines 704 and 705.
This is performed by the program of (701). The computer status monitoring of the CPU1 (701) and the CPU3 (703) is performed by the CPU2 via the lines 706 and 707.
This is performed by the program of (702). The computer status monitoring of the CPU1 (701) and the CPU2 (702) is performed by the CPU3 via the lines 708 and 709.
This is performed by the program of (703). If an abnormality occurs in any of the CPUs as a result of the above monitoring results, the CPU is automatically stopped or is disconnected from the system by another CPU. As described above, the conventional system state monitoring has dealt with a failure occurring in the multi-system by mutual monitoring processing by the mutual CPUs. In addition, when performing processing at the time of system abnormality inside the multi-system, some effective measures cannot be taken against the system down (state in which the function of the multi-system as a whole cannot be maintained).
There was no choice but to recover manually.

[0003]

Therefore, the conventional techniques have the following problems. In other words, even if the system is multiplexed, the same software is used, so if a bug occurs, the same bug may occur in all CPUs equipped with that software. It can be said that it is only unified. Therefore, a soft failure may occur simultaneously in a plurality of CPUs, and in this case, the system may be down. When the system goes down, it is basically restarted manually, so it takes time and trouble, and if an error occurs in handling, there are cases where the system cannot be restarted normally.

An object of the present invention is, in a multi-computer system, a CP which is stopped when a system down occurs.
It is to restart U automatically, improve the operating rate of the system, and improve the reliability.

[0005]

The above-mentioned object is to install the system outside a multi-system computer system, check the combination of computer abnormalities leading to the system down based on the status signal fetched from each computer, and check whether the system is down. A system down determination means for determining whether or not a restart signal is output as a reset start signal for a first restart request, and as a reset start signal for a second or subsequent restart request. This is achieved by providing the activation signal processing means.

[0006]

According to the present invention, the system down judging means and the restart signal processing means are provided as an external system of the multi-computer system, and the system down judging means fetches the status signals of a plurality of computers respectively, and combines them by the status signals. Since the system down is detected, the system down can be monitored reliably and easily. Further, the restart signal processing means, when a system down is detected, gives a reset start signal and an initialization start signal as restart signals to a specific computer that has gone down, so that the function recovery of the multi-system computer system is automatically and automatically performed. Do it quickly. As a result, it becomes possible to increase the operating rate of the system and improve the reliability.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a multi-system computer system (hereinafter referred to as a multi-system) showing an embodiment of the present invention. In FIG. 1, 101 is a CPU 1 and 102 is a C
PU2 and 103 are CPU n, 104 is a system down determination unit, 107 is a restart signal processing unit, and 112 is a DISC (1, 2 ,,) that saves the contents of a main storage device (not shown).
n) is shown. The system down determination unit (104)
It is installed outside the multi-system consisting of U1,2, n, takes in the status signal (105) from each CPU1,2, n (101,102,103), and causes any system failure, for example, all CPU ( Stopping during online operation or offline operation) Stopping all CPUs during online operation (including backup standby) Stopping CPUs that have essential functions for online operation (when functions are distributed among multiple CPUs) Check the combination of. When it is determined that the system is down, a system down signal (106) is generated. The restart signal processing unit (107) is installed outside the multi-system including the CPUs 1, 2, and n, and the restart abandonment determination mechanism (108) and the restart signal generation mechanism (1).
It consists of 10). As a restart signal, the restart signal generation mechanism (110) is a signal for restarting without first initializing the main storage device or the like (hereinafter, referred to as a reset start signal).
Then, when the CPU does not start, a restart signal (hereinafter, referred to as an initialization start signal) for initializing the main storage device or the like is generated, and the type is determined and output. Therefore, if it is the first restart request (109), the restart signal (110) is output as the reset start signal, and if it is the second or subsequent restart request (109), the restart signal (110) is output as the initialization start signal. Also,
If the initialization start signal has already been output a certain number of times,
The restart is abandoned and the restart request (109) is not made.
When each CPU 1, 2, n (101, 102, 103) receives the reset start signal, the contents of the main storage device are saved for each DISC 1, 2, n (11) before reset start.
Move to 2). When the initialization activation signal is received, the contents of the main storage device are not saved.

FIG. 2 shows an operation flow of the system down judging section (104) in the triple computer system. First, from each CPU (101, 102, 103),
It takes in a stop signal, a watchdog timer (WDT) timeout signal, an online status signal, and an offline status signal. Based on the combination of these signals, it is determined whether each CPU has stopped during online operation (this state is referred to as CPU down). Next, a combination of CPU downs leading to system down is determined from this determination result. Here, the definition of system down in this embodiment is defined as "stopping all CPUs during online operation". Therefore, when two CPUs in the online state are down, the system down signal (106) is transferred to the restart signal processing unit (107) as a system down. By the way, the CPU operation form of the triple computer system is basically each CPU
Since (101, 102, 103) are operated as a normal system, a standby system, and an offline system (test system or stop), respectively, the system down occurs when both the normal system and the standby system in online operation are CPU down. This is the case. Here, there are the following three types of combinations of CPU abnormalities that lead to system down, which can be a normal system and a standby system, and the combination of CPU down is determined from these three types. When CPU1 and CPU2 are down CPU When CPU1 and CPU3 are down CPU When CPU2 and CPU3 are down CPU Here, the definitions of online and offline are as follows. (A) Online: The function of directly performing tasks such as monitoring, control, and status recording on the control target, or the name of the mode. (B) Offline: The name of a function or mode that is not online. As described above, in this embodiment, the system down determination unit is provided as an external system of the multi-computer system, the status signals of a plurality of computers are respectively captured, and the system down is detected by the combination of the status signals. Is reliable and easy to detect.

FIG. 3 shows an operation flow of the restart signal processing section (107) in the triple computer system. In addition,
In this embodiment, if the system down does not recover even if the initialization start signal is output once, the restart is abandoned. First, by inputting the system down signal (106), the counter is incremented and the timer is started. The timer is variable and the time required for the CPU to restart is set. With this timer, CP
U Determine if the restart was successful. Further, the counter is used to determine the restart signal type or the restart abandonment. First system down signal (10
When 6) is input, the counter is set to "1", the reset start signal (110) is generated, and the reset start signal is output to the stopped CPU. Further, the CPU that has received the reset activation signal saves the contents of the main storage device to the save DISC before performing the reset activation. When the time set in the timer elapses, the system down signal (10
If the input in 6) is continued, it is determined that the restart has failed, and the counter is incremented and the timer is started again. If the system down signal (106) is not input,
When the restart is successful, the status of the restart signal processing unit (107) is initialized and the process ends. Next, in the case of the restart failure, the counter is set to "2" by the input of the system down signal (106) again, the initialization start signal (110) is generated, and the initialization start signal is sent to the stopped CPU. Is output.
Upon receiving the initialization start signal, the CPU performs the initialization start without saving the contents of the main storage device. If the time set in the timer has passed and the input of the system down signal (106) continues, it is determined that the restart has failed, the counter is incremented again, and the timer is started again. If the input of the system down signal (106) has disappeared, the restart is considered to be successful, the state of the restart signal processing unit (107) is initialized, and the process ends. Next, if the restart fails, the counter is set to "3" by inputting the system down signal (106) again.
Is set to In this case, the restart is abandoned, and a switch (not shown) for inputting the system down signal (106)
Is turned off to invalidate the restart signal processing unit (107) so that the restart signal (110) is not output again. In addition, the state of the restart signal processing unit (107) is initialized and the process ends. As described above, in this embodiment, the restart signal processing unit is provided as an external system of the multi-computer system, the reset start signal is given at the first system down, and the initialization is performed at the restart failure. Since the start signal is given, the CPU that goes down is
By giving an appropriate restart signal, it is possible to automatically and quickly restore the function of the multi-computer system.

Next, a detailed device configuration of this embodiment is shown in FIG.
This is shown in FIGS. FIG. 4 shows the overall device configuration of the multi-system computer system. In FIG.
n (101, 102, 103) to the system down determination unit (104), a CPU stop signal (201) and a watchdog timer (WDT) timeout signal (20).
2), the online status signal (203) and the offline status signal (204) are output, and the system down determination unit (10)
4) from the restart signal processing unit (107) to the CPU1 down signal (301), CPU2 down signal (302), CP
Un down signal (303), system down signal (30
4), the system down determination unit (104) outputs a reset activation signal (401) and an initialization activation signal (402) to each CPU (101, 102, 103), and each C
A main memory content save request (405) is output from the PU (101, 102, 103) to the save DISC 1, 2, n (112) for saving the content of the main memory device.

FIG. 5 shows a device configuration of the system down determination unit (104) in the triple computer system. The system down determination unit (104) includes a CPU1 down determination unit (311) and a CPU2 down determination unit (312). , CPU
A 3 down determination unit (313) and a system down determination unit (314). (1) First, the CPU1 down determination unit (311) sets C
CPU stop signal (20) output from PU1 (101)
1), a watchdog timer (WDT) timeout signal (202), an online status signal (203), and an offline status signal (204) are fetched. A logical sum (OR circuit) of the CPU stop signal (201) and the watchdog timer (WDT) timeout signal (202), and a logical product (AND circuit) of the online state signal (203)
Then, it is determined whether the CPU 1 (101) is stopped during the online operation (this state is referred to as CPU down). When the CPU goes down, the CPU1 down signal (30
1) is output. CPU2 down determination unit (312), C
Similarly in the PU3 down determination unit (313)
2 (102), CPU3 (103) CPU down determination is performed, and when the CPU is down, the CPU2 down signal (302) and the CPU3 down signal (303) are output. Here, when each of the CPUs 1, 2, and 3 is in the off-line state, the hold circuit is reset by the off-line state signal (204). (2) Then, based on the determination result of (1), the CPU down combination leading to the system down is determined. The definition of system down in this embodiment is "stop of two CPUs that can be in online operation (regular system, standby system)". Therefore, CPU down of CPU1 and CPU2, CPU down
2 and CPU3 CPU down, CPU1 and CPU3 C
Three combinations of CPU down, PU down, that is, each C
The logical product (AND circuit) with the PU down signal is taken, and the logical circuit (OR) in the system down determination unit (314) is obtained.
Circuit, NOT circuit, AND circuit) to determine system down. Each CPU down signal (301, 30
2, 303) and the system down signal (304) are output to the restarting signal processing unit (107).

FIG. 6 shows the equipment configuration of the restart signal processing unit (107) in the triple computer system. The restart signal processing unit (107) includes a timer (411), a counter (414), and a reset start signal. Generating circuit (416), initialization start signal generating circuit (417), relay circuit (41)
8) and a hold circuit (419). (1) First, when the system down signal (304) is input, the counter (414) is incremented and the timer (411) is started (412). The relay circuit (418) is a switch for inputting the system down signal, and is closed when the system is down or when the system is restored.
The input of the system down signal (304) is made valid by keeping this state, opened at the time of giving up restart (described later), and the input of the system down signal is made invalid. (2) When the system down signal (304) for the first time is input, the counter is set to "1" and the reset activation signal generation circuit (416) is activated. Logical product (AND circuit) of the output signal (403) of the reset activation signal generation circuit (416) and each CPU down signal (301, 302, 303) output from the system down determination unit (104)
The reset activation signal (401) thus generated is output to the down CPU. CP down here
The U receives the reset start signal (401), outputs a main memory content save request (405) to the save DISC (112), and saves the content of the main memory device. (3) When the time set in the timer (405) has elapsed, the hold circuit (419) and the timer (405) themselves are reset (413). At this time, if the system down is not recovered (restart failure), the system down signal (304) is input again to the restart signal processing unit (107), the hold circuit (415) is set, and (1) is set. Similarly, the counter (414) is incremented and the timer (41
The activation (412) of 1) is performed. When the system down is restored, the state of the counter (414) is initialized and the process ends. (4) If the restart fails, the system down signal (304) is input again, the counter (414) is set to "2", and the initialization start signal generation circuit (417) is started. The output signal (4) of the initialization start signal generation circuit (417)
04) and the CPU down signals (301, 302, 303) output from the system down determination unit (104), and the generated initialization start signal (402) goes down. It is output to the CPU. (5) When the time set in the timer (405) has elapsed, the hold circuit (419) and the timer (405) themselves are reset (413). At this time, if the system down is not recovered (restart failure), the system down signal (304) is input again to the restart signal processing unit (107), the hold circuit (419) is set, and (1) is set. Similarly, the counter (414) is incremented and the timer (41
The activation (412) of 1) is performed. When the system down is restored, the state of the counter (414) is initialized and the process ends. (6) If the restart fails, the system down signal (304) is input again, and the counter (414) is "3".
Is set to In this case, the restart is abandoned, the relay circuit (418) that is the system down input switch is opened, the system down signal input is disabled, and the restart signal output is not performed again.
The state of 14) is initialized and the process ends.

[0013]

As described above, according to the present invention,
A system down determination unit and a restart signal processing unit are provided as an external system of the multi-system computer system, the status signals of a plurality of computers are respectively captured, and the system down is detected by the combination of these status signals. Reliable and easy. Further, when a system down is detected, an appropriate restart signal is given to the specific CPU that went down, so that the function recovery of the multi-system computer system can be performed automatically and quickly. As a result, in the present invention, it is possible to increase the operating rate of the system and improve the reliability. Further, in the present invention, the contents of the main storage device are automatically saved for DI when the restart is executed.
By storing in the SC, it becomes possible to use it for later trouble cause analysis.

[Brief description of drawings]

FIG. 1 is a block diagram of a multi-system computer system showing an embodiment of the present invention.

FIG. 2 is an operation flow of a system down determination unit

FIG. 3 is an operation flow of a restart signal processing unit (107).

FIG. 4 is an overall device configuration diagram of a multi-computer system

FIG. 5 is a device configuration diagram of a system down determination unit

FIG. 6 is a device configuration diagram of a restarting signal processing unit.

FIG. 7: Conventional triple computer system

[Explanation of symbols]

 101 CPU1 102 CPU2 103 CPUn 104 System down determination unit 107 Restart signal processing unit 108 Restart abandonment determination mechanism 110 Restart signal generation mechanism 112 DISC 311 for saving main memory contents CPU down determination unit (CPU1) 312 CPU down determination unit (CPU2) 313 CPU down determination unit (CPU3) 314 System down determination unit 411 Timer 414 Counter 416 Reset activation signal generation circuit 417 Initialization activation signal generation circuit 418 Relay circuit 419 Hold circuit

Claims (8)

[Claims] 1. In a multi-system computer system composed of a plurality of computers, the computer is installed outside the system, and the abnormal combination of computers leading to system down is checked based on the status signal fetched from each computer. A system down judging means for judging whether or not the system is down, and a restart signal as a reset start signal for the first restart request, and as a reset start signal for the second and subsequent restart requests. An automatic restart device for a multi-system computer system, comprising an output restart signal processing means for outputting. 2. The automatic restart device for a multi-system computer system according to claim 1, wherein the function of the restart signal processing means is disabled when the restart request is issued a predetermined number of times. 3. The memory according to claim 1 or 2, wherein a memory for saving the contents of the main storage device is provided, and each computer is
When receiving the reset start signal, the contents of the main storage device are saved in the memory before the reset start is performed, and when the initialization start signal is received, the contents of the main storage device are not saved. Computer computer system automatic restart device. 4. The system down determination means according to claim 1, wherein the system down determination means checks the combination of abnormalities of the computers for each computer to determine the computer down, and each computer down. An automatic restart apparatus for a multi-system computer system, comprising: a system down determination unit that determines a system down based on a logical product of 5. The restart signal processing means according to claim 1, wherein the restart signal processing means sets a time required for restarting the computer and a counter for counting the number of restart requests. And a reset activation signal generation circuit that issues a reset activation signal and an initialization activation signal generation circuit that issues an initialization activation signal, and abandons the restart request when the number of restart requests is greater than or equal to a predetermined number. Automatic restart device for multi-system computer system. 6. In a multi-system computer system composed of a plurality of computers, based on a status signal taken from each computer, a combination of computer abnormalities leading to a system down is checked to determine whether or not the system is down. An automatic restart method for a multi-system computer system, wherein when the system is down, a reset start signal is issued in response to the first restart request, and an initialization start signal is issued in response to subsequent restart requests. 7. In a multi-system computer system composed of a plurality of computers, a combination of computer abnormalities leading to a system down is checked based on a status signal fetched from each computer to determine whether or not the system is down. When the system is down, a reset start signal is issued for the first restart request, an initialization start signal is issued for the second and subsequent restart requests, and a restart request is issued when the number of restart requests reaches a predetermined number. A method for automatically restarting a multi-computer system characterized by giving up. 8. The automatic restart system for a multi-system computer system according to claim 6 or 7, wherein the computer receiving the reset start signal saves the contents of the main storage device before performing the reset start. starting method.