JPH08286641A - Active matrix display device - Google Patents

Abstract

PURPOSE: To improve image quality of an active matrix display device CONSTITUTION: A vertical scan circuit 2 line sequentially scans each gate line G, and selects pixels LC by one row at intervals of one horizontal period, and a horizontal scan circuit 3 samples successively a real video signal in each signal line S in one horizontal period, and writes the real video signal in the selected pixeld LC by one row point sequentially. A precharge circuit 6 supplies successively a waveform obtained by intentionally omitting the frequency characteristic of the real video signal to respective signal lines S as a precharge video signal going ahead of the successive sampling of the real video signal for respective signal lines S. The horizontal scan circuit 3 is provided with plural horizontal switches HSW connected to the end part of a set of three pieces of signal lines S and an H shift register 5 successively open/close controlling respective switches and simultaneously sampling the real vide signal in plural signal lines, and the precharge circuit supplies simultaneously the precharge video signal to plural signal lines S going ahead of the simultaneous sampling.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix display device. More specifically, the present invention relates to a technique for preventing potential fluctuation of a video signal line in dot sequential driving. Further, the present invention relates to a technique for suppressing “ghost” that occurs in the multiple pixel simultaneous sampling drive.

[0002]

2. Description of the Related Art A conventional active matrix display device has row-shaped gate lines, column-shaped signal lines, and matrix-shaped pixels arranged at respective intersections of both. Each pixel is driven by a switching element such as a thin film transistor. Some active matrix display devices incorporate a vertical scanning circuit and a horizontal scanning circuit in addition to pixels and switching elements. The vertical scanning circuit line-sequentially scans each gate line to select a row of pixels for each horizontal period. The horizontal scanning circuit sequentially samples a video signal on each signal line within one horizontal period, and writes the video signal in a dot-sequential manner to the pixels of one selected row. Specifically, each signal line is connected to a video line via a horizontal switch and receives a video signal from an external video driver, while the horizontal scanning circuit sequentially outputs horizontal sampling pulses to control the opening / closing of each horizontal switch. To do.

By the way, when driving a full-color type active matrix display device, a method of simultaneously sampling a plurality of pixels is effective.
No. 87 publication. In the case of a full-color type display device, pixels of three primary colors are arranged at intersections of gate lines along the row direction and signal lines along the column direction.
The three primary color pixels are arranged at a predetermined pitch along the row direction. It also has a horizontal switch connected to one end of the signal line in units of three. The horizontal switch simultaneously selects each signal line in units of three lines, and writes video signals of three systems divided into three primary colors into three pixels. When performing such three-pixel simultaneous sampling drive, the video driver is provided with a delay means for relatively giving a delay amount corresponding to the pixel pitch to the video signals of three systems in advance. A delay amount corresponding to the pixel pitch is relatively given to the three systems of video signals, and the horizontal switches are simultaneously controlled to open and close in units of groups of three primary color pixels, so that the number of stages of shift registers for driving the horizontal switches can be determined. By reducing the number and simplifying the configuration, the power consumption is also reduced so that good color display can be obtained. Since each horizontal switch is controlled to be opened / closed simultaneously by the sampling pulse output from the shift register, the number of stages of the shift register of the horizontal scanning circuit is 1 /
It will be 3.

[0004]

As the definition of the active matrix display device becomes higher, the sampling rate becomes faster and the sampling pulse width varies. When the sampling pulse is output, the corresponding horizontal switch is opened / closed to sample and hold the video signal from the video line to the corresponding signal line. Each signal line has a capacitance component, and charging / discharging occurs due to sampling of the video signal. As a result, the potential of the video line changes. As described above, when the sampling rate is increased, the sampling pulse width varies, so that the charge / discharge for each signal line is not constant and the potential of the video line fluctuates. This appears as a "fixed pattern of vertical stripes", and there is a problem that the quality of the displayed image is significantly impaired.

In addition, when the multiple pixel simultaneous sampling drive is adopted, there is a problem that "ghost" occurs. In general, the coupling characteristics of the horizontal switch and the signal line have poor frequency characteristics. Also, the phase of the sampling pulse that controls the opening and closing of the horizontal switch varies. Due to these causes, the video signal to be originally written is written not only in the set but also in the pixel of the next set, so-called ghost occurs.
That is, when sampling the video signal, there is variation in the sampling pulse that controls the opening and closing of the horizontal switch,
Originally it should have been sampled at that time, but since it will be sampled at a time offset from that,
In particular, when a plurality of pixels are simultaneously sampled and driven, a ghost or the like is caused. At present, it is very difficult to drastically improve the frequency characteristic (f characteristic) of the coupling structure of the horizontal switch and the signal line due to the parasitic capacitance between the wirings formed in the semiconductor process and the restriction on the patterning. It is also difficult to increase the size of the horizontal switch in terms of layout.

[0006]

In view of the above-mentioned problems of the prior art, the present invention provides not only a "fixed pattern of vertical stripes" caused by a potential fluctuation of a video line, but also a "ghost" generated at the time of simultaneous sampling driving of a plurality of pixels. Is to be suppressed by an electrical method. The following measures have been taken in order to achieve this object. That is, the active matrix display device according to the present invention has, as a basic configuration, row-shaped gate lines, column-shaped signal lines, and matrix-shaped pixels arranged at respective intersections of the two. Further, a vertical scanning circuit is provided, and each gate line is line-sequentially scanned to select pixels for one row every horizontal period. Further, a horizontal scanning circuit is provided, and the video signal is sequentially sampled to each signal line within one horizontal period, and the video signal is written to the selected pixels in one row in a dot-sequential manner. As a feature of the present invention, a precharge circuit is provided, and a predetermined precharge signal is sequentially supplied to each signal line prior to the sequential sampling of the video signal for each signal line. Further, the precharge circuit uses a waveform obtained by intentionally reducing the frequency characteristic of the waveform included in the video signal as the precharge signal.

[0007] Specifically, the horizontal scanning circuit has a plurality of switches connected to one end of a pair of two or more signal lines, and sequentially controlling the opening and closing of each switch to display an image on the two or more signal lines. And a shift register for simultaneously sampling the signals. In this case, the precharge circuit simultaneously supplies a precharge signal to two or more signal lines prior to the simultaneous sampling. On the other hand, the shift register sequentially outputs sampling pulses separated in time to control the opening / closing of each switch.

[0008]

According to the present invention, the charge / discharge of each signal line is almost completed by the precharge signal, and the charge / discharge when sampling the video signal is generated only by the difference between the precharge level and the signal level. ing. Therefore, the fluctuation of the potential of the video line for supplying the video signal is suppressed as compared with the conventional case, and the “fixed pattern of vertical stripes” which is a problem in image quality can be eliminated.

Further, the precharge circuit uses a waveform obtained by intentionally reducing the frequency characteristic of the waveform included in the video signal for the precharge signal. As a result, the signal line potential level immediately before writing the video signal is optimized, and even if the phase of the sampling pulse varies, "ghost" can be suppressed.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of an active matrix display device according to the present invention. The active matrix display device includes row-shaped gate lines G, column-shaped signal lines S, and matrix-shaped liquid crystal pixels LC arranged at respective intersections of the two. Although the pixel LC using liquid crystal as the electro-optical material is provided in this embodiment, the present invention is not limited to this, and other electro-optical materials may be used. A thin film transistor Tr for driving is provided corresponding to each liquid crystal pixel LC. Thin film transistor T
The source electrode of r is connected to the corresponding signal line S, the gate electrode is connected to the corresponding gate line G, and the drain electrode is connected to the corresponding liquid crystal pixel LC.

This device has a built-in V shift register 1 and scans each gate line G line-sequentially to select one row of liquid crystal pixels LC for each horizontal period. That is, the V shift register 1
The vertical scanning circuit 2 is constituted by. More specifically, the V shift register 1 sequentially transfers the vertical start signal VST in synchronization with a pair of vertical clock signals VCK and VCKX having mutually opposite phases, and selects pulses V1, ..., Vm to each gate line G. Output to. Thereby, the thin film transistor T
The opening and closing of r is controlled.

Further, the present apparatus has a built-in horizontal scanning circuit 3 and sequentially samples an actual video signal (hereinafter referred to as an actual video signal) to each signal line S within one horizontal period, and selects one row. The actual video signal is written in the liquid crystal pixels LC in a dot-sequential manner. Specifically, one end of each signal line S has three wires.
As a set, horizontal switches HSW1, HSW2, HSW3,
HSW4, ... Are provided, and each has a video line 4
It is connected to and receives the supply of the actual video signal. Further, the H shift register 5 included in the horizontal scanning circuit 3 sequentially transfers the horizontal start signal HST in synchronization with a pair of horizontal clock signals HCK and HCKX having mutually opposite phases, and sampling pulses H1, H2, H3, and H3. Outputs H4, ... These sampling pulses correspond to the corresponding horizontal switch HS
The open / close control of W1, HSW2, HSW3, HSW4, ... Is carried out to sample and hold the actual video signal on each signal line S.

In the present embodiment, the horizontal scanning circuit 3 has three systems of signal components VideoA and Video included in the actual video signal.
oB and VideoC are simultaneously sampled and distributed to three signal lines S all at once. That is, the 3-pixel simultaneous sampling drive is adopted. One horizontal switch HSW is connected to three signal lines S. One horizontal switch HS
W is supplied with the above-mentioned three-system signal components VideoA, VideoB, and VideoC via three video lines 4. The signal components of these three systems are components corresponding to the three primary colors, for example, and full-color display is performed. Three
The signal components of the system are simultaneously sampled to the corresponding three signal lines S via each HSW. That is, the H shift register 5 has sampling pulses H1, H2, H3, H4,
, Are sequentially output, and the corresponding horizontal switches HSW are controlled to be opened / closed, and the above-mentioned simultaneous sampling is performed.

As a feature of the present invention, the active matrix display device is provided with a precharge circuit 6, and prior to the sequential sampling of the actual video signal for each signal line S, a predetermined precharge signal is given to each signal line S. Are sequentially supplied to each of the signal lines S to suppress the charge and discharge of each signal line S due to sampling. As a result, fluctuations in the potential of the video line 4 are reduced. As the predetermined precharge signal, for example, a signal having the same waveform as the actual video signal is used. Therefore, in this example, the predetermined precharge signal is called a precharge video signal. In a specific configuration, the precharge circuit 6 has precharge switches PSW1, PSW2, PSW3, PSW4, ... Connected to the ends of the individual signal lines S. Each PSW is the same as HSW.
It is provided for each group. The precharge circuit 6 is further P
The shift register 7 is provided, and the precharge switch PSW is sequentially controlled to be opened and closed to supply a precharge video signal to each signal line S in units of three lines. Specifically, the P shift register 7 has a configuration similar to that of the H shift register 5, and sequentially transfers the horizontal start signal PST in synchronization with the horizontal clock signals PCK and PCKX having mutually opposite phases to perform precharge ( Sampling pulses P1 and P for precharging)
2, P3, P4, ... Are output. The precharge switch PSW is sequentially controlled to be opened / closed by these precharge samplings. The precharge video signal is supplied to each precharge switch PSW via the precharge line 8.
1, PSW2, PSW3, PSW4, ... The real video signal includes three system signal components, whereas the precharge video signal is only one system. However,
The present invention is not limited to this, and the precharge video signal may use the signal components of the three systems corresponding to the signal components of the three systems included in the actual video signal. In this example, the precharge video signal uses a waveform obtained by intentionally reducing the frequency characteristic of the waveform of one component included in the actual video signal. As a result, the potential level of the signal line S before writing the actual video signal can be optimized, and even if the phases of the sampling pulses H1, H2, H3, H4, ... ing.

FIG. 2 is a schematic block diagram showing a configuration example of a display system assembled by using the active matrix display device shown in FIG. This system comprises an active matrix display device 11, a video driver 12, and a timing generator 13. The active matrix display device 11 has a configuration as shown in FIG. 1, and has a vertical scanning circuit, a horizontal scanning circuit, and a precharge circuit in addition to the pixels arranged in rows and columns. The video driver 12 has three systems of real video signal components VideoA, V according to the arrangement pitch of the liquid crystal pixels in advance.
The video B and the video C are relatively delayed to adjust the supply timing of the real video signal to the active matrix display device 11. In this example, the video driver 12
Has an analog configuration and has a sample hold circuit for delaying the actual video signal. The sample and hold circuit includes three sample and hold units (delay channels) provided corresponding to each of the three systems of actual video signal components. In this example, the video signal VideoIN supplied from the outside is accepted as a real video signal source,
Distribute to the above 3 sample and hold units,
System actual video signal components VideoA, VideoB, V
I am getting videoC. Further, the video driver 12 is provided with an external low-pass filter 14, and the video I
N is filtered to form a precharge video signal source. That is, the waveform obtained by intentionally reducing the frequency characteristic of the waveform included in VideoIN is used as the precharge video signal source and supplied to the video driver 12. The video driver 12 delays the filtered VideoIN with any one sample hold unit, and then supplies it to the active matrix display device 11 as a precharge video signal.

The timing generator 13 controls the simultaneous sampling period of the horizontal scanning circuit included in the active matrix display device 11 and also controls the video driver 1.
The timing of the delay processing of No. 2 is controlled. Specifically, the timing generator 13 operates according to the synchronization signal SYNC supplied from the video driver 12, and various timing signals HST, HCK, HCKX, PST, PCK,
PCKX, VST, VCK, and VCKX are supplied to the active matrix display device 11 to control its drive.
Further, the timing generator 13 sends a plurality of latch signals S to the sample hold circuit of the video driver 12.
/ HA, S / HB, S / HC are supplied. These latch signals define the processing timing of each delay channel included in the sample hold circuit.

FIG. 3 is a waveform diagram showing an example of various signals appearing in FIG. The externally input composite video signal VideoIN has a level of Vb for only one pixel (one dot), for example, and all other pixels have a level of Vg. Precharge video signal source is VideoIN
Is processed by the low-pass filter 14, and f
The characteristics are lowered appropriately. VideoIN is used as it is as a real video signal source input to the video driver 12. On the other hand, three systems of real video signal components VideoA,
The phases of the three latch signals S / HA, S / HB, and S / HC corresponding to VideoB and VideoC are shifted by one dot, respectively. The video driver 12 samples and holds the signal from the precharge video signal source with any of the latch signals (for example, S / HB) and supplies the precharge video signal to the active matrix display device 11.
As a result, the precharge video signal is kept at the level of Vg because the f characteristic is lowered when the signal level changes by about 1 or 2 dots. That is, the Vb level of about 1 dot included in the original VideoIN is removed and flattened to the Vg level. On the other hand, the actual video signal holds the sampled and held Vb level, as shown by Video B as an example.

Next, the operation of the active matrix display device shown in FIGS. 1 and 2 will be described in detail with reference to the timing chart of FIG. The precharge circuit 6 is a PC
It operates according to K and PCKX, and sequentially transfers PST to sample pulses P1, P2, P for precharge.
, 3, P4, ... On the other hand, the horizontal scanning circuit 3 is H
It operates according to CK and HCKX, sequentially transfers HST, and sequentially outputs sampling pulses H1, H2, H3, H4, .... The precharge video signal has an almost constant Vg level because f characteristic is appropriately lowered in advance. On the other hand, the actual video signal has the level of Vb for only one dot, for example, and has the Vg level for the other dots.
Originally, the actual video signal and the sampling pulse H should be synchronized via the timing generator, but in reality, the phase of the sampling pulse H varies. In this example, Vb originally included in the actual video signal
Although the peak for 1 dot corresponds to the sampling pulse H2, the phase is shifted by about half, and therefore the peak for Vb for 1 dot also applies to the next sampling pulse H3.

The potential level V of each signal line in this state
The change in sig is shown at the bottom of the timing chart in FIG. Here, the potential Vsig2 of the signal line S connected to the horizontal switch HSW2 supplied with the sampling pulse H2 and supplied with VideoB, and the signal connected to the horizontal switch HSW3 supplied with the sampling pulse H3 and supplied with VideoB. Attention is paid to the potential Vsig3 of the line S. The arrangement of the signal lines S in which the potential levels of Vsig2 and Vsig3 appear is shown in FIG. First, when P2 rises (previously indicated by an arrow), the precharge video signal is sampled and Vsig2 changes to the level of Vg. After that, when the sampling pulse H2 falls, the Vb level of the actual video signal is sampled and Vsig2 rises. However, since the peak of Vb of the actual video signal and the phase of H2 are out of phase, Vsig
2 stops at the level of Vg + ΔV without reaching Vb. Next, the precharge video signal is sampled according to the fall of P3, and the level of Vsig3 rises to Vg. Subsequently, when H3 rises, Vsig3 rises because it partially overlaps the peak Vb of the actual video signal. Since H3 falls in the middle of the process, Vsig3 drops again and eventually returns to the Vg level. Therefore, the level of Vsig2 changes to Vg + ΔV, while the level of Vsig3 is maintained at Vg, and at least no ghost occurs.
In this way, if the level of Vsig before writing the actual video signal is optimally set by the precharge video signal,
No ghost occurs even if the phase variation of the sampling pulse H is up to about half of φ _HCK . Therefore, in the present invention, a waveform obtained by intentionally reducing the frequency characteristic of the waveform included in the actual video signal is used for the precharge video signal.

FIG. 5 shows the phase relationship of various signals used for driving the active matrix display device according to the present invention. A clock signal HCK supplied to the horizontal scanning circuit and a clock signal P supplied to the precharge circuit
The same CK can be used. On the other hand, the start signal PST supplied to the precharge circuit precedes the start signal HST supplied to the horizontal scanning circuit by a predetermined number of dots. Further, it is necessary to synchronize the output timing of the PST and the output timing of the precharge video signal. Of course, it is necessary to synchronize the output timing of the HST and the output timing of the actual video signal. These synchronization controls are performed by the timing generator 13 shown in FIG.
Can be done by.

FIG. 6 is a circuit diagram showing a reference example of an active matrix display device. This reference example also carries out 3-pixel simultaneous sampling drive, and basically has a configuration similar to that of the active matrix display device according to the present invention shown in FIG. Therefore, corresponding parts are given corresponding reference numerals to facilitate understanding. However, this reference example does not include a precharge circuit.

Next, the operation of the reference example shown in FIG. 6 will be briefly described with reference to FIG. In this example, the sampling pulses H1, H2, H3, H4, ... Partially overlap each other. Each sampling pulse has a pulse width of 4 dots and overlaps with each other by 3 dots. Real video signal VideoA, Video
For example, C has a gray level potential Vg over all pixels. On the other hand, the remaining real video signal VideoB
Has a black level potential Vb for only one dot, and the remaining pixels have a gray level potential Vg. That is, 1
This is an actual video signal that displays black dots only. In such a case, the potentials Vsig2 and Vsig3 of the signal line change as shown in FIG. 7 at each time. For example, for the active matrix display device of the lot A that has a phase difference of half of φ _HCK between Video B and sampling pulse H, Vsig2 holds a certain potential that was previously written, and sampling pulse H At the same time when H2 rises, it is charged to Vg. After that, when VideoB changes from Vg to Vb, Vsig has a certain f characteristic.
2 also rises to Vb. However, Vg + ΔV (Δ
When V> 0), the sampling pulse H2 falls. Therefore, it is held at this potential Vg + ΔV.
On the lot A, both Vsig2 and Vsig3 are Vg + Δ
It becomes a "ghost" because it is held near V. On the other hand, in Lot B, there is almost no phase difference between VideoB and sampling pulse H. Therefore, Vsig2 is held at Vb and Vsig3 is held at Vg. Therefore, it does not become a "ghost." However, in the case of lot B, if the sampling pulses H1, H2, H3, H4, ... Slightly earlier than the timing shown in FIG. 7, "ghost" will occur as in the case of lot A. Due to the frequency characteristic of the coupling of the horizontal switch and the signal line, a “ghost” occurs even if the phase of the sampling pulse for driving the horizontal switch is slightly shifted. In this way, if the widths of the sampling pulses overlap with each other in time, "ghost" is likely to occur. Therefore, in the present invention, the horizontal scanning circuit sequentially outputs sampling pulses separated in time to control the opening / closing of each horizontal switch.

However, it is not possible to completely eliminate the "ghost" by simply separating the sampling pulses in time. This point will be described with reference to FIG. FIG.
6 shows another example of the driving method of the active matrix display device according to the reference example shown in FIG. In this example, the sampling pulses H1, H2,
.. are set so as not to overlap each other. Under this condition, the generation state of "ghost" varies depending on the signal line potential level before the rising of the sampling pulse H. First, in the lot A with a phase difference of about half of φ _HCK between Video B and sampling pulse H, a “ghost” occurs when the level of Vsig before writing the actual video signal is Vb (case B).
On the other hand, when the potential of Vsig is at the level of Vg (case G), “ghost” does not occur. In this way, even if the sampling pulses H that do not overlap each other are used,
Depending on the signal line potential, "ghost" may or may not occur. When the phases of VideoB and sampling pulse H are substantially matched with each other (lot B), "ghost" does not occur.

Further, the timing chart of FIG.
DeoA and VideoC are at the level of Vb, and Vid
It shows the case where eoB changes to Vg by one dot and the remaining dots are at the level of Vb. At this time,
If the level of Vsig before writing the actual video signal is Vb (Case B), “ghost” does not occur in both lot A and lot B. However, if the level of Vsig before writing the actual video signal is Vg in the lot A (Case G), “ghost” occurs. In this way, if the level of Vsig before writing the actual video signal is optimally set, "ghost" does not occur even if the variation of the sampling pulse H is about half of φ _HCK . Therefore, in the present invention, the waveform obtained by intentionally reducing the frequency characteristic of the waveform included in the real video signal is used as the precharge video signal to optimize the level of Vsig before writing the real video signal.

[0025]

As described above, according to the present invention, when a plurality of pixels are simultaneously sampled and driven, the frequency characteristic of the precharge video signal is lowered and the signal lines are precharged in a dot-sequential manner. After that, the sampling pulse when writing the actual video signal is driven so as not to overlap with the adjacent sampling pulse. This widens the phase margin of the sampling pulse with respect to the "ghost". Therefore, the allowable fluctuation range of the process design and the power supply voltage can be expanded.
Moreover, since "ghost" can be suppressed, the image quality of the active matrix display device is improved.

[Brief description of drawings]

FIG. 1 is a schematic circuit diagram showing an embodiment of an active matrix display device according to the present invention.

FIG. 2 is a block diagram showing an overall configuration of a display system assembled using the active matrix display device shown in FIG.

FIG. 3 is a waveform diagram for explaining the operation of a video driver incorporated in the system shown in FIG.

FIG. 4 is a timing chart for explaining the operation of the active matrix display device shown in FIG.

FIG. 5 is a waveform diagram similarly provided for explaining the operation.

FIG. 6 is a circuit diagram showing a reference example of an active matrix display device.

FIG. 7 is a timing chart for explaining the operation of the reference example shown in FIG.

8 is a timing chart for explaining the operation of the reference example shown in FIG.

9 is a timing chart for explaining the operation of the reference example shown in FIG.

[Explanation of symbols]

 1 V shift register 2 Vertical scanning circuit 3 Horizontal scanning circuit 4 Video line 5 H shift register 6 Precharge circuit 7 P shift register 8 Precharge line 11 Active matrix display device 12 Video driver 13 Timing generator 14 Filter

Claims (3)

[Claims] 1. A row-shaped gate line, a column-shaped signal line, a matrix-shaped pixel arranged at each intersection of the two, and a line-sequential scanning of each gate line, and one row of pixels for each horizontal period. An active matrix display device having a vertical scanning circuit for selecting an image signal and a horizontal scanning circuit for sequentially sampling a video signal on each signal line in one horizontal period and writing the video signal in a dot-sequential manner to pixels in a selected row. The precharge circuit includes a precharge circuit that sequentially supplies a predetermined precharge signal to each signal line prior to the sequential sampling of the video signal for each signal line. An active matrix display device characterized in that a waveform obtained by intentionally reducing frequency characteristics is used as a precharge signal. 2. The horizontal scanning circuit comprises a plurality of switches connected to one end of a pair of two or more signal lines and a switch for sequentially opening and closing each switch so that a video signal can be simultaneously transmitted to the two or more signal lines. The active matrix display device according to claim 1, further comprising a shift register for sampling, wherein the precharge circuit simultaneously supplies a precharge signal to two or more signal lines prior to the simultaneous sampling. 3. The active matrix display device according to claim 2, wherein the shift register sequentially outputs sampling pulses separated in time to control opening / closing of each switch.