JPH0828040B2 - Video signal recording / reproducing device - Google Patents

Description

TECHNICAL FIELD The present invention relates to a video signal recording / reproducing apparatus, and more specifically,
The present invention relates to a video signal recording / reproducing device capable of easily and inexpensively recording / reproducing a high-definition video signal by using existing equipment.

[Conventional technology]

Conventionally, for example, in a home-use video tape recorder of an analog recording system, it is known that the resolution is increased by shortening the recording wavelength, that is, by adopting a so-called high band system in which the modulation frequency at the time of recording is increased. . In addition, a digital recording method is also adopted in order to increase the recording fidelity.

However, a method for easily and economically recording a high-definition video signal has not been developed yet.

[Problems to be Solved by the Invention]

In the conventional high band system, there is a limit to the practical recording wavelength, so naturally there is a limit in improving the resolution.

On the other hand, in digital recording, if a video signal is directly converted to a digital signal, the amount of information to be recorded will be enormous, and the recording density will be too high to be accepted by existing equipment. It is not economical because it will be necessary. Digital data can be compressed and recorded, but in this case, the circuit scale of the circuit for data compression and decompression becomes considerably large, and the economical efficiency still remains unsatisfactory.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a video signal recording / reproducing apparatus capable of easily and inexpensively recording / reproducing a high-definition video signal using existing equipment. To do.

[Means for solving the problem]

In order to achieve the above-mentioned object, the video signal recording / reproducing apparatus of the present invention has an A / D conversion means for converting an input video signal into digital data, and the converted digital data in which adjacent data is pixel by pixel. Time division means for time division so as to disperse into a plurality of time series data, a plurality of modulation means for respectively modulating the separated time series data and converting into analog data, and an analog output by each modulation means Recording and reproducing means for recording data on a recording medium and reproducing analog data recorded on the recording medium, a plurality of demodulating means for converting each reproduced analog data into reproduction time series data by demodulation, and each demodulating means Frame memory means provided correspondingly for storing the reproduction time series data converted for each pixel, and provided corresponding to each frame memory means When the reproduction time series data is stored in the frame memory means, the stored reproduction time series data is output, while when the reproduction time series data is not stored in the frame memory means, the reproduction time series data is stored in the frame memory means. Interpolation means for outputting the reproduction time series data stored in the frame memory means that precedes in time series and stores the reproduction time series data as interpolation data, and the reproduction time series from the interpolation means And a synthesizing unit for synthesizing the data or the interpolated data by arranging them in chronological order to restore a series of reproduced video signals.

[Action]

According to the above configuration, when the video signal is input, the A / D
It is converted into digital data by the conversion means. This digital data is time-divided by a time-division means into a plurality of time-series data so that adjacent data are dispersed for each pixel. The separated time series data is converted into analog data by the corresponding modulation means.
This analog data is recorded on the recording medium by the corresponding recording / reproducing means.

On the other hand, at the time of reproduction, the analog data recorded on the recording medium is reproduced by the recording / reproducing means. The reproduced analog data is converted into reproduced time series data by the corresponding demodulating means and demodulated. The reproduction time series data thus converted for each pixel is stored in the corresponding frame memory means.

When the reproduction time series data is stored in the frame memory means, the stored reproduction time series data is output from the interpolation means to the synthesizing means. On the other hand, when the reproduction time-series data is not stored in the frame memory means, the frame in which the reproduction time-series data is stored does not store the reproduction time-series data. The reproduction time series data stored in the memory means is output from the interpolation means to the synthesis means as interpolation data.

For example, when the reproduction time series data is not stored in the first frame memory means, the reproduction time series data stored in the second frame memory means preceding the first frame memory means in time series is It is output as interpolation data. However, at this time, if the reproduction time series data is not stored in the second frame memory means, the reproduction stored in the third frame memory means that precedes the second frame memory means in time series. The time series data is output as interpolation data. That is, the reproduction time series data of the frame memory means which precedes in time series and in which the reproduction time series data is stored is output as the interpolation data.

In the synthesizing means, the reproduction time-series data or the interpolation data from the interpolating means are arranged in time-sequential order and combined to restore a series of reproduced video signals.

As described above, by dividing a video signal, which has become an enormous amount due to high definition, in time series, the amount of information processed by the device used for recording and reproduction can be kept within the acceptance limit of the existing device. Yes, existing equipment can be used to process vast amounts of video signals. In addition, since the interpolation at the time of data reproduction can be easily performed by the reproduction time series data stored in the frame memory means that precedes in time series,
It is possible to reliably avoid continuous damage of the divided time series data.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 to 7.

A video signal recording / reproducing apparatus, as shown in FIG.
A / D that inputs video signal 1 and converts it to digital data
The conversion circuit 2, the time division circuit 3 for dividing the converted digital data into three time series data 104, 105, 106, and the divided time series data 104, 105, 106 are respectively modulated. Three modulators 4, 5, 6 for converting into analog data, and three recording / reproducing devices 7, 8, 9 for recording the converted respective analog data in a recording medium and reproducing the analog data from the recording medium. , Reproduced time series data by demodulating each reproduced analog data 204/205
It is provided with three demodulators 10, 11, 12 for converting to 206 and a synthesizing circuit 13 for arranging and synthesizing the reproduction time series data in the original column order to restore a series of reproduced video signals 14.

The A / D conversion circuit 2 has a known configuration.

The time division circuit 3 may be configured to divide the digital data into three in time series, but here, adjacent data is dispersed and recorded and reproduced by a kind of interleaving. Therefore, three time slots are provided, and as shown in FIG. 2, each pixel in each quantized bit bit0 to bit7 of the output 102 of the A / D converter 2 (data corresponding to one dot on the display screen) ) ...
.. are sequentially allocated to different time slots, and are divided into three time series data 104, 105, and 106 individually input to the three modulators 4, 5, and 6.

In the embodiment shown in FIG. 2, the quantized bits bit0 to bit7 of the A / D conversion circuit 2 are 8 bits, but the number of quantized bits can be increased or decreased as necessary.
Further, the display screen is configured to have planes corresponding to the number of quantized bits bit0 to bit7. Further, the order of the numbers of the respective pixels ... Shows the order of time series.

Modulators 4, 5 and 6 are the input time series data respectively.
A well-known one, which is configured to modulate 104, 105, and 106 and convert it into analog data, according to the characteristics of the recording medium to be used is appropriately used. Here, in order to enable recording / reproduction with a general video tape recorder, as shown in FIG. 3 (a), it is possible to adapt to a method of multiple recording of data on a composite video signal. Fig. 3 (a)
The data of (1) is obtained by multiplexing the luminance signal component having the amplitude information shown in (b) of the figure and the color signal component of (c) having the amplitude information shown in (d) of FIG. In order to increase the density, it is recorded and reproduced as data in which the amplitude information of the luminance signal, the amplitude information of the color signal, and the phase information are combined. That is, assuming that the amplitude of the luminance signal can be separated into 16 steps, 4-bit information is recorded / reproduced by the change of the amplitude of the luminance signal, and the amplitude information and the phase information of the color signal are used to generate the information shown in FIG. 32), that is, 5 bits of information are recorded by one modulation.

The signal space diagram of FIG. 3 (e) shows what kind of information the amplitude information and the phase information of the color signal represent. Here, 32 points are arranged on a plane,
Although 32 kinds of information are recorded by one modulation, it is possible to provide points for showing more information as needed.

The demodulators 10, 11 and 12 operate in reverse to the modulators 4 and 5 to demodulate the reproduced analog data and input the time series data 104 to the modulators 4 and 5 and 6. -It is designed to convert playback time series data corresponding to 105/106.

The synthesizing circuit 13 arranges the reproduction time-series data 204, 205, and 206 in the order of the original video signal data and synthesizes them to restore a series of reproduced video signals 14. Here, the fourth
As shown in FIG. 7 to FIG. 7, the synthesizing circuit 13 includes a frame memory 244, 245 and 246, which is a buffer memory for storing the respective reproduction time series data 204, 205 and 206, and an interpolating circuit 250.
A multiplexer 251, and a D / A converter (not shown).

Interpolation circuit 250 is a control input C4, C5, C6 which is switched between H and L according to the states of frame memories 244, 245 and 246.
Is input and each reproduction time series data 204/205/206 or its interpolation data is output to each input terminal of the multiplexer 251. The control input C4 is switched to H when data is stored in the frame memory 244, and switched to L when the frame memory 244 is empty. The other control inputs C5 and C6 are similarly switched between H and L corresponding to the states of the frame memories 245 and 246, respectively. Interpolation circuit 250 is used for each frame memory 244 ・ 245 ・ 2
Input 46 and the corresponding control inputs C4, C5, C6 3
AND circuits 254a, 255a, 256a and these AND circuits
Three OR circuits 254b, 255b, 256b that individually input the outputs of 254a, 255a, 256a and output to each input terminal a, b, c of the multiplexer 251, and an OR circuit 254b whose output precedes in time series・ OR circuit 254b that receives 255b ・ 256b output and control input C4 ・ C5 ・ C6 inverted output and synchronizes them in time series
Three AND circuits that output to 255b / 256b 254c / 255c / 25
With 6c.

The multiplexer 251 has input terminals a, b, c, a
・ 3 frame memories 244 ・ 245 by operating in the order of b ・ c
-It is configured to restore 246 time series relationships.

Note that FIG. 4 shows a case where the reproduction time series data 204, 205, and 206 are completely stored in the respective frame memories 244, 245, and 246. FIG. 5 shows the first frame memory.
This shows a case where the reproduction time series data 204 is stored only in 244 and the other frame memories 245 and 246 are empty. FIG. 6 shows that reproduction time series data 204/205 are stored in the first and second frame memories 244/245,
The case where 6 is empty is shown. FIG. 7 shows a case where the reproduction time series data 204 and 206 are stored in the first and third frame memories 244 and 246 and the second frame memory 245 is empty.

In the recording / reproducing of the video signal carried out by using the above-mentioned video signal recording / reproducing apparatus, the A / D converting circuit 2 converts the video signal 1 into the digital data 102.
The conversion stage is performed. And this digital data
Each pixel in each quantized bit bit0 to bit7 of 102
... are sequentially allocated to three time slots, and a time division step is performed in which the time division data is divided into three time series data 104, 105, and 106 that are individually input to the modulators 4, 5, and 6.

Each modulator 4 that inputs each time-series data 104, 105, 106
In 5.6, each of the time-series data 104, 105, 106 is modulated into a composite video signal composed of analog data in which a luminance signal component and a chrominance signal component are multiplexed in the composite video signal. Then, each of the modulated composite video signals is recorded / reproduced by the recording / reproducing device 7.
The recording step of recording on the recording medium is executed by 9, and the reproducing step of reproducing each composite video signal from the recording medium is executed by the recording / reproducing devices 7, 8 and 9. next,
A demodulation step is performed in which the composite video signals reproduced by the demodulators 10, 11, and 12 are demodulated into reproduction time series data composed of digital data. Then, the reconstructing step of rearranging the demodulated reproduction time series data in the order corresponding to the original video signal is executed in the synthesizing circuit 13.

According to the video signal recording / reproducing apparatus configured as described above, in the time-division stage executed by the time-division circuit 3, the amount of information to be transmitted to the subsequent data processing circuit is input due to the division of data. Since it is 1/3 of the video signal, it can be stored within the allowable information amount of existing equipment. Also, each quantization bit bit0 of the digital data 102
... Each pixel in bit7 ... Is distributed to three time slots in order, so adjacent pixels ... Are dispersed into three time-series data 104, 105, 106 by a kind of interleaving. It is possible to obtain an advantage that continuous damage can be prevented and interpolation at the time of reproducing data can be facilitated.

Further, in the modulation stage executed by the modulators 4, 5, and 6, the amplitude information of the luminance signal, the amplitude information of the color signal, and the phase information are used in combination. 5 per modulation by
Since the bit information can be recorded, the information can be recorded with high density within the allowable information amount of the existing device. Further, such a method is adopted as a so-called APSK method even in a conventional modem (modulation / demodulation device), but in the conventional modem, a technique for separating color information from a video signal in order to secure a reference phase. However, according to the configuration of the present invention, since the burst area of the composite video signal can be secured, the technique of separating the color information from the video signal can be applied.

Further, each composite video signal output from the modulators 4, 5 and 6 is a digital data 10 divided by a time slot.
Since it is composed of analog signals of 4.105 and 106, high definition is not achieved by superimposing analog signals obtained by modulating each time series data on the video part of the composite video signal. It can be input to an ordinary video tape recorder and recorded on a magnetic tape. It is also possible to input the composite video signals reproduced from the magnetic tape to the modulators 10, 11, 12 and rearrange the data order in the synthesizing circuit 13 to obtain the reproduced video signal 14.

The synthesizing circuit 13 is arranged so that each pixel distributed to three time slots by the multiplexer 251 ...
... are rearranged in the original order and output.

In the present embodiment, as shown in FIG. 4, when the reproduction time series data 204, 205 and 206 are completely stored in the frame memories 244, 245 and 246 of the synthesizing circuit 13, the scanning of the multiplexer 251 is performed. The reproduced video signal 14 in which each pixel is completely rearranged in the original order is output.

Further, for example, as shown in FIG. 5, the composite video signals belonging to the two time slots are lost due to the mismatch of the input timings to the synthesizing circuit 13, and the second and third frame memories 245 and 246 become empty. If the multiplexer 251 scans the input end a, the pixel data of the frame memory 244 is input to the AND circuit 254a and the control input C4 (= H) is input to the AND circuit 254a. Data is AND circuit 254a, OR circuit
It is output from the multiplexer 251 via 254b and the input end a. When the input terminal b is scanned, the pixel data of the frame memory 244 is input to the AND circuit 255c via the AND circuit 254a and the OR circuit 254b, and the inverted output (= H) of the control input C5 (= L). Is input to the AND circuit 254c, and the OR circuit 255b to the frame memory 24
The data of 4 pixels is output through the multiplexer 251, and the data corresponding to the missing second pixel is interpolated by the data of the pixel. When the multiplexer 251 scans the input terminal c, the pixel data of the frame memory 244 is input to the AND circuit 256c via the AND circuit 254a, the OR circuit 254b, the AND circuit 255c, and the OR circuit 255b, while the control input C6 (= The inverted output (= H) of L) is input to the AND circuit 256c, and the pixel data of the frame memory 244 is further input to the AND circuit 256c.
The data corresponding to the pixel, which is output via the OR circuit 256b and the multiplexer 251, is interpolated by the pixel data.

The output of the OR circuit 256b is input to the AND circuit 254c at the same time as it is output to the multiplexer 251, but the inverted signal of the control signal C4 (= H) becomes L, so the AND circuit 254c does not output. As a result, the output of the multiplexer 251 is interpolated as ... Here, the pixel of the other frame memory 244 which is missing when the pixel of the first frame memory 244 is input is input.
Has been described, but when the data in the first and third frame memories 244 and 246 is missing, the pixel that is missing due to the pixel stored in the second frame memory 245 in the same manner. Data is interpolated, and if the data in the first and second frame memories 244 and 245 is missing, the data of the pixel and the data missing by the pixel stored in the third frame memory 246 in the same manner. Will be interpolated.

In this way, any one of the reproduction time series data 204.2
When 05/206 is input, other playback time series data 204/20
By automatically interpolating the 5206 data, the number of recorded composite video signals or the reproduced and demodulated playback time series data 204/205/206 is less than the number of input video signals. Even if it does not exist, it is possible to obtain the reproduced video signal 14 having the same number of data as that of the input video signal.

When the composite video signal belonging to one time slot is missing as shown in FIG. 6 or 7,
Similarly, the data corresponding to the pixels of the frame memory 244 where the data is missing is interpolated by the data of the time slot preceding the time slot in time series. If there is data for the subsequent time slot, the data for the subsequent time slot is output, and this data is followed by the subsequent time slot, and the missing data slot Will be updated.

That is, the output of the multiplexer 251 is interpolated as ... In the case of FIG. 6 and is interpolated as ... In the case of FIG. In this way, when the interpolation state is updated each time the reproduction time series data 204/205/206 is input, the reproduction video signal 14 closer to the original video signal can be obtained and input at the time of recording. When the number of video signals is input, the complete reproduction can be finally completed.

〔The invention's effect〕

As described above, the video signal recording / reproducing device according to the present invention converts the input video signal into digital data.
A / D conversion means, time division means for dividing the converted digital data into a plurality of time series data by time division so that adjacent data is dispersed for each pixel, and the separated time series data respectively. A plurality of modulating means for modulating and converting into analog data, a recording / reproducing means for recording analog data output from each modulating means on a recording medium and reproducing the analog data recorded on the recording medium, and each reproduced analog A plurality of demodulation means for converting the data into reproduction time series data by demodulation; a frame memory means provided corresponding to each demodulation means for storing the reproduction time series data converted for each pixel; When the reproduction time series data is provided correspondingly and is stored in the frame memory means, the stored reproduction time series data is output. If the reproduction time series data is not stored in the frame memory means, the reproduction time series data that precedes the frame memory means in time series and is stored in the frame memory means that stores the reproduction time series data Is output as interpolation data to interpolate, and reproduction time-series data from the above-mentioned interpolation means, or composition means for arranging and synthesizing the interpolation data in order of time series to restore a series of reproduced video signals. Is.

Therefore, the video signal digitized by A / D conversion is time-divided into a plurality of time-series data so that adjacent data is dispersed for each pixel, and is transmitted to subsequent data processing circuits. The amount of information can be stored below the allowable amount of information of the existing equipment, and the existing equipment can be used to easily and inexpensively record and reproduce a high-definition video signal.

In particular, in the present invention, since time-divided digital data is converted and recorded into an analog signal, it can be easily recorded and reproduced by existing equipment, and an interpolation operation can be performed against damage to the divided time-series data. Since it can be easily performed by the reproduction time series data stored in the frame memory means that precedes in time series, it is possible to prevent the continuous damage data after the reproduction and prevent the high definition from being damaged by the data damage. The effect is played together.

[Brief description of drawings]

1 to 7 show an embodiment of the present invention. FIG. 1 is a block diagram showing the overall configuration of a video signal recording / reproducing apparatus. FIG. 2 is an explanatory diagram for explaining the operation of the time division circuit. FIG. 3A is a waveform diagram showing the configuration of the output of the modulation circuit.
FIG. 3B is a waveform diagram of the luminance signal component, FIG. 3C is a waveform diagram of the color signal component, FIG. 3D is a waveform diagram of the amplitude information of the color signal component, and FIG. It is a signal space diagram which shows the information which the amplitude information and phase information of a color signal show. FIG. 4 to FIG. 7 are explanatory views for explaining the operation state when the configuration of the synthesis circuit and the input state of the reproduction time series data to the synthesis circuit are different, respectively. 1 is a video signal, 2 is an A / D conversion circuit, 3 is a time division circuit, 4
Is a modulator, 5 is a modulator, 6 is a modulator, 7 is a recording / reproducing device, 8 is a recording / reproducing device, 9 is a recording / reproducing device, 10 is a demodulator, 11 is a demodulator, 12 is a demodulator, and 13 is a composite. Circuit, 14 is a reproduced video signal, 104 is time series data, 105 is time series data, 10
6 is time series data, 204 is reproduction time series data, 205 is reproduction time series data, 206 is reproduction time series data, and 250 is an interpolation circuit.

Claims (1)

[Claims] 1. An A / D conversion means for converting an input video signal into digital data, and the converted digital data are time-divided so that adjacent data are dispersed for each pixel, and a plurality of time series data. Time-division means for dividing the time-series data, a plurality of modulation means for respectively modulating the separated time-series data and converting it to analog data, and the analog data output by each modulation means is recorded on a recording medium and recorded on the recording medium. Recording / reproducing means for reproducing the analog data, a plurality of demodulating means for converting each reproduced analog data into reproduction time-series data by demodulation, and a reproducing means provided corresponding to each demodulating means and converted for each pixel. Frame memory means for storing time-series data, and reproduction time-series data are stored in the frame memory means provided corresponding to each frame memory means. If the playback time series data is stored, the stored playback time series data is output, while if the playback time series data is not stored in the frame memory means, the frame memory means is preceded in time series and the playback time series data is output. An interpolation means for outputting the reproduction time series data stored in the frame memory means storing the data as interpolation data and interpolating the reproduction time series data from the above-mentioned interpolation means, or the interpolation data is arranged in time series order. A video signal recording / reproducing apparatus comprising a synthesizing unit for synthesizing and restoring a series of reproduced video signals.