JPH02254682A - Digital signal recorder - Google Patents

Abstract

PURPOSE:To record plural digital signals with bit rates to be mutually different in sharing both of a signal processing part and a mechanism part by arranging a specific symbol in the same synchronizing block at the time of recording a second digital signal with the bit rate lower than that of a first digital signal. CONSTITUTION:At the time of recording the second digital signal with the bit rate lower than that of the first digital signal, other symbols in a number corresponding to the difference in the bit rates between the first digital signal and second digital signal and the symbol related to the second digital signal are arranged in the same synchronizing block. For example, 144 symbols to add 24 symbol DUMs of dummy data to 120 symbol M-Ds of a digital MUSE signal are prepared in two sets, and c1 parities of 3 symbols are added to respective ones. Further, the ID data of 3 symbols and synchronizing data SYN of 2 symbols are added, and a synchronizing block 207 is formed. Thus, plural digital signals with the bit rates to be mutually different can be recorded by sharing both of the signal processing part and mechanism part.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital signal recording device, and more particularly to a digital signal recording device capable of recording a plurality of digital signals having mutually different bit rates.

[Prior Art] Digital signals with different bit rates obtained by sampling different information signals at different sampling frequencies are generally recorded on separate recording devices. Even if the difference is not that great, the signal processing part needs to be configured separately, even if the mechanical part can be shared.

For example, so-called high-visibility (high-definition television signal)
A digital signal whose band is compressed in order to record the baseband signal on a recording medium, and a digital signal before transmission of a transmission signal using the so-called MUSE method (hereinafter simply referred to as the MUSE signal) for the purpose of transmitting HDTV. The signals are completely different in both rate and signal format, and all digital VTRs that record these are separate devices.The existence of multiple types of VTRs is a matter of convenience for consumers. This is not a good idea considering the development cost and other factors.

In response to this, the present applicant has previously proposed an apparatus that is capable of recording a plurality of digital signals having mutually different bit rates by varying the number of video data recorded on each track.

(Refer to Japanese Patent Application No. 63-90109.) In the recording device of this proposal, for example, the same mechanical unit is used for the above-mentioned digital signal obtained by band-compressing the high-definition baseband signal and the digital signal before transmission of the MUSE signal. and can be processed using a signal processing unit.

[Problems to be Solved by the Invention] The recording device proposed above has the extremely great effect of being able to record digital signals of different bit rates with the same device, as described above, and is particularly suitable for handling various digital signals. However, when recording a plurality of specified digital signals, the following problems arise that need to be improved in order to facilitate data handling.

This problem will be explained below by taking as an example a digital VTR that can record two types of digital video signals.

Generally, in a digital VTR, video and audio signals are divided into a predetermined number of symbols, and together with error correction codes and various identification codes (hereinafter referred to as IDs) to correct code errors that occur in the magnetic recording and reproducing system. Synchronization data (hereinafter referred to as 5YNC) consisting of a predetermined number of symbols for reconstructing data during reproduction is added to form a synchronization block, and this synchronization block is recorded as one unit on the magnetic tape.

Incidentally, in order to facilitate the handling of data in the reproduction system, this synchronization block is configured to include video data whose number of symbols is an integer ratio to the number of symbols corresponding to data for one scanning line of a video signal, for example. Often.

However, it is extremely rare for the cut rates of multiple types of digital video signals to be an integer ratio, and if it were attempted to be an integer ratio, this would impose restrictions on the form of the digital signal itself, which is not preferable.

When recording two types of digital video signals whose bit rates are not in an integer ratio, the number of symbols in a synchronization block is determined according to the number of symbols of the video signal with a higher bit rate.

If the number of symbols in this synchronization block is set to correspond to the number of symbols for one scanning line of the video signal with a higher bit rate, then when recording the video signal with a lower bit rate, The starting position of each line of the video signal becomes random, making it difficult to reconstruct the video signal during playback, especially when performing special playback such as high-speed search.

In particular, a digital signal (hereinafter simply referred to as a baseband signal) obtained by band-compressing a high-definition baseband signal as described above and a digitized MUSE signal (
When recording a digital MtJSE signal (hereinafter referred to as a digital MtJSE signal), it is expected that the digital video signal will be a video signal with a lower bit rate, which poses many problems.

Figure 8 shows the transmission signal for one frame of the MUSE signal. It is something that

In Fig. 8 above, Y is a luminance signal obtained by converting sample values into analogs, C is a color signal, A is an audio signal that is a 3-value signal converted from an audio signal that has been digitized, and FP/VIT is a transmission path equalization signal. symbols corresponding to signals (VIT) and frame pulses containing information such as GU, guard space, CON, control signal, BL, empty data, and CP, clamp level information are arranged. The numerical values shown in FIG. 8 correspond to the number of data in the digital domain before converting the transmission signal to analog.

For more detailed structure of each symbol, please refer to 19861
The details are disclosed in Chapter 3 of ``High-Vision Technology'' edited by NHK Broadcasting Technology Research Institute, published on January 25th, so the details will be omitted here.

When the MUSE transmission signal as shown in Fig. 8 is digitized and recorded as a video signal with a lower bit rate on a digital VTR capable of recording baseband signals, the first symbol of the luminance signal of each line and the chrominance signal The leading symbol etc. will be randomly placed in the recorded synchronization block, and it is particularly troublesome to reconstruct the line in which the luminance signal and color signal exist together using the reproduction system. Furthermore, there are lines in which both an audio signal and a color signal exist, and extremely complicated processing is required to reconstruct the audio signal as well.

The present invention has been made in view of the above-mentioned problems, and is capable of recording a plurality of digital signals having mutually different bit rates by sharing a signal processing section and a mechanism section, and is capable of recording a plurality of specified types of digital signals. It is an object of the present invention to provide a digital signal recording device that facilitates data handling even when recording, and in particular, facilitates data reconstruction in a reproduction system.

[Means for Solving the Problems] In order to achieve this objective, the digital signal recording device of the present invention has a first digital signal and a second digital signal whose bit rate is lower than that of the first digital signal. A device for selectively recording a signal includes a synchronization adding circuit that adds synchronization data to every predetermined number of symbols to form a synchronization block, and a recording means that records a digital signal on a recording medium in units of the synchronization block. and when recording the second digital signal, a number of other symbols corresponding to the difference in bit rate between the first digital signal and the second digital signal, and a symbol related to the second digital signal. are arranged in the same synchronous block.

[Operation] By configuring as described above, the number of other symbols corresponding to the difference in bit rate and the symbol related to the second digital signal are arranged in the same synchronization block. By appropriately setting the number of symbols, digital signals of any bit rate can be recorded. Further, symbols related to the second digital signal can also be arranged in each synchronization block in a manner corresponding to the format of the original digital signal, and data can be easily reconstructed in the reproduction system.

[Embodiment] An embodiment of the present invention will be described below, taking as an example a digital VTR capable of recording a baseband signal and a digital MUSE signal.

FIG. 1 is a block diagram showing the configuration of a recording system of a digital VTR as an embodiment of the present invention. In FIG. A terminal to which the signal pb and the color difference signal Pr are input, 8
9 is a terminal to which an audio signal accompanying the baseband signal is input, and 9 is a terminal to which a MUSE signal MUSE is input.

(Baseband signal recording) First, recording of baseband signals will be explained.

Terminal 34 is connected to the baseband signal recording mode or M.
A mode signal MODE designating whether to record the USE signal is input, and when recording a baseband signal, the switch 10.36 is connected to the B terminal by this signal MODE. At this time, the brightness signal Y is
0 to the A/D converter 12, where the signal is converted into an 8-bit digital signal.

The sampling frequency f at this A/D converter 12
If s is 44.55MH2, the number of effective pixels per line is 1152, and the bit rate is 356.4M.
bps. At such a high bit rate, VTR
When recording on a computer, it is impossible to record for a long time, and the data processing speed becomes too fast.
The digital luminance signal from the A/D converter 12 is supplied to a band compressor 14, where the band is compressed. As this band compressor 14, a sub-sampling circuit, a well-known high-efficiency encoding circuit, etc. can be applied, but in this embodiment, the number of pixels is determined by sub-sampling, and furthermore, the 8-bit signal is subjected to predictive differential encoding (DPCM). ), the amount of information is classified into 4 bits.

The luminance signal data band-compressed by the compressor 14 is supplied to a memory circuit 16 that functions as a bit converter and a buffer, and is processed to convert two 4-bit data into one 8-bit data, and to process the color signal and audio signal described later. Processing is performed to adjust the timing. As a result, the luminance signal output from the circuit 16 is 2 times per line.
There are 88 symbols.

On the other hand, the color difference signals Pb and Pr input from the terminals 4.6 are each digitized into 8 bits by the A/D converter 20.26 at a sampling frequency of 22.275 MH2.
Like the luminance signal, it is fed to a band compressor 22.28.

Assuming that these band compressors 22 and 28 also use subsampling to increase the number of pixels, and further convert the 8-bit signal to 4 bits using DPCM, 8-bit data is obtained by combining these two 4-bit color difference signals Pb and Pr. is 288 symbols per line, which is equal to that of the luminance signal.

Furthermore, the audio signal input from the terminal 8 is sampled at 51.84 KHz by the A/D converter 30 and converted into 16
The data is converted into bit data, and the buffer 32 converts it into 8 bit data. As a result, 3456 symbols of audio data are obtained per frame.

Here, the sampling clock supplied to the A/D converters 12, 20, 26, and 30 is obtained from a clock generator 42 configured with a PLL or the like by manually inputting a synchronizing signal 5YNC separated from an analog high-definition signal. The middle clock a is a 22.275MH2 clock, the clock b is a 44.55MH2 clock, and the clock e is a 51.84MH2 clock.
This is the clock of KH.

Here, the format in which the digital data including the luminance signal, color signal, and audio signal described above is recorded in the subsequent circuit will be explained with reference to FIGS. 3 and 4.

FIG. 3 is a diagram showing the data structure for one track in the digital VTR of this embodiment. In the figure, Y2O1 is a luminance signal symbol, Pb and Pr2O3 are color difference signal symbols, and A
are audio signal symbols.As shown in the figure, three C1 parity symbols are added to each of the 144 compressed luminance signal symbols and 144 compressed color difference signal symbols for 4 lines. Furthermore, an ID data symbol 20 indicating the position of these data on the screen
Three symbols 206 of synchronization data 5YNC and two symbols 206 of synchronization data 5YNC are added to form one synchronization block 207.

Incidentally, in the VTR of this embodiment, it is assumed that information for one frame obtained by the above-described processing is divided into 12 tracks and recorded. This means that if we assume a VTR in which a tape is wound around a rotating head cylinder over an angular range of 180 degrees or more and the signals of each channel are recorded alternately with two heads, the rotational speed of the rotating head cylinder will be 360 degrees r. This can be realized by setting p, m, binding, and the number of recording channels to three.

The BTA studio standard stipulates that the number of effective lines in one frame is 1035, but considering that 1 frame's worth of information obtained through the processing described above is recorded on 12 tracks, the number of effective lines is set at 1044. (87X
12) A further 84 lines are prepared for audio signals, subcode signals, etc. With this, 1
The number of lines of information signals per frame, that is, the number of synchronization blocks is 1128 (87X12), and the number of synchronization blocks per track is synchronization blocks (1) to (1) in Fig. 3.
88), resulting in 188 pieces. Incidentally, since the aforementioned audio signal has 288 symbols per track, according to the aforementioned data format, audio signals of up to 7 channels can be recorded.

Further, in the data matrix of each track shown in FIG. 3, four parities of 02 parities are added in the vertical direction. That is, the data at the same position in the odd-numbered synchronous blocks and the data at the same position in the even-numbered synchronous blocks in the figure are extracted and 4 parities are added to each. As a result, a synchronization block consisting of only eight error correction codes in total is added to the data of each track.

FIG. 4 is a diagram showing the recording format of the tracks actually recorded on the tape in the VTR of this embodiment, and shows the pilot signal for tracking control of the data recording area 214 according to the data matrix shown in FIG. Recording area (ATF) 211, clock area (CRI)
) 213 and a gap space (IBG) 212 are provided. The size of each of these areas corresponds to a recording area for one synchronous block of data, and corresponds to an area for a total of four synchronous blocks.

The shortest recording wavelength of the VTR of this embodiment which records according to the above-mentioned format is 0.53 μm when recording on an inch-sized tape, which is a value that can be easily achieved at present.

Here, the explanation will be given again by returning to FIG. The switch 18 is a data selector that selectively outputs the above-mentioned luminance signal, color difference signal, and audio signal, and these signals are sent to the buffer 1.
6, 24, and 32 at predetermined timings that do not overlap. The data selector 36 outputs the output of the selector 18 and writes it into the RAM (random access memory) 38 via the selector 60. At this time, RAM38
The write address of is 44°55 via switch 44.
MH, is determined by a write address generator 46 supplied with a clock d having a frequency that is an integer multiple of MH.

FIG. 6 is a diagram showing the arrangement of baseband signals in the RAM 38, where 1, 2, . . . 576 are horizontal addresses corresponding to horizontal symbol numbers, 1° 2, . . . 1044, .
...1128 is a vertical address corresponding to the line number, and each address has a capacity of 8 bits. That is, two pixels of the luminance signal and two pixels of the two types of color difference signals correspond to one address. Also,
The video signal is 1 to 1044 of the vertical address.
Audio signals and subcodes are stored in the portions 045 to 1128.

Next, reading from the RAM 38 will be explained. At the timing of reading, the data selector 48 selects the output of the read address generator 50. This read address generator 50 operates according to a clock of a predetermined frequency corresponding to the recording bit rate from an oscillator 52.

Accordingly, data for three tracks is read from the RAM 38 every half rotation of the aforementioned rotary cylinder, and the read data is sent to three-channel ECC (error correction code) encoders 54-1, 54-2, . 54-3. ECC encoder 54-1.54-2.54-3
The output of the synchronization and ID data addition circuit 56-1.56-
256-3, and after the above-mentioned synchronization data and ID data are added, the modulator 54-154-2.54-3
is digitally modulated. The modulated three-channel signals are further amplified to a predetermined level by recording amplifiers 60-1.60-2.60-3, and sent to terminals 62-1.62-2.
The signal is supplied to a three-channel recording system (not shown) via the cable 62-3 and recorded on a magnetic tape.

(Recording of MUSE signal) Next, recording of the MUSE signal will be explained.

In the recording mode of the MUSE signal, the mode signal MOD
Due to E, switch 10.44 and data selector 36 all output M side signals, and MU input to terminal 9
The SE signal is supplied to A/D converter 12. The MUSE signal is an 8-bit signal sampled at 16.2MH as a digital signal before transmission.
It is converted to 8 bits by a clock C of 16.2 MH from . This results in a digital MLJSE signal with 480 symbols per line.

This digital MUSE signal is sent directly to the data selector 3.
6.66 and is supplied to the RAM 38. At this time, the write address generator 46 is supplied with the sampling clock C of the MUSE signal.

FIG. 7 is a diagram showing the arrangement of the MUSE signal in the RAM 38. As shown in the figure, the vertical addresses are stored in the areas 1 to 1125 and the horizontal addresses 1 to 480 according to the clock C. Remaining address 1 shown in
Dummy data from a dummy data generator 64 is stored in 52 via a data selector 66. RAM3
The reading of data from 8 and the subsequent processing are exactly the same as the operations during recording of the baseband signal, so a description thereof will be omitted.

FIG. 5 shows the data structure of one track of the digital MUSE signal recorded in this manner.

In FIG. 5, MD indicates a symbol of the digital MUSE signal, and DUM indicates the above-mentioned dummy data.

As shown in the figure, two sets of 144 symbols are prepared by adding 24 symbols of dummy data to 120 symbols of the digital MUSE signal, and three symbols of C1 parity are added to each of these. Furthermore, three symbols of ID data and two symbols of synchronization data are added to obtain a synchronization block.

This causes the first 120 of the synchronization block (188) to
The symbols up to the symbol become the symbols of the digital MUSE signal, and the remaining data in the synchronization block (188) becomes dummy data. This is because the digital MUSE signal consists of 1125 lines per frame. Since one line is associated with one synchronization block, the number of synchronization blocks of the digital MUSE signal per track is (1125/8=
) 187.5. Synchronous block (189
) to (196), 02 parity is assigned as in the recording of the baseband signal.

Note that the actual recording pattern on the tape is the same as that when recording the baseband signal shown in FIG. 4.

(reproduction) Next, the operation during reproduction of this embodiment will be explained.

FIG. 2 is a diagram showing the configuration of the reproduction system of the VTR of this embodiment, and the signals of the aforementioned three channels are connected to the terminals indicated by 68-1.68-2.68-3 in the reproduction system (not shown). Three channels of reproduction signals reproduced by the section are input. This 3
The reproduction signal of the channel is reproduced by the reproduction amplifier 70-1.70-2.
．． It is amplified to a predetermined level at 70-3, and then sent to a demodulator 72-
It is digitally demodulated at 1°72-2.72-3. The processing at this time is performed by a clock generated by a PLL (not shown) in synchronization with a clock component including jitter included in the reproduced signal.

First-in-first-out memory (FIFO) 74-1.74-2 is synchronized with this jitter-containing clock.
．． The three channel signals written to 74-3 are sent to oscillator 8.
It is read out using a stable constant frequency clock starting from 0, and is made into a digital signal from which jitter has been removed. and,
The digital signals read from FIFO 74-1, 74-2, 74-3 are sent to ECC decoder 76-1゜78-2.7
After the code error occurring in the magnetic recording/reproducing system is corrected in step 6-3, the data is written into the RAM 78.

The write address to the RAM 78 is determined by the write address generator 84 in synchronization with the clock output from the oscillator 80 while referring to the ID data in the reproduced signal. At the data write timing, the data selector 90 naturally supplies the address data output from the write address generator 84 to the RAM 7B. The processing up to this point is exactly the same whether the recorded signal is a baseband signal or a digital MUSE signal. the result,
If the recorded signal is a baseband signal, data is written to the storage area of the RAM 78 as shown in FIG. 6, and if the recorded signal is a MUSE signal, data is written to the storage area of the RAM 78 as shown in FIG. Data is written as shown.

The read address generator 86 has the same frequency as the clock d of the recording system, and generates a read address in accordance with the clock d' obtained from the clock generator 82. If the recorded signal is a baseband signal, the mode signal MODE input from the terminal 95 causes the address data from the address generator 86 to be sent from the selector 90 to the R
Supply to AM78. As a result, the luminance signal, color difference signal, and audio signal of the baseband signal described above are output in a time-division manner.

Reference numeral 81 is a buffer having a bit conversion function that outputs a luminance signal consisting of two DPCM codes as a 4-bit DPCM code at a constant rate.
The digital signal is subjected to processing such as DPCM decoding and interpolation in a band expander 83, and is returned to the original 44.55 MH digital luminance signal. At this time, the D/A converter 87 receives 44.55 M)! from the clock generator 82! , and the analog luminance signal obtained thereby is sent to the output terminal 91 via the B side terminal of the switch 89.
is output from.

98 receives the two types of color difference signals mentioned above, and receives the DPCM code of the 4-bit color difference signal Pr and the 4-bit color difference signal pb.
DPCM codes and band expanders 99 and 10, respectively.
This is a buffer that has a conversion function that supplies 0 at a constant rate. In the band expanders 99 and 100, the original 8-bit color difference signals Pr and Pb are returned to 22.275.
M) Perform interpolation to become a +2 digital signal, and D/A
It is supplied to converters 101 and 102. D/A converter 101
, 102 is 22.275MH from the clock generator 82
The analog color difference signals Pr and Pb obtained thereby are output to the output terminal gears 103 and 10.
Output from 4.

Furthermore, the buffer 92 receives the aforementioned audio signal and multiplies it at a constant data rate, 51.
D/A converter 9 operating with 84KHz clock e'
After being returned to the original analog audio signal in step 4, it is output from the output terminal 96.

On the other hand, the read address generator 88 generates a read address in accordance with the clock C° obtained from the clock generator 82, which has the same frequency as the clock C of the recording system. If the recorded signal is a digital MUSE signal, the address data from the address generator 88 is sent to the selector 9.
0 to the RAM 78. As a result, the digital MUSE signal described above is output from the RAM 78 at a constant rate.

At this time, the data selector 8 is
5 outputs data on the M side, so this digital MUS
The E signal is input to the D/A converter 87. At this time, D
The /A converter 87 is operated by the clock C, and the original analog MUSE signal is output from the output terminal 93 via the M side terminal of the switch 89.

In the digital VTR configured as described above, not only can the baseband signal and digital MUSEff1 be processed by a common signal processing section, and the mechanical section can also be shared, but the data format of the digital MUSE signal itself can be Since the MUSE signal is recorded and reproduced, it is extremely easy to reconstruct the MUSE signal at the time of reproduction, and there is no need for complicated data array conversion processing that is common in this type of duplexer. Even if special playback such as high-speed search is performed, the structure of the MUSE signal can be easily performed.

In the above embodiment, all the data of the digital MtJSE signal was arranged and recorded on the same data matrix as the baseband signal, but for example, only the line containing video information in the MIJSE signal is recorded as the baseband signal. It is also possible to arrange and record on the same data matrix, and to separately demodulate the audio signal and record it in another recording area.

Further, in the above embodiment, when recording the digital MUSE signal, dummy data is recorded together with the digital MUSE signal, but it is also possible to record other information instead of this dummy data. As this information, for example, various subcodes, audio signals demodulated from the above-mentioned MUSE signal, etc. can be recorded.

Further, in the above embodiment, a high-definition baseband signal and a MUSE signal are used as examples of a plurality of digital signals having different bit rates, but the scope of application of the present invention is not limited to this, and various digital signals are used. This can be applied when signals are recorded by the same device.

[Effects of the Invention] As explained above, according to the present invention, it is possible to record a plurality of digital signals having mutually different bit rates by sharing a signal processing section and a mechanism section, and to record a plurality of digital signals having different bit rates. It has been possible to obtain a digital signal recording device which can handle data conveniently even when recording a digital signal, and in particular can easily reconstruct data in a reproduction system.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of the recording system of a digital VTR as an embodiment of the present invention, FIG. 2 is a diagram showing the configuration of the reproduction system of the digital VTR shown in FIG. 1, and FIG. Figure 4 is a diagram showing the data format when recording baseband signals in the recording system. Figure 4 is a diagram showing the recording format on tape in the recording system of Figure 1. Figure 5 is a diagram of the digital MUSE in the recording system of Figure 1. Figure 6 shows the data format of the baseband signal on the RAM in the recording system of Figure 1. Figure 7 shows the data format of the baseband signal on the RAM in the recording system of Figure 1. FIG. 8 is a diagram showing the data arrangement of the digital MUSE signal. FIG. 8 is a diagram showing the transmission signal for one frame of the digital MUSE signal. In the figure, 2 is a terminal to which the luminance signal Y of the baseband signal is input, 4.6 is a terminal to which the color difference signal pb and color difference signal Pr are also input, and 8 is a terminal to which the audio signal accompanying the baseband signal is input. Terminal, 9 is MUSE signal MUSE
is input terminal, 10 is switch, 54-1.54-
2.54-3 is ECC encoder, 56-1.56 respectively
-2.56-3 are synchronization/ID addition circuits, and 64 is a dummy data generator. /6Z Figure a

Claims (2)

[Claims] (1) A device for selectively recording a first digital signal and a second digital signal having a lower bit rate than the first digital signal, the device adding synchronization data to every predetermined number of symbols. A synchronization addition circuit that constitutes a synchronization block;
recording means for recording a digital signal on a recording medium in units of the synchronous block, and when recording the second digital signal, corresponds to a difference in bit rate between the first digital signal and the second digital signal. A digital signal recording device characterized in that a symbol other than the number and a symbol related to the second digital signal are arranged in the same synchronization block. (2) A patent characterized in that an error correction code consisting of the same number of symbols is arranged in the synchronization block when recording either the first digital signal or the second digital signal. A digital signal recording device according to claim (1).