JPH08279656A - Semiconductor light emitting device - Google Patents

Abstract

PURPOSE: To provide a semiconductor light emitting device which is so structured as not to deteriorate in optical coupling efficiency to an optical fiber due to the inclination of a projected light beam. CONSTITUTION: An edge emission-type semiconductor light emitting device is equipped with art active layer 203 in parallel with a reference surface and a light projecting surface 208 which is formed vertical to the reference surface by etching as far as a point below the active layer, wherein the upside 209 of the substrate in front of the light projecting surface 208 is so inclined as to recede farther from the active layer 203 in proportion to a distance from the light projection surface 208, an angle ψmade by the upside 209 of the substrate in front of the light projection surface 208 with the reference surface is larger than a half-value angle θ of a vertical light emission distribution. By this constitution, a light component contained in a half-value angle of light emission distribution which is most of light projected from a light projection surface is not reflected by the upside of a substrate in front of the light projection surface, so that a light emitting device of this constitution is less affected by interference, a light, beam projected from the device is less inclined to an optical fiber, and the device can be restrained from deteriorating in optical coupling efficiency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an edge emitting semiconductor light emitting device used for optical interconnection and the like.

[0002]

2. Description of the Related Art Generally, in edge emitting semiconductor light emitting devices, a cleavage plane is widely used as a light emitting surface.
Since the cleavage plane is basically a mirror that is smooth on the atomic order, it is very effective as a light emitting surface. On the other hand, however, it is difficult to perform cleavage without any damage or damage, which is a problem in terms of mass productivity and yield. Therefore, in recent years, research has been conducted to form the light emitting surface by etching without using cleavage. Since the light emitting surface can be formed by etching all the light emitting elements in the substrate at the same time, it has the characteristics of mass production and high yield not found in the cleavage method. Also, the smoothness of the exit surface is
It is becoming comparable to the cleavage plane. A conventional example of a semiconductor light emitting device having a light emitting end face by etching will be described below.

FIG. 15 is a diagram showing an example of a conventional etching mirror semiconductor laser (see Japanese Patent Application Laid-Open No. 3-30381). In the figure, reference numeral 1 is an n-type InP substrate, 2 is an n-type InP clad layer, 3 is an undope-InGaAsP active layer, 4 is a p-type InGaAsP guide layer, and 5 is a p-type InP.
Clad layer, 6 is a p-type InGaAsP contact layer, 7
Is an n-type electrode, 8 is a p-type electrode, and 9 is an etching end face (reflecting mirror). In the semiconductor laser of FIG. 15, the sum of the active layer thickness and the guide layer thickness is set to 0.3 μm, so that the decrease in the end face reflectance due to the slight inclination of the etching end face 9 is suppressed as much as possible. Further, as shown in the figure, the InP substrate 1 is projected in front of the etching end surface 9,
It can be seen that the light emitting surface and the element end surface are stepped. This is a structural feature common to semiconductor light emitting devices having a light emitting surface by etching.

Next, FIG. 16 is a diagram showing an example of an optical semiconductor device in which an optical semiconductor element is bonded to a submount (see Japanese Patent Laid-Open No. 2-137389). In the figure, reference numeral 10 is an optical semiconductor element, 11 is a submount, 12 is a stem, and 13
Is a metallized electrode, 14 is a light emitting point, and 15 is a brazing material. As pointed out in the above publication, if a barrier material such as a brazing material is present in front of the light emitting point 14, the light emitted from the light emitting point will be scattered. Even on the substrate surface in front of the etching end surface described in FIG.
Similarly to this, phenomena such as light reflection, scattering, and interference may occur.

Next, FIG. 17 is a view showing another example of a semiconductor light emitting device having a light emitting end face by etching (see Japanese Patent Laid-Open No. 5-136459). In FIG.
Reference numeral 16 is a substrate, 17 is an edge emitting light emitting diode array, 18 is a light emitting layer (active layer), 19 is a p-side electrode, and 20 is an n-side electrode. In the present invention, LX2 <LZ2 / tanθ; (LX2 ≠ LZ2 / tanθ), (0 ≦ θ ≦ 90 °) LX1 <LZ1 / tanθ; (LX1 ≠ LZ1 / tanθ), (0 ≦ θ ≦ 90 °) The substrate shape in front of the light emitting surface is formed in a stepwise manner so as to satisfy the geometrical relationship. Therefore, the light emitted from the light emitting end surface is not blocked by the terrace surface, and thus the light utilization efficiency is high.

[0006]

In the semiconductor light emitting device 101 having the structure in which the substrate surface 106 exists in front of the light emitting surface 107 as shown in FIG. 18, the light emitted from the light emitting surface 107 is the front substrate surface 106. When reflected by, the reflected light interferes with the light emitted from the light emitting surface. Therefore, the light emission direction is tilted upward by several degrees with respect to the substrate side. Such a semiconductor light emitting device 101 is used as an optical fiber 1.
When the optical fiber 103 is connected to the optical fiber 103, the optical fiber 103 has a narrow light receiving angle (for example, the total light receiving angle = 23 ° when the numerical aperture NA = 0.2). The optical coupling efficiency with is significantly reduced. The structure shown in FIG. 17 is a structure that considers reducing the influence of this interference, but in an actual semiconductor light emitting device, the light emission distribution has a skirt on the wide-angle side, so the influence of interference is reduced. It is difficult to completely eliminate it.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor light emitting device having a structure that does not cause a reduction in the optical coupling efficiency with an optical fiber due to the inclination of the light emitting direction. It is what

[0008]

In order to achieve the above object, a semiconductor light emitting device according to claim 1 of the present invention has an active layer surface parallel to a reference plane, and is perpendicular to the reference plane. An edge emitting semiconductor light emitting device having a light emitting surface formed by etching below the active layer surface, wherein the substrate upper surface in front of the light emitting end surface is inclined in a direction away from the active layer surface as it goes forward from the light emitting surface. The angle between the upper surface of the substrate in front of the light emitting surface and the reference plane is larger than the half-value half angle of the light emission distribution in the vertical direction.

According to a second aspect of the present invention, in addition to the same structure as the semiconductor light emitting device according to the first aspect, the semiconductor light emitting device has a structure in which the substrate under the light emitting surface is undercut-etched.

A semiconductor light emitting device according to a third aspect of the present invention is an edge emitting semiconductor light emitting device having a light emitting surface formed by etching to a lower side than an active layer surface, and a substrate upper surface in front of the light emitting surface is a light emitting surface. It is inclined in the direction away from the active layer surface as it goes forward from the emission surface, and the angle φ between the substrate upper surface in front of the light emission surface and the die-bonding surface of this device is φ = arcsin (λ / 4nd) It has become. Here, λ is the emission wavelength of the semiconductor light emitting device, n is the refractive index of the medium on the side where the light is emitted from the semiconductor light emitting device, and d is the perpendicular from the position of the active layer on the light emitting surface to the upper surface of the substrate in front of the light emitting surface. It represents the distance dropped.

Further, a semiconductor light emitting device according to a fourth aspect of the present invention is a mesa-shaped edge emitting semiconductor light emitting device having a light emitting surface and an etching side surface formed by etching down to a surface below an active layer surface. The upper surface of the substrate in front of the light emitting surface is inclined in a direction away from the active layer surface as it goes forward from the light emitting surface, and the angle φ formed between the upper surface of the substrate in front of the light emitting surface and the etched bottom surface of the substrate is φ = arcsin (λ / 4nd).

Further, a semiconductor light emitting device according to a fifth aspect of the present invention is an edge emitting semiconductor light emitting device having a light emitting surface formed by etching to below the active layer surface, wherein the substrate thickness is a light emitting surface. The thicker the part is, the more the angle φ between the upper surface of the substrate in front of the light emitting surface and the horizontal surface becomes φ = arcsin (λ / 4nd) when the back surface of the substrate is installed on the horizontal surface. There is.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. A semiconductor light emitting device according to claim 1 of the present invention has an active layer surface parallel to a reference plane,
It is an edge emitting semiconductor light emitting device having a light emitting surface formed by etching vertically to the reference plane and below the active layer surface. Therefore, when there is no influence of the substrate in front of the light emitting surface, the peak position of the light radiation distribution is oriented in the direction perpendicular to the light emitting surface. Furthermore, with this device,
As shown in FIG. 1A, the substrate upper surface 106 in front of the light emitting surface 107 is inclined in a direction away from the surface of the active layer 102 as it goes forward from the light emitting surface 107.
The angle between the substrate upper surface 106 in front of 07 and the reference plane is larger than the half-value half-angle of the light emission distribution. Therefore, most of the light emitted from the light emitting surface, that is, the light component within the half-value angle of the light emission distribution, is not reflected by the substrate upper surface 106 in front of the light emitting surface, and thus is not a target of interference. Further, in the conventional structure shown in FIG. 17, the terrace surface near the light emitting surface is horizontal, whereas in the present device, the terrace surface near the light emitting surface shifts toward the wide angle side as the distance from the end surface increases. As a result, even when the light having the wide-angle component of the light emission angle distribution is reflected by the substrate surface 106, the light is reflected at a lower angle with respect to the reference surface, so that the inclination in the light emission direction can be reduced. Further, it is natural that the shorter the length of the substrate in front of the light emitting surface 107, the less interference.

In the semiconductor light emitting device described in claim 2, in addition to the structure described in claim 1, the substrate under the light emitting surface 107 is undercut-etched as shown in FIG. 1B. . Therefore, even when the angle formed between the reference surface and the substrate upper surface 106 in front of the light emission surface 107 is the same, the distance from the position of the active layer 102 of the light emission surface 107 to the front substrate surface 106 is smaller than that in the device of claim 1. Get distant. Therefore, the light emitted from the light emitting surface 107 is reflected on the front side of the substrate. Therefore, if the substrate length in front of the light emitting surface is the same, the component of the light reflected by the substrate surface 106 becomes smaller.

Next, the structure and operation of the semiconductor light emitting device of the third aspect will be described. The interference condition of light on the light emitting surface of the semiconductor light emitting device is expressed by the following equation. 2ndsin θ / λ + 1/2 = m (m = 1, 2, 3, ...
・) From this, the angle φ that satisfies the interference condition when m = 1
Becomes φ = arcsin (λ / 4nd). That is, the first-order interference peak having the highest light output is emitted at an elevation angle of φ with respect to the upper surface of the substrate in front of the light emission surface. On the other hand, in the semiconductor light emitting device according to claim 3, when the back surface of the substrate of the semiconductor light emitting device 101 is die-bonded to the stem 105 with the conductive adhesive 104, as shown in FIG. Substrate top surface 106
However, the depression angle is the same as φ with respect to the die bonding surface. Therefore, the primary interference light, which is the peak light of the vertical light radiation distribution, is emitted in parallel to the die bonding surface.

A semiconductor light emitting device according to a fourth aspect of the present invention is a mesa-shaped edge emitting semiconductor light emitting device having a light emitting surface and an etching side surface which are formed by etching down to a surface below an active layer surface. The angle φ formed by the upper surface of the substrate in front of the light emitting surface and the etching bottom surface of the substrate is φ = arcsin (λ / 4nd). Such a mesa type semiconductor light emitting device 101
1D is mounted on the stem 105 by the junction down method as shown in FIG. 1D, the etching bottom surface of the substrate becomes the die bonding surface. Then, the peak light of the vertical light radiation distribution is emitted parallel to the die bonding surface, as in the device of claim 3.

The semiconductor light emitting device according to the fifth aspect is suitable for a junction-up mounting system. In the junction-up mounting, the back surface of the substrate is the surface that is bonded to the stem 105. Therefore, in the present apparatus, as shown in FIG. 1E, the substrate thickness becomes thicker as it goes away from the light emitting surface 107, and when the back surface of the substrate is installed on a horizontal stem surface, the substrate in front of the light emitting surface 107. The angle φ formed by the upper surface 106 and the horizontal plane is set so that φ = arcsin (λ / 4nd). As a result, as shown in FIG. 1E, the inclination of the light emission direction due to interference is compensated by the inclination of the substrate, and the primary interference light is emitted parallel to the bonding surface. Since the back surface of the substrate may be inclined by a predetermined angle φ when installed on a horizontal plane, it does not necessarily have to be a sloping plane, and may have a stepped shape in which the substrate thickness increases as the distance from the light emission surface increases.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the drawings. [Embodiment 1] FIG. 2 is a sectional view showing an embodiment of the semiconductor light emitting device according to the first aspect of the present invention. In FIG. 2, 201 is an n-type GaAs substrate and 202 is an n-type AlGa.
As cladding layer, 203 is an undope-GaAs active layer, 2
04 is a p-type AlGaAs cladding layer, 205 is a p-type Ga
As contact layer, 206 is an n-side electrode, and 207 is a p-side electrode. Reference numeral 208 denotes a light emitting surface formed by dry etching, and 209 denotes a substrate surface (hereinafter, this portion is referred to as a terrace) protruding in front of the light emitting surface.

3A to 3D are views showing a manufacturing process of the semiconductor light emitting device shown in FIG. Since the main part of the present invention has a shape near the end face of the device, the current constriction part is not shown. As the current confinement method, an oxide film stripe structure, a block structure using a pn reverse bias junction, or the like can be selected as appropriate according to the purpose and performance of the light emitting device.

First, as shown in FIG. 3A, n-type AlGaAs is formed on an n-type (001) GaAs substrate 201.
Clad layer 202, undope-GaAs active layer 203, p
The AlGaAs cladding layer 204 and the p-type GaAs contact layer 205 are epitaxially grown. As a means for crystal growth, metal organic vapor phase epitaxy (MOCVD) was used.

Subsequently, chemical etching is performed using the silicon nitride layer patterned by photolithography as a mask. A bromine / methanol-based anisotropic etching solution was used as the etching solution. This etching solution has a slower etching rate on the (111) plane than on the (100) plane, so that as the etching proceeds (11
1) The surface appears on the surface. Therefore, if the groove is formed in parallel with the <11-0> direction, the chemically etched shape becomes a V groove shape as shown in FIG. 3 [b]. In addition, the above 1- is a symbol used in place of the number with bar.

Next, using the resist as a mask, ECR-
RIBE (electron cyclotron resonance-reactive
n-type clad layer 202 by an ion beam etching) device.
The light emitting surface 208 is formed by performing dry etching to the bottom. According to this etching method, a smooth etching shape which is substantially perpendicular to the active layer can be obtained regardless of the crystal plane orientation (FIG. 3C). After that, the p-side electrode 207 and the n-side electrode 206 are formed, and finally the device is separated by dicing (FIG. 3D).

In the semiconductor light emitting device manufactured by the above steps, the terrace 20 manufactured by chemical etching is used.
The angle ψ formed by 9 and the principal plane of the substrate is determined by the crystal structure and is about 55 °. On the other hand, since the half-value half angle θ of the vertical light emission distribution of the semiconductor laser is typically 10 to 30 °, it is smaller than the inclination of the terrace 209. Therefore, the light component within the half-value angle of the light radiation distribution does not contribute to interference because it is not reflected on the terrace 209. Moreover, since the terrace 209 has a large inclination of 55 °, the proportion of light having an angle component larger than the half-value angle of the light radiation distribution, which is reflected by the terrace 209, is much smaller than that of the conventional structure.

FIG. 4 is a sectional view showing a state in which the semiconductor light emitting device of the first embodiment is mounted on the stem 105 by the junction up method. The light emitted from the light emitting surface 208 can be input to the optical fiber with almost no influence of reflection and interference by the terrace 209, so that the optical coupling efficiency does not decrease.

[Embodiment 2] FIG. 5 is a sectional view showing an embodiment of a semiconductor light emitting device according to a second aspect of the present invention.
The difference from the light emitting device shown in FIG.
In the vicinity of 08, the substrate 201 is undercut-etched deeper than the light emitting surface 208, and the terrace 209 starts from the deep side.

The manufacturing process of the semiconductor light emitting device shown in FIG. 5 is different from that of the device of FIG. Hereinafter, description will be given with reference to FIG. First, as shown in FIG. 6A, n-type AlGaAs is formed on an n-type (001) GaAs substrate 201.
Clad layer 202, undope-GaAs active layer 203, p
Type AlGaAs cladding layer 204 and p type GaAs contact layer 205 are sequentially epitaxially grown by MOCVD.

Then, using the resist patterned by photolithography as a mask, ECR is performed.
With the -RIBE device, dry etching is performed to the bottom of the n-type cladding layer 202 to form a vertical light emitting surface 208 (FIG. 6B). At this time, the stripe groove is <11 ￣
It is formed in the 0> direction.

Next, after the light emitting surface 208 is covered with a silicon nitride layer, chemical etching is performed with a bromine / methanol based anisotropic etching solution. <11 ￣ in the stripe groove
Since it is formed in the 0> direction, the chemically etched shape becomes an oblique terrace 209 as shown in FIG. 6C.
Further, in this method, due to the nature of chemical etching, under etching is performed to the rear of the light emitting surface. afterwards,
The silicon nitride layer is removed to remove the p-side electrode 207 and the n-side electrode 20.
6 is formed, and finally the elements are separated by dicing (FIG. 6 [d]).

In the semiconductor light emitting device manufactured by the above steps, the terrace 20 manufactured by chemical etching is used.
The angle ψ formed by 9 and the principal plane of the substrate is about 55 °, which is generally larger than the half-value half angle θ of the vertical optical radiation distribution of the semiconductor laser. Therefore, the light component within the half-value angle of the light radiation distribution does not contribute to interference because it is not reflected on the terrace 209. Further, since the terrace 209 is located behind the light emitting surface 208, the distance from the light emitting surface position of the active layer 203 to the terrace surface becomes long, and light having an angle component larger than the half-value angle of the light emission distribution is terraced. The ratio of light reflected by 209 is smaller than that of the light emitting device of FIG.

FIG. 19 is an example of a vertical light emission angle distribution of a semiconductor light emitting device, and [a] is a light emission angle distribution of a semiconductor light emitting device having an end face formed by dry etching and having a horizontal terrace. , [B] is a light emission angle distribution of the semiconductor light emitting device shown in the second embodiment. With a horizontal terrace, the peak position of the light emission angle distribution is about 1 on the positive side.
It is tilted 0 degrees. On the other hand, when the terrace is formed by chemical etching, there is almost no influence of the reflection of light on the terrace surface, interference does not occur, and light is emitted parallel to the reference plane.

FIG. 7 is a sectional view showing a state in which the semiconductor light emitting device of the second embodiment is mounted on the stem 105 by the junction down method. Even in the junction down method, the light emitted from the light emitting surface 208 is input to the optical fiber without being affected by the reflection and interference on the terrace 209 as in the first embodiment.

[Embodiment 3] FIG. 8 is a sectional view showing an embodiment of a semiconductor light emitting device according to a third aspect of the present invention. FIG.
801 is a p-type GaAs substrate and 204 is a p-type A
lGaAs clad layer, 203 an undope-GaAs active layer, 202 an n-type AlGaAs clad layer, and 802 n.
The type GaAs contact layers 206 and 207 are n-side and p-side electrodes for injecting current into the device, respectively. In the present embodiment, unlike the first and second embodiments, the p-type substrate is used, so the stacking order of the p-type layer and the n-type layer is reversed. Reference numeral 208 is a light emitting surface formed by dry etching, and 209 is a terrace projecting forward from the light emitting surface. The terrace 209 is inclined at a predetermined angle φ with respect to the principal plane of the substrate.

Next, a method of manufacturing the semiconductor light emitting device shown in FIG. 8 will be described with reference to FIG. First, FIG. 9 [a]
MOCVD on the p-type GaAs substrate 801 as shown in FIG.
The p-type AlGaAs cladding layer 204, undope-
GaAs active layer 203, n-type AlGaAs cladding layer 2
02, n-type GaAs contact layer 802 is sequentially epitaxially grown.

Next, ECR-RIB is performed using a Cr mask.
Diagonal dry etching is performed by the E device (see FIG. 9).
[B]). At this time, by adjusting the angle between the ion beam and the substrate, the angle φ between the main plane of the substrate and the obliquely etched slope is set to a predetermined value, φ = arcsin (λ / 4nd). Where λ is the emission wavelength of the semiconductor light emitting device,
n is the refractive index of the medium on the side where light is emitted from the semiconductor light emitting device, and d is the distance from the position of the active layer on the light emitting surface to the terrace.

Then, by ECR-RIBE, p-type A
A light emitting surface 208 is formed by performing vertical dry etching vertically under the 1GaAs clad layer 204 (FIG. 9).
[C]). At this time, the etching depth t needs to be controlled so that t = d / cosφ. Further, since the etching rate is uniform in the surface of the substrate, the slope formed in FIG. 9B shifts to the lower side of the substrate by the depth t while keeping the angle. After that, the n-side electrode 206 and the p-side electrode 20
7 is formed, and the element is cut out by dicing (FIG. 9 [d]).

When the etching depth t is set to t = d / cosφ, the first-order interference condition between the light emitted from the light emitting surface 208 and the light reflected on the terrace 209 is 2ndsinθ / λ = 1/2 Becomes Therefore, the primary interference light is output in the angular direction of φ = arcsin (λ / 4nd) with respect to the terrace 209 which is the reflecting surface. For example, setting d = 2 μm,
When the emission wavelength of 870 nm of GaAs is emitted to air (n = 1), φ = 6.2 °. When light is emitted to the optical resin (n = 1.46), φ = 4.
It becomes 3 °. In this device, since the inclination of the terrace 209 is set to be the same angle as φ with respect to the principal plane of the substrate, the primary interference light having the maximum intensity of the vertical light emission distribution is the principal plane of the substrate. Is emitted in parallel with. Therefore, when the light emitting device is mounted on the stem 105 by the junction down or junction up method as shown in FIG. 1C, the peak light of the light emission distribution can be emitted parallel to the die bonding surface. It is possible to effectively input light into the optical fiber without lowering the optical coupling efficiency.

FIG. 20 is a diagram showing the light intensity input to the optical fiber when the tilt angle of the terrace 209 is changed. The light intensity is standardized with a value of 1 when the tilt angle is 0. As shown in the figure, when the inclination angle of the terrace 209 is the same as φ (in this case, φ = 8 degrees), the optical output input to the optical fiber is the largest, and when the inclination angle is 0, The light output is increased by about 35%.

[Fourth Embodiment] FIG. 10 shows the fourth embodiment of the present invention.
It is a perspective view which shows the Example of the described semiconductor light-emitting device. In FIG. 10, 801 is a p-type GaAs substrate, and 204 is p-type.
Type AlGaAs cladding layer, 203 is undope-GaAs
An active layer, 202 is an n-type AlGaAs cladding layer, 802
Is an n-type GaAs contact layer. As shown in the figure,
This device is a mesa type light emitting device in which a light emitting portion is formed in a mesa shape by dry etching. Reference numeral 208 denotes a light emitting surface formed by dry etching, and 1001 denotes a dry etched bottom surface of the substrate. Further, 1002 is a silicon oxide layer for confining a current only in the mesa portion, and 206 and 207 are n-side and p-side electrodes for injecting a current into the device, respectively. A terrace 209 projects forward from the light emitting surface, and is inclined at a predetermined angle φ and φ = arcsin (λ / 4nd) with respect to the etching bottom surface.

When the etching depth t is set to t = d / cosφ, the primary interference light between the light emitted from the light emitting surface 208 and the light reflected on the terrace 209 is reflected on the terrace 209 which is a reflecting surface. On the other hand, it is output in the direction of φ = arcsin (λ / 4nd). In this apparatus, the inclination of the terrace 209 is set to be the same angle as φ with respect to the etching bottom surface 1001 of the substrate. As a result, the first-order interference light, which has the maximum intensity of the vertical light radiation distribution, is emitted from the etching bottom surface 100 of the substrate.
It is emitted in parallel with 1.

FIG. 11 is a diagram showing a state in which the semiconductor light emitting device of FIG. 10 is mounted on a silicon (Si) V-groove substrate. FIG. 11A is a side sectional view, and FIG. 11B is a front sectional view. It is a figure. In the figure, 203 is a GaAs active layer, 103
Is an optical fiber, 104 is a conductive adhesive, 1102 is S
The i substrate 1101 is the upper surface of the Si substrate. In the semiconductor light emitting device of the present embodiment, the etching bottom surface 1001 is bonded to the upper surface 1101 of the Si substrate through the conductive adhesive 104 by the junction down method. Further, the mesa type light emitting portion is fixed so as to be located in the V groove of the Si substrate 1102. Here, the optical fiber 103 is also Si
When mounted in the V groove of the substrate 1102, the optical fiber 1
03 and the light emitting device can be easily aligned. Then, the peak light of the vertical light emission distribution emitted from the light emitting device becomes parallel to the optical fiber, so that the reduction of the optical coupling efficiency is suppressed.

[Embodiment 5] FIG. 12 shows a fifth embodiment of the present invention.
It is a side sectional view showing an example of a semiconductor light-emitting device described. In FIG. 12, 1201 is a semi-insulating GaAs substrate, 205 is a p-type GaAs contact layer, 204 is a p-type AlGaAs clad layer, 203 is an undope-GaAs active layer, 202 is an n-type AlGaAs clad layer, and 802 is an n-type GaAs contact. Layer, 206 is n-side electrode, 207
Is a p-side electrode. In this embodiment, unlike the third and fourth embodiments, a semi-insulating substrate is used, and both the p-side and n-side electrodes 206 and 207 are formed on the surface of the substrate 1201. Reference numeral 1002 denotes a silicon oxide layer, which plays a role of current confinement to the light emitting portion and a role of insulating the n-side electrode and the p-side electrode. Further, 208 is a light emitting surface formed by dry etching, and 209 is a terrace protruding in front of the light emitting surface. The terrace surface is formed parallel to the main plane of the substrate. The feature of this device is that the substrate back surface on the light emitting surface side is etched,
The point is that the 201 has a stepped shape 1202 in which the thickness is reduced.

FIG. 13 is a diagram showing a manufacturing process of the semiconductor light emitting device shown in FIG. The manufacturing process will be described below with reference to this drawing. First, as shown in FIG. 13A, p-type GaAs is formed on the semi-insulating GaAs substrate 1201.
Contact layer 205, p-type AlGaAs cladding layer 20
4, undope-GaAs active layer 203, n-type AlGaAs
The cladding layer 202 and the n-type GaAs contact layer 802 are epitaxially grown in order by MOCVD.

Next, using the resist as a mask, ECR-R
Dry etching is vertically performed by an IBE device to form a light emitting surface 208 (FIG. 13B). At this time,
The etching depth d is controlled so that the etched bottom surface becomes the p-type contact layer 205.

Subsequently, the silicon oxide layer 1002 is patterned to form an n-side electrode 206 and a p-side electrode 207 (FIG. 13C). The p-side electrode 207 is a p-type contact layer 205 whose surface is exposed by dry etching.
Form on top. Then, the back surface of the substrate on the light emitting surface side is chemically etched to form a step shape 1202 (FIG. 13).
[D]). Here, as shown in FIG. 12, when the etching depth of the light emitting device is h and the etching width is L, they are formed to have the following relationship. h / L = tanφ φ = arcsin (λ / 4nd) And finally, the element is cut out by dicing.

When the dry etching depth is d, the primary interference light between the light emitted from the light emitting surface 208 and the light reflected by the terrace 209 is output in the direction of elevation angle φ = arcsin (λ / 4nd). To be done. On the other hand, in this device, the back surface of the substrate has a staircase shape 12
02, the etching depth h and the etching width L.
Was designed and manufactured so that h / L = tan φ. Therefore, when the back surface of the substrate is placed on the horizontal plane, the substrate is inclined by the depression angle φ with respect to the horizontal plane. As a result, the first-order interference light having the maximum intensity of the light radiation distribution is emitted parallel to the horizontal plane.

FIG. 14 is a view showing a state in which the semiconductor light emitting device shown in FIG. 12 is mounted on the stem 105. In the figure, 103 is an optical fiber, 105 is a stem, 1
401 is an adhesive. Here, FIG.
The second light emitting device is mounted by a junction up method. Since all the electrodes are taken out from the surface, adhesive 1
401 need not be conductive. As shown in the figure, the primary interference light emitted from the semiconductor light emitting device is output parallel to the upper surface of the stem and can be made incident perpendicularly to the end face of the optical fiber 103. Therefore, it is possible to suppress a decrease in optical coupling efficiency.

[0047]

Since the present invention is constructed as described above, it has the following effects. In the semiconductor light emitting device according to claims 1 and 2, since the angle formed by the reference plane with the substrate upper surface in front of the light emission surface is larger than the half-value half angle of the light emission distribution, the light emitted from the light emission surface is Most of the light components within the half-value angle of the light emission distribution are not reflected by the upper surface of the substrate in front of the light emission surface and do not contribute to interference. Further, even when light having a wide-angle component of the light emission angle distribution is reflected by the surface of the substrate, it is reflected at a lower angle with respect to the reference surface, so that the influence of the inclination in the light emission direction can be further reduced. This makes it possible to reduce the inclination of the emitted light with respect to the optical fiber, and thus to suppress the decrease in optical coupling efficiency.

In particular, in the semiconductor light emitting device according to the second aspect, since the distance from the position of the active layer on the light emitting surface to the front substrate surface is long, the component of the light reflected on the substrate surface is smaller. Moreover, the influence of interference can be further reduced.

In the semiconductor light emitting device according to the third, fourth, and fifth aspects, the angle φ formed by the upper surface of the substrate in front of the light emitting surface and the surface for die-bonding the device is φ = arcsin (λ / 4nd).
Therefore, the inclination of the light emitting direction due to the interference is compensated, and the primary interference light having the highest light output is emitted in parallel to the die bonding surface. As a result, the inclination of the light emitting direction with respect to the optical fiber is eliminated, and the decrease in optical coupling efficiency can be suppressed.

Further, the semiconductor light emitting device according to a fourth aspect is a mesa-shaped edge emitting semiconductor light emitting device, and an angle formed between the substrate upper surface in front of the light emitting surface and the etching bottom surface of the substrate is:
Since φ = arcsin (λ / 4nd) is set, it is suitable for junction down mounting in which die bonding is performed on the etching bottom surface of the substrate.

Further, in the semiconductor light emitting device according to the fifth aspect, the substrate thickness increases as the distance from the light emitting surface increases.
When the back surface of the substrate is installed on a horizontal plane, the angle formed by the horizontal plane with the upper surface of the substrate in front of the light emitting surface is set to φ = arcsin (λ / 4nd), which is suitable for junction-up mounting.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the operation and action of a semiconductor light emitting device according to the present invention.

FIG. 2 is a sectional view of a semiconductor light emitting device according to a first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a manufacturing process of the semiconductor light emitting device according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a mounted state of the semiconductor light emitting device according to the first embodiment of the present invention.

FIG. 5 is a sectional view of a semiconductor light emitting device according to a second embodiment of the present invention.

FIG. 6 is an explanatory diagram of a manufacturing process of a semiconductor light emitting device according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a state in which the semiconductor light emitting device according to the second embodiment of the present invention is mounted.

FIG. 8 is a sectional view of a semiconductor light emitting device according to a third embodiment of the present invention.

FIG. 9 is an explanatory diagram of the manufacturing process of the semiconductor light emitting device according to the third embodiment of the present invention.

FIG. 10 is a perspective view of a semiconductor light emitting device according to a fourth embodiment of the present invention.

FIG. 11 is a diagram showing a mounted state of the semiconductor light emitting device according to the fourth embodiment of the present invention.

FIG. 12 is a sectional view of a semiconductor light emitting device according to a fifth embodiment of the present invention.

FIG. 13 is an explanatory diagram of the manufacturing process of the semiconductor light emitting device according to the fifth embodiment of the present invention.

FIG. 14 is a diagram showing a mounted state of a semiconductor light emitting device according to a fifth embodiment of the present invention.

FIG. 15 is a sectional view showing an example of a conventional etching mirror semiconductor laser.

FIG. 16 is a diagram showing a state in which a conventional semiconductor light emitting device is mounted.

FIG. 17 is a cross-sectional view of a conventional etched edge emitting light emitting diode.

FIG. 18 is an explanatory diagram of a problem of a conventional edge emitting semiconductor light emitting device.

FIG. 19 is a diagram showing an example of a vertical light emission angle distribution of a semiconductor light emitting device, in which [a] is a light emission angle distribution of a semiconductor light emitting device having a horizontal terrace with end faces formed by dry etching. , [B] is a light emission angle distribution of the semiconductor light emitting device shown in the second embodiment.

FIG. 20 is a diagram showing the light intensity input to the optical fiber when the tilt angle of the terrace of the semiconductor light emitting device is changed.

[Description of Reference Signs] 1: n-type InP substrate 2: n-type InP clad layer 3: undope-InGaAsP active layer 4: p-type InGaAsP guide layer 5: p-type InP clad layer 6: p-type InGaAsP contact layer 7: n-type Electrode 8: P-type electrode 9: Etching mirror 10: Semiconductor light emitting element 11: Submount 12: Stem 13: Metallized electrode 14: Light emitting point 15: Brazing material 16: Substrate 17: Edge emitting diode array 18: Light emitting layer 19 : P-side electrode 20: n-side electrode 101: semiconductor light emitting device 102: active layer 103: optical fiber 104: conductive adhesive 105: stem 106: substrate surface 107: light emission surface 201: n-type GaAs substrate 202: n-type AlGaAs Cladding layer 203: undope-GaAs active layer 204: p-type AlGaAs cladding layer 205: p GaAs contact layer 206: n-side electrode 207: p-side electrode 208: light emission surface 209: terrace (substrate surface in front of light emission surface) 801: p-type GaAs substrate 802: n-type GaAs contact layer 1001: etching bottom surface 1002: oxidation Silicon layer 1101: Si substrate top surface 1102: V-groove formed Si substrate 1201: Semi-insulating GaAs substrate 1202: Step-shaped substrate back surface 1401: Adhesive

Claims (5)

[Claims] 1. An active layer surface parallel to a reference plane,
In an edge emitting semiconductor light emitting device having a light emitting surface formed by etching vertically to the reference plane and below the active layer surface, an active layer surface is formed as a substrate upper surface in front of the light emitting surface advances in front of the light emitting surface. A semiconductor light emitting device, which is inclined in a direction further away from the light emitting surface, and an angle formed by the substrate upper surface in front of the light emitting surface and the reference plane is larger than a half-value half angle of a light emission distribution in the vertical direction. 2. An active layer surface parallel to a reference plane,
In an edge emitting semiconductor light emitting device having a light emitting surface formed by etching vertically to the reference plane and below the active layer surface, an active layer surface is formed as a substrate upper surface in front of the light emitting surface advances in front of the light emitting surface. The angle between the upper surface of the substrate in front of the light emitting surface and the reference plane is larger than the half-value half-angle of the light emission distribution in the vertical direction, and the substrate under the light emitting surface is undercut-etched. A characteristic semiconductor light emitting device. 3. An edge-emitting semiconductor light emitting device having a light emitting surface formed by etching below the surface of the active layer, wherein a substrate upper surface in front of the light emitting surface is separated from the surface of the active layer as it goes forward of the light emitting surface. The angle φ formed by the upper surface of the substrate in front of the light emitting surface and the surface to be die-bonded of this device is φ = arcsin (λ / 4nd), where λ is the emission wavelength of the semiconductor light emitting device. n: Refractive index of the medium on the side where light is emitted from the semiconductor light emitting device. d: The distance from the position of the active layer on the light emitting surface to the vertical line on the upper surface of the substrate in front of the light emitting surface. A semiconductor light emitting device characterized in that 4. In a mesa-shaped edge-emitting semiconductor light emitting device having a light emitting surface and an etching side surface formed by etching down to a surface below an active layer surface, a substrate upper surface in front of the light emitting surface advances in front of the light emitting surface. The angle φ formed by the upper surface of the substrate in front of the light emitting surface and the etching bottom surface of the substrate.
Φ = arcsin (λ / 4nd) where λ: emission wavelength of the semiconductor light emitting device. n: Refractive index of the medium on the side where light is emitted from the semiconductor light emitting device. d: The distance from the position of the active layer on the light emitting surface to the vertical line on the upper surface of the substrate in front of the light emitting surface. A semiconductor light emitting device characterized in that 5. In an edge-emitting semiconductor light emitting device having a light emitting surface formed by etching below the surface of an active layer, the substrate thickness increases as it goes away from the light emitting surface.
When the rear surface of the substrate is placed on a horizontal plane, the angle φ formed by the upper surface of the substrate in front of the light emitting surface and the horizontal plane is φ = arcsin (λ / 4nd), where λ is the emission wavelength of the semiconductor light emitting device. n: Refractive index of the medium on the side where light is emitted from the semiconductor light emitting device. d: The distance from the position of the active layer on the light emitting surface to the vertical line on the upper surface of the substrate in front of the light emitting surface. A semiconductor light-emitting device characterized in that