JPH08275026A - Adaptive synchronizing separator circuit - Google Patents

Abstract

PURPOSE: To attain a stable synchronizing separation even in the case of non- signal in a television receiver especially in the synchronizing separator circuit. CONSTITUTION: This adaptive synchronizing separator circuit is constituted of a clamp circuit 1, an A/D converter 2, a low pass filter 3, a minimum detection circuit 4, a pedestal detection circuit 5, a synchronizing separator circuit 6, a synchronizing signal detection circuit 7, a clamp mode changeover circuit 8, an intermediate slice level generating circuit 9, and a slice level changeover circuit 10. An output signal of the intermediate slice level generating circuit 9 is selected in the existence of a signal and a fixed level is selected at non- signal as a slice level of the synchronizing separator circuit 6 to make the circuit stable at the non-signal and to make the slice level accurate in the existence of the signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an adaptive sync separation circuit for a television receiver.

[0002]

2. Description of the Related Art In recent years, television receivers have also been digitized, and video synchronization signal processing has also been digitized. In such a digital video synchronization signal processing circuit,
The composite video signal is digitally encoded by one A / D converter, and the demodulation and the sync separation processing of the video signal are all performed by digital signal processing.

An example of a conventional digital sync separation circuit will be described with reference to the drawings. FIG. 4 is a block diagram of a conventional digital sync separation circuit. In FIG. 4, reference numeral 1 is a clamp circuit that inputs a composite video signal and clamps the video signal at a specified level. An A / D converter 2 receives the output of the clamp circuit and converts it into a digital code. Reference numeral 3 is a low-pass filter that receives the output of the A / D converter 2 and removes high frequency components. Reference numeral 4 is a minimum detection circuit which receives the output of the low-pass filter 3 and obtains the minimum value of the input video signal or noise signal. A pedestal detection circuit 5 receives the output of the low-pass filter 3 and obtains a pedestal level. 6
Is a sync separation circuit for performing sync separation by inputting the output of the low-pass filter 3 and slicing the sync signal by slice level input. Reference numeral 7 is a sync signal detection circuit that receives the output of the sync separation circuit 6 and detects the presence or absence of a sync signal. Reference numeral 8 inputs the output of the synchronization signal detection circuit 7, and when there is a synchronization signal, selects the output of the pedestal detection circuit 5 to clamp the pedestal portion to a specified value,
When there is no synchronizing signal, the clamp mode switching circuit controls the clamp signal of the clamp circuit by selecting the output of the minimum detection circuit 4 and switching the minimum value to clamp it to a specified value. Reference numeral 9 denotes an intermediate slice level generation circuit for inputting the output of the pedestal detection circuit 5 and the output of the minimum detection circuit 4 to generate an intermediate level and setting the slice level of the sync separation circuit 6.

[0004]

In such a sync separation circuit, since the slice level of the sync separation circuit 6 tries to slice at an intermediate level between the minimum level and the pedestal level, there is no signal. When a noise signal is input, the operation becomes too sensitive and there is no signal, the synchronization signal is not stable, and there is a drawback that the screen shakes greatly.

[0005]

According to the present invention, in order to solve such a problem, in an adaptive sync separation circuit according to claim 1, a clamp circuit for inputting a video signal and performing clamping by a clamp signal, and the clamp circuit. An A / D converter for inputting the output of the above and converting it into a digital code;
A low-pass filter that inputs the output of the D / D converter and removes high-frequency components, a minimum detection circuit that inputs the output of the low-pass filter to obtain a minimum value, and a pedestal detection circuit that inputs the output of the low-pass filter to obtain a pedestal level And a sync separation circuit for performing sync separation by inputting the output of the low-pass filter and slicing the sync signal by slice level input, and a sync signal detecting circuit for inputting the output of the sync separation circuit and detecting the presence or absence of the sync signal. The output of the sync signal detection circuit is input, the output of the pedestal detection circuit is selected when there is a sync signal, and the output of the minimum detection circuit is switched when there is no sync signal so that the clamp circuit clamps. A clamp mode switching circuit for controlling a signal, an output of the pedestal detection circuit and the When an output of the mum detection circuit is input and an intermediate slice level generation circuit that generates an intermediate level and an output of the intermediate slice level generation circuit and a specified value are input and the synchronization detection circuit outputs a sync signal, Is a slice level switching circuit connected to select the output of the intermediate slice level generator and to select a specified value when there is no sync signal, and to set the slice level of the sync separation circuit with the output. Have a configuration.

[0006]

According to the present invention, the slice level having a fixed value is selected when there is no signal, stable sync signal detection is performed, and the slice operation is performed at an intermediate level between the pedestal level and the minimum value when a video signal is input. It is possible to configure an adaptive sync separation circuit.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing the configuration of the invention according to claim 1 of the present invention. In FIG. 1, reference numeral 1 is a clamp circuit for inputting a composite video signal and clamping the video signal at a prescribed level. An A / D converter 2 receives the output of the clamp circuit and converts it into a digital code. Reference numeral 3 is a low-pass filter that receives the output of the A / D converter 2 and removes high frequency components. Reference numeral 4 is a minimum detection circuit which receives the output of the low-pass filter 3 and obtains the minimum value of the input video signal or noise signal. A pedestal detection circuit 5 receives the output of the low-pass filter 3 and obtains a pedestal level. Reference numeral 6 denotes a sync separation circuit that receives the output of the low-pass filter 3 and slices the sync signal by slice level input to perform sync separation. Reference numeral 7 is a sync signal detection circuit that receives the output of the sync separation circuit 6 and detects the presence or absence of a sync signal. Reference numeral 8 is an input of the output of the sync signal detection circuit 7, selects the output of the pedestal detection circuit 5 when there is a sync signal, and clamps the pedestal portion to a specified value, and when there is no sync signal, the minimum detection circuit. 4 is a clamp mode switching circuit that controls the clamp signal of the clamp circuit by switching the output of No. 4 and clamping the minimum value to a specified value.
Reference numeral 9 is an intermediate slice level generation circuit that receives the output of the pedestal detection circuit 5 and the output of the minimum detection circuit 4 to generate an intermediate level. Reference numeral 10 inputs the output of the intermediate slice level generating circuit 9 and a fixed value, and selects the output of the intermediate slice level generating circuit 9 at the time of synchronization by the output of the synchronizing signal detecting circuit 7, and selects the fixed value at the time of asynchronous. The slice level switching circuit is configured to set the slice level of the sync separation circuit by the output signal thereof.

Next, the operation will be described. In FIG. 1, a composite video signal is input to a clamp circuit 1 and clamped at a specified level. The output of the clamp circuit 1 is input to the A / D converter 2 and converted into a digital code. The output of the A / D converter 2 is input to the low-pass filter 3 to remove high frequency components, mainly noise and chroma signal components. The output of the low-pass filter 3 is input to the minimum detection circuit 4, and the minimum value of the input video signal or noise signal is obtained. The output of the low pass filter 3 is input to the pedestal detection circuit 5, and the pedestal level at the time of signal is obtained. The output of the low-pass filter 3 is input to the sync separation circuit 6, and the sync signal is sliced at the level set by the slice level input to separate the sync signals. The output of the sync separation circuit 6 is input to the sync signal detection circuit 7 to detect the presence or absence of the sync signal. The output of the sync signal detection circuit 7 is input to the clamp mode switching circuit 8, and when there is a sync signal, the output of the pedestal detection circuit 5 is selected to clamp the pedestal portion to a specified value, and when there is no sync signal. The clamp signal of the clamp circuit 1 is controlled by selecting the output of the minimum detection circuit 4 and switching the minimum value so as to clamp the minimum value. The output of the pedestal detection circuit 5 and the output of the minimum detection circuit 4 are input to the intermediate slice level generation circuit 9 to generate an intermediate level. The output of the intermediate slice level generation circuit 9 and a fixed value are input to a slice level switching circuit 10, and the output of the synchronization signal detection circuit 7 selects the output of the intermediate slice level generation circuit 9 at the time of synchronization and the fixed value at the time of asynchronous. Is selected, and the output signal sets the slice level of the sync separation circuit.

(Embodiment 2) In claim 2, as shown in FIG. 2, in the intermediate slice level generating circuit 9 of claim 1, instead of using the output of the pedestal detection circuit 5, a specified value is used, and the specified value is used. An intermediate slice level generating circuit 9 is used which inputs the value and the output of the minimum detecting circuit 4 and generates an intermediate level thereof.

Assuming that the pedestal level is fixed to a specified value which is the clamp circuit 1, the pedestal level is at a weak electric field or VCR.
Better results are obtained using the pedestal level when the pedestal level shows somewhat unstable movement, such as during playback of.

(Embodiment 3) FIG. 3 is a block diagram showing the configuration of the invention according to claim 3 of the present invention. A third aspect of the present invention shows a sync separation circuit which does not use the clamp mode switching circuit 8 of the synchronization signal detection circuit 7 of the first aspect and is composed of a clamp circuit which operates by the output of the pedestal clamp detection circuit even when there is no signal. In claim 1, the clamp circuit is also described to operate adaptively depending on the presence or absence of a signal, but it is clear that the adaptive sync separation circuit operates independently regardless of the clamp mode. is there.

[0013]

As described above, the clamp circuit for inputting the video signal and clamping by the clamp signal, and the A / C for inputting the output of the clamp circuit and converting it to the digital code.
A D converter, a low-pass filter that inputs the output of the A / D converter and removes high frequency components, a minimum detection circuit that inputs the output of the low-pass filter to obtain a minimum value, and a pedestal that inputs the output of the low-pass filter. A pedestal detection circuit for determining the level, a sync separation circuit for inputting the output of the low-pass filter and slicing the synchronization signal by slice level input, and an output of the sync separation circuit for inputting the presence or absence of the synchronization signal. Input the sync signal detection circuit for detection and the output of the sync signal detection circuit.When there is a sync signal, the output of the pedestal detection circuit is selected, and when there is no sync signal, the output of the minimum detection circuit is switched. A clamp mode switching circuit for controlling a clamp signal of the clamp circuit, and the pedestal. An output signal of the synchronization signal detection circuit, which receives the output of the output circuit and the output of the minimum detection circuit, generates an intermediate level, and an output of the intermediate slice level generation circuit and a specified value. According to this, when the sync signal is present, the output of the intermediate slice level generator is selected, when the sync signal is not present, the specified value is selected, and the output is used to set the slice level of the sync separation circuit. According to the configuration of the slice level switching circuit described above, it is possible to obtain an adaptive sync separation circuit that outputs a stable sync separation output even when there is no signal.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an invention according to claim 1 of the present invention.

FIG. 2 is a block diagram showing the configuration of the invention according to claim 2 of the present invention.

FIG. 3 is a block diagram showing the configuration of the invention according to claim 3 of the present invention.

FIG. 4 is a block diagram showing a conventional example.

[Explanation of symbols]

 1 Clamp Circuit 2 A / D Converter 3 Low Pass Filter 4 Minimum Detection Circuit 5 Pedestal Detection Circuit 6 Sync Separation Circuit 7 Sync Signal Detection Circuit 8 Clamp Mode Switching Circuit 9 Intermediate Slice Level Generation Circuit 10 Slice Level Switching Circuit

Claims (3)

[Claims] 1. A clamp circuit for inputting a video signal and clamping by a clamp signal, an A / D converter for inputting an output of the clamp circuit and converting it into a digital code, and an output of the A / D converter for inputting a high signal. A low-pass filter for removing band components, a minimum detection circuit for inputting the output of the low-pass filter to obtain a minimum value, a pedestal detection circuit for inputting the output of the low-pass filter to obtain a pedestal level, and an output of the low-pass filter The sync separation circuit performs the sync separation by slicing the sync signal with the slice level input, the sync signal detection circuit that inputs the output of the sync separation circuit and detects the presence or absence of the sync signal, and the output of the sync signal detection circuit. Input and select the output of the pedestal detection circuit when there is a sync signal, and when there is no sync signal A clamp mode switching circuit that controls the clamp signal of the clamp circuit by switching the output of the minimum detection circuit, and the output of the pedestal detection circuit and the output of the minimum detection circuit are input to generate an intermediate level. The intermediate slice level generating circuit, the output of the intermediate slice level generating circuit and a specified value are input, and the output signal of the synchronization detecting circuit selects the output of the intermediate slice level generator when there is a synchronizing signal. If not, do not select the default value,
An adaptive sync separation circuit comprising a slice level switching circuit connected so as to set the slice level of the sync separation circuit by its output. 2. The adaptive sync separation circuit according to claim 1, wherein the intermediate slice level generation circuit inputs a predetermined value and the output of the minimum detection circuit and generates an intermediate level thereof. 3. The clamp mode switching circuit is controlled by:
2. The adaptive sync separation according to claim 1, further comprising a microcomputer which receives the output signal of the sync signal detection circuit and the color killer status, calculates the output signal of the sync signal detection circuit and the color killer stator, and generates a control signal. circuit.