JPH0827463B2 - Active matrix panel - Google Patents

Description

The present invention relates to an active matrix panel.

[Conventional technology]

As an example of a conventional active matrix panel with a built-in driver, the reflective type is called "SID (S-Day) 8".
2 Digest P.48-49 Yamazaki et al. "
(S.I.D.) 84 Digest P.316 Both corners and others "
and so on.

FIG. 2 is an example of a circuit diagram of an active matrix panel with a driver using MOSFETs. A pixel area 31 is composed of data lines 36, 37, 38, scanning lines 39, 40, 41, and pixel transistors 48, 49, 50 provided at their intersections. Each pixel transistor has a pixel electrode, and liquid crystal capacitances between the pixel electrode and the counter electrode 54 are 51, 52, and 53.
32 is an X driver for driving the data lines 36, 37, 38, and 33 is a Y driver for driving the scanning lines 39, 40, 41.

[Problems to be solved by the invention]

However, the above-mentioned conventional techniques have the following problems. That is, it is not possible to know whether all outputs of the built-in driver are normal unless the panel state is set. In order to inspect in a substrate state, there is a method of extracting signals of all outputs of a driver with a probe card, but it is extremely difficult to apply a needle to hundreds to thousands of pads at a time.

Therefore, the present invention solves such a problem, and an object of the present invention is to realize an active matrix panel having a circuit that can easily check the output of a driver in a substrate state.

[Means for solving problems]

The active matrix panel of the present invention includes a plurality of pixel electrodes mounted on a substrate, a plurality of data lines that supply a data signal to the plurality of pixel electrodes, and a scanning signal to the plurality of pixel electrodes. A plurality of gate lines, a driver circuit that supplies an output to the plurality of data lines or the gate lines, a plurality of switching elements connected to the plurality of outputs of the driver circuit, and each output of the driver circuit Check common output terminal, and the check output of each output is output to the check common output terminal via the plurality of switching elements in accordance with each output of the driver circuit. .

In addition, the active matrix panel of the present invention supplies a plurality of pixel electrodes arranged on a substrate, a plurality of data lines that supply a data signal to the plurality of pixel electrodes, and a scanning signal to the plurality of pixel electrodes. A plurality of gate lines, a driver circuit for supplying an output to the plurality of gate lines, a plurality of switching elements connected to the output from the driver circuit and controlled by the output, and a plurality of switching circuits. A common input terminal for supplying an input signal to the element and a common output check terminal for each output of the driver circuit are provided, and according to each output of the driver circuit and the input signal from the input terminal, The check output of each output of the driver circuit is output to the check common output terminal via the plurality of switching elements.

Further, the active matrix panel of the present invention supplies a plurality of pixel electrodes arranged on a substrate, a plurality of data lines which supply a data signal to the plurality of pixel electrodes, and a scanning signal of the plurality of pixel electrodes. With multiple gate lines,
A driver circuit that supplies outputs to the plurality of data lines, a plurality of switching elements connected to the outputs from the driver circuits, a common input terminal for inputting a control signal to the plurality of switching elements, and the driver circuit A common output terminal for checking each output of the plurality of switching elements, the check output of each output of the driver circuit according to the output of the driver circuit and the control signal from the input terminal. It is output to the common output terminal for checking via.

[Action]

In the active matrix panel using the above configuration of the present invention, when the driver is operated, signals of all outputs of the driver can be taken out from the common electrode. Therefore, the driver can be easily inspected in the substrate state without assembling the panel.

[Embodiment 1] FIG. 1 is a circuit diagram of an active matrix panel incorporating a driver and its output check circuit, showing an embodiment of the present invention. This panel comprises a pixel area 1, an X driver 2 and its output check circuit 4, and a Y driver 3 and its output check circuit 5. The pixel area is composed of data lines 6, 7, 8 and scanning lines 9, 10, 11 and pixel transistors 18, 19, 20 arranged at their intersections. Each pixel transistor is provided with a pixel electrode, and capacitors 21, 22, and 23 via the liquid crystal are formed between the pixel transistor and the counter electrode 24. The X driver 2 has a function of sequentially selecting the data lines 6, 7, and 8 and writing image data. On the other hand, the X driver output check circuit 4 includes switching elements 12, 1
3, 14 and its control input 25 and output 26. The input signal that closes all switching elements is 25
When the X driver is operated in the state of being put in, the signal for one line of image data can be taken out from the output 26. If this signal has a discontinuous point or an abnormal voltage level, it can be understood that the operation of the column corresponding to the timing is defective.
The Y driver 3 also sequentially selects the scanning lines 9, 10 and 11, but since the output of the driver is a binary value of high and low, the switching elements 15, 16 and 17 which are controlled by this signal and their input / output. 27 and 28 form a Y driver check circuit. In this case, while the Y driver is operating, the check circuit also operates, but since the scanning lines do not short, the panel operation is not affected. When checking the Y side, input an appropriate signal to input 27 and output.
Make sure you get the same signal from 28.

Next, a specific inspection method will be described with reference to a configuration example of the output check circuit. FIG. 3 is a circuit diagram of the X driver output check circuit. 61 is a pixel array section, 62 is an X driver, and 63 is a Y driver. The X driver is a shift register using a CMOS clocked inverter, and an analog switch 68 that writes data from the video signal VID to the data lines 72, 73, 74, 75 according to the timing of its outputs 64, 65, 66, 67. , 69,70,71. The X driver output check circuit is composed of N-channel transistors 76, 77, 78 and 79 and three wirings TX1, TX2 and CX. The shift register in the X driver may be inspected by confirming that the start pulse XSP is output to the end pulse XEP at a timing delayed by a predetermined number of stages. If the shift register is operating normally, the X driver output check circuit is used to inspect for bit defects. The method will be described with reference to FIG. XSP and φX in the figure are voltage waveforms of the shift register start pulse and clock, respectively.
(A), (b), (c) and (d) are voltage waveforms of the outputs 64 to 67 of the respective stages of the shift register. When TX1 is set to high level and TX2 is set to low level and a signal such as (e) is input to VID, a signal on the data line in the odd number column appears in CX as shown in (f). Conversely, set TX1 to low and TX2 to high level, and
When a signal such as (g) is input to D, the signal of the data line in the even column appears in CX as shown in (h). This time,
If the voltage waveforms of (f) and (h) are regular, it means that there is no bit defect. If there are irregularities,
The defective address can be known from that timing.

FIG. 5 is a circuit diagram of the Y driver output check circuit. Reference numeral 81 is a pixel area portion, 82 is an X driver, and 83 is a Y driver. The Y driver output check circuit consists of N-channel transistors 87, 88 and 89 and two wirings TY and CY. FIG. 6 is a voltage waveform of each part of FIG. YSP, φ
Y is the start pulse and clock of the Y driver,
(A), (b), (c) correspond to the signals of the scanning lines 84, 85, 86. The inspection of the shift register section can be confirmed by the end pulse YEP as in the X side. Since the signal level of the scanning line has only two values of high and low, the transistors 87, 88 and 89 are turned on at the same time when the scanning line is selected. For example, when a signal such as (d) is input to TY, a signal such as (e) appears in CY. If this waveform is regular, it means that there are no bit defects.

[Embodiment 2] FIG. 7 is a circuit diagram of an X driver output check circuit showing a second embodiment of the present invention. 101 is the pixel area, 1
02 is an X driver and 103 is an X driver output check circuit. The difference from the first embodiment is that a CMOS transistor is used, and if TXH is set high and TXL is set low, the output can be checked for a video signal in a wide voltage range. If the output buffer of the X driver is composed of CMOS, it is better to use this embodiment.

[Embodiment 3] FIG. 8 is a circuit diagram of an active matrix panel with a built-in driver showing a third embodiment of the present invention. 111 is a pixel area, 112 is an X driver, 113 is a Y driver,
114 is an X driver output check circuit, and 115 is a Y driver output check circuit. The feature of this embodiment is that the output check circuit is composed of an array of diodes. Compared to transistors, it has the advantage of reducing wiring and the area occupied by circuits.

[Embodiment 4] FIG. 9 is a circuit diagram of an active matrix panel with a built-in driver showing a fourth embodiment of the present invention. The feature of this embodiment is that the drivers are arranged symmetrically and redundancy is provided so that one scanning line or data line can be driven by two drivers. That is, in the present embodiment, even if there is a driver output failure, if the driver on the opposite side of the same address is normal, the defective part can be cut by laser repair or the like to obtain a good product. In this embodiment, the correction can be made in this way, so that the yield is significantly improved. 121 is a pixel area, 122 and 123 are upper and lower X drivers, 126 and 127 are upper and lower X driver output check circuits, 1
24 and 125 are left and right Y drivers, 126 and 127 are left and right Y driver output check circuits, and the upper and lower and left and right drivers and check circuits are arranged symmetrically. Further, in this embodiment, since the check circuits for the upper and lower sides and the left and right sides of the pixel area are provided, it is possible to check disconnections and shorts in the pixel area, and to determine their addresses from the signal timing.

〔The invention's effect〕

As described above, in the active matrix panel of the present invention, the state of the substrate can be efficiently inspected before the panel is assembled, so that the working time can be shortened and the product cost can be reduced.

[Brief description of drawings]

Figure 1 is a circuit diagram of an active matrix panel with a built-in driver. Figure 2 is a circuit diagram of a conventional active matrix panel with a built-in driver. FIG. 3 is a circuit diagram of the X driver output check circuit. FIG. 4 is a diagram showing voltage waveforms of respective portions of FIG. FIG. 5 is a circuit diagram of the Y driver output check circuit. FIG. 6 is a diagram showing voltage waveforms at various portions in FIG. FIG. 7 is a circuit diagram of the X driver output check circuit. 8 and 9 are circuit diagrams of an active matrix panel with a built-in driver. 4,103,114,126,127 …… X driver output check circuit 5,115,128,129 …… Y driver output check circuit

Claims (3)

[Claims] 1. A plurality of pixel electrodes arranged on a substrate, a plurality of data lines configured to supply a data signal to the plurality of pixel electrodes, and a plurality configured to supply a scanning signal to the plurality of pixel electrodes. Gate line, a driver circuit that supplies an output to the plurality of data lines or the gate line, a plurality of switching elements connected to the plurality of outputs of the driver circuit, and a common for checking each output of the driver circuit An active matrix panel comprising: an output terminal, and a check output of each output is output to the check common output terminal via the plurality of switching elements according to each output of the driver circuit. 2. A plurality of pixel electrodes arranged on a substrate, a plurality of data lines for supplying a data signal to the plurality of pixel electrodes, and a plurality of for supplying a scanning signal to the plurality of pixel electrodes. Gate line, a driver circuit that supplies an output to the plurality of gate lines, a plurality of switching elements connected to the output from the driver circuit and controlled by the output, and an input signal to the plurality of switching elements. And a common output terminal for checking each output of the driver circuit, and in accordance with each output of the driver circuit and the input signal from the input terminal of the driver circuit, An active matrix panel, wherein the check output of each output is output to the check common output terminal via the plurality of switching elements. 3. A plurality of pixel electrodes arranged on a substrate, a plurality of data lines configured to supply a data signal to the plurality of pixel electrodes, and a plurality configured to supply a scan signal of the plurality of pixel electrodes. Gate line, a driver circuit that supplies an output to the plurality of data lines, a plurality of switching elements connected to the output from the driver circuit, and a common input terminal that inputs a control signal to the plurality of switching elements. And a common output terminal for checking each output of the driver circuit, the check output of each output of the driver circuit is provided in accordance with the output signal of the driver circuit and the control signal from the input terminal. An active matrix panel, which is output to the check common output terminal via the plurality of switching elements.