JP3444028B2 - Display semiconductor device and display device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type display device and a display semiconductor device used as a drive substrate incorporated therein. Specifically, in addition to the pixel electrode and the switching element that drives the pixel electrode, a peripheral drive circuit and a level conversion circuit that converts a low-level control signal input from the outside to a high level and supplies the high-level control signal to the drive circuit are provided on the same substrate. The present invention relates to a built-in display semiconductor device. More specifically, it relates to a diagnostic and inspection technique for a level conversion circuit.

[0002]

2. Description of the Related Art An active matrix type display device is composed of a drive substrate and a counter substrate which are bonded to each other through a predetermined gap, and an electro-optical material such as liquid crystal held in the gap. Pixel electrodes arranged in rows and columns and switching elements for writing image signals to the individual pixel electrodes are integrally formed on the drive substrate, and form a display semiconductor device.
This display semiconductor device includes a vertical drive circuit that operates according to a control signal and selects a switching element for each row, and a horizontal drive circuit that operates according to a control signal and supplies an image signal to the selected switching element. They are integrated and formed on the same substrate. Further, a level conversion circuit for converting a control signal input from the outside from a low level to a high level and supplying it to the vertical drive circuit and the horizontal drive circuit is also integrated and formed on the same substrate. The control signal is generated by an external timing generator IC or the like.

[0003]

At present, as the peripheral timing generator IC is being driven at a lower voltage, it is usual to mount a level conversion circuit on the drive substrate side of an active matrix type display device. The operation of the level conversion circuit will be briefly described with reference to FIG. (1) represents the static operation of the level conversion circuit. When the input voltage VIN exceeds a predetermined threshold voltage Vth, the output signal VOUT of the level conversion circuit switches from low level to high level.
(2) represents the dynamic operation of the level conversion circuit. For example, the control signal CKIN is input to the level conversion circuit from a timing generator IC that is driven by 3V. The level conversion circuit converts the low level input control signal CKIN into a high level output control signal CKOUT and supplies the high level output control signal CKOUT to the peripheral drive circuit built in the drive substrate. For example, the drive circuit is 15V
When operating with, the converted control signal CKOUT is VSS
It varies between (0V) and VDD (15V). That is,
3V level of the input control signal CKIN (input clock signal) is 1 of the output control signal CKOUT (output clock signal)
Converted to 5V level. By the way, in the thin film semiconductor device for display, in addition to the switching element for selecting the pixel electrode,
The drive circuit and the level conversion circuit are also composed of thin film transistors. Generally, since the threshold voltage of the thin film transistor varies, the threshold voltage Vth of the single-phase input level conversion circuit also varies. In practice, Vth of the level conversion circuit is normally distributed with a certain width with respect to Vth to be set in advance. Therefore, a low level (for example, 3V) control signal is set to a high level (for example, 15V).
In the case of conversion into the V) control signal, there is a possibility that a malfunction may occur for each drive substrate depending on the variation of Vth. For this reason, after the drive substrate and the counter substrate are joined to each other to assemble the active matrix type display panel, malfunction of the level conversion circuit or the like may be found and normal image display may not be obtained. That is, in the past, due to the variation in the threshold voltage of the thin film transistors, some defective products were generated in the display panel and the yield was deteriorated. Conventionally, there is no proper selection method for the variation of the threshold voltage of the level conversion circuit, and it is impossible to deal with the variation of the threshold voltage.

[0004]

Means for Solving the Problems In order to solve the above-mentioned problems of the conventional technique, the following means were taken. That is, the display semiconductor device according to the present invention has, as a basic configuration, pixel electrodes arranged in a matrix and switching elements for writing an image signal to each pixel electrode. In addition, a vertical drive circuit that operates according to a control signal to select a switching element for each row and a horizontal drive circuit that also operates according to a control signal and supplies an image signal to the selected switching element are built in the same substrate. ing. Further, a level conversion circuit that converts a control signal input from the outside from a low level to a high level and supplies it to the vertical drive circuit and the horizontal drive circuit is formed integrally on the same substrate. As a feature, thin film transistor
A built-in test circuit for diagnosing the operation of the level conversion circuit composed of the above is integrated on the same substrate, and the test circuit integrates the operation of a plurality of level conversion circuits provided for each control signal input from the outside. It includes a logic circuit for diagnosing,
Wherein the detection circuit performs a diagnosis by scanning and that level by applying a DC voltage to the level converting circuit, the level converter times
Depends on the variation in the threshold voltage of the thin film transistors that make up the path.
The operating range of the level converting circuit that exist to enable sorting further said test circuit includes means for switching the Diagnosis and the vertical drive circuit and a horizontal drive circuit of the level converting circuit, a diagnosis result common output terminal Output to.

A display device according to the present invention comprises a pair of substrates bonded to each other through a predetermined gap, and an electro-optical substance held in the gap. Pixel electrodes arranged in rows and columns and switching elements for writing image signals to the individual pixel electrodes are formed on one substrate. further,
The vertical drive circuit, horizontal drive circuit, and level conversion circuit are also integrally formed. The vertical drive circuit operates according to a control signal and selects a switching element for each row. The horizontal drive circuit also operates according to the control signal and supplies the image signal to the selected switching element. The level conversion circuit converts a control signal input from the outside from a low level to a high level and supplies the control signal to the vertical drive circuit and the horizontal drive circuit. A counter electrode is formed on the other substrate. One of the features is that the one substrate has a built-in inspection circuit, and the operation of the level conversion circuit composed of thin film transistors can be diagnosed in a state where both the substrates are joined, and the inspection circuit is input from the outside. Including a logic circuit that comprehensively diagnoses the operation of a plurality of level conversion circuits provided for each individual control signal
And the detection circuit applies a DC voltage to the level conversion circuit.
Add and scan the level to make a diagnosis
Variation in threshold voltage of thin film transistors that make up the conversion circuit
The operating range of the level conversion circuit depending on the
In addition, the inspection circuit further diagnoses the level conversion circuit and
Means for switching diagnosis of vertical drive circuit and horizontal drive circuit
Have, you diagnostic output to a common output terminal.

[0006]

According to the present invention, in the active matrix type display device equipped with the level conversion circuit, the inspection circuit for diagnosing the level conversion circuit is incorporated in the panel. Specifically, the inspection circuit can check the threshold voltage Vth of the level conversion circuit. Even after the panel is mounted, the Vth of the level conversion circuit can be measured. As a result, it becomes possible to select a panel adapted to different input levels of the control signal. Preferably, the output terminals for operation diagnosis of the vertical drive circuit and the horizontal drive circuit are also used so that the Vth of the level conversion circuit can be diagnosed (checked) in the switching mode.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a schematic plan view showing the overall configuration of a display device according to the present invention. As shown in the figure, this display device has a panel structure including a drive substrate 1 and a counter substrate 2 which are joined to each other with a predetermined gap. An electro-optical material such as liquid crystal is held in the gap between the substrates 1 and 2. A counter electrode is formed on the inner surface of the counter substrate 2.

On the other hand, row-shaped gate lines 3 and column-shaped data lines 4 are formed on the inner surface of the driving substrate 1. Pixel electrodes 5 arranged in a matrix and switching elements 6 for writing image signals to the individual pixel electrodes 5 are integrated at the intersections of the lines 3 and 4. The switching element 6 is composed of a thin film transistor, and its source electrode is connected to the corresponding data line 4, its drain electrode is connected to the corresponding pixel electrode 5, and its gate electrode is connected to the corresponding gate line 3. The drive substrate 1 further incorporates a vertical drive circuit 7, a horizontal drive circuit 8, a level conversion circuit 9, etc., and constitutes a so-called display semiconductor device. Each of the circuits 7, 8 and 9 described above is also composed of thin film transistors. The vertical drive circuit 7 operates according to a control signal such as a vertical start signal VST and vertical clock signals VCK and VCKX having mutually opposite phases, and selects the switching elements 6 for each row via the gate line 3. Specifically, the vertical drive circuit 7 is composed of a shift register, sequentially transfers VST according to VCK and VCKX, and outputs selection pulses to the gate line 3 line-sequentially. On the other hand, the horizontal drive circuit 8 is connected to the data line 4 via the image signal supply gate 10.
The image signal supply gate 10 has an image signal R for each of the three primary colors,
G and B are supplied. The horizontal drive circuit 8 uses the horizontal start signal HST and the horizontal clock signals HCK having opposite phases,
It operates according to a control signal such as HCKX to sequentially control the opening and closing of the image signal supply gate 10 to supply the image signals R, G and B to the selected switching element 6. In particular,
This horizontal drive circuit also consists of a shift register, and HCK,
The opening and closing of the image signal supply gate 10 is controlled by sequentially transferring HST according to HCKX. Level conversion circuit 9
Is a control signal VST, VCK, VCKX input from the outside by a timing generator IC (not shown) or the like.
Low level (eg 3V) for HST, HCK, HCKX, etc.
Is converted to a high level (for example, 15 V) and supplied to the vertical drive circuit 7 and the horizontal drive circuit 8. The drive board 1
On the exposed upper surface of VST, VCK, VCK
A plurality of terminals 11 for inputting X, HST, HCK, HCKX, R, G, B and the like are provided.

As a feature of the present invention, the inspection circuit 12 is built in the drive substrate 1 to diagnose the operation of the level conversion circuit 9. The inspection circuit 12 includes a logic circuit that comprehensively diagnoses the operation of the plurality of level conversion circuits 9 provided for each individual control signal. The inspection circuit 12 applies a DC voltage to the level conversion circuit 9 and scans the level to make a diagnosis, and an operating range (threshold voltage) of the level conversion circuit 9.
To be selectable. This inspection circuit has means for switching the diagnosis of the level conversion circuit 9 and the diagnosis of the vertical drive circuit 7 and the horizontal drive circuit 8, and outputs the diagnosis result to a common output terminal SOUT.
Output to. In addition, for switching control, a specific input terminal VSS
G is used.

FIG. 2 shows a concrete configuration example of the level conversion circuit 9. As shown in the figure, the level conversion circuit 9 has a CMOS structure in which an N-channel type thin film transistor and a P-channel type thin film transistor are combined. This operation is as shown in FIG. That is, as understood from the graph of (1) in FIG. 5, when the level of the input signal VIN exceeds the threshold voltage Vth, the level of the output signal VOUT switches from low to high. This output signal VOUT is taken out from the terminal A or B shown in FIG. As described with reference to (2) of FIG. 5, low level (for example, 3
The V) single-phase input clock signal CKIN is converted into a high-level (for example, 15V) output clock signal CKOUT by the level conversion circuit. The output clock signal CKOUT taken out from the terminal A or B in FIG. 2 has a positive phase relationship with the input clock signal CKIN.

FIG. 3 shows a first circuit of the inspection circuit 12 shown in FIG.
It is a schematic circuit diagram showing an example. This inspection circuit 12
Has a logic circuit configuration that comprehensively diagnoses, for example, nine level conversion circuits 1 to 9.
Each level conversion circuit has the configuration shown in FIG. Therefore, the level conversion circuit 1 to the level conversion circuit 9
The output signal from the terminal is taken from the terminal A or B shown in FIG.
The output signals of some of the level conversion circuits 1 to 9 are taken out through the two-stage inverters 51 and 52. In this way, the inverters 51, 5
2 is built in because the output signal of each level conversion circuit is blunted because the load becomes heavy, and a normal control signal (clock signal) is supplied to the scanner such as a horizontal drive circuit or a vertical drive circuit.
This is to avoid the risk of not being able to enter. Output signals from the level converting circuit 1 to the level converting circuit 9 are supplied to the NAND gate 53 at the previous stage. Level conversion circuit 1
The output signal of the level conversion circuit 9 is also supplied to the NOR gate 54. The output terminal of the NAND gate 53 is connected to the input terminal of the subsequent NAND gate 55. NOR gate 5
The output terminal of No. 4 is connected to the other input terminal of the NAND gate 55 in the subsequent stage via the inverter 56. The NAND gate 55 outputs the diagnosis result to the output terminal SOUT.

The diagnostic operation of the inspection circuit 12 will be described in detail with reference to FIG. First, each level conversion circuit 1 to
The direct current signal VIN is applied to the input terminal of 9. For example, when the level of the DC input signal VIN is scanned and set to 3V, the output of each level conversion circuit becomes high (15V), while when VIN is set to 0V, the output of each level conversion circuit becomes low (0V). If so, it means that the normal level conversion operation is performed. Here, all the level conversion circuits 1 to 9 have 3
When VIN of V is input, all level conversion circuits 1 to 9
If the output of is operated high, a high level appears at the output terminal of the NAND gate 55. Conversely, 0V VIN
When all the level conversion circuits 1 to 9 output low when all the level conversion circuits 1 to 9 are input at the same time,
The output terminal of NAND gate 55 goes high.

However, it is assumed that, for example, the level conversion circuit 3 has an operation abnormality and malfunctions at a low level when VIN of 3V is input. That is, the output level of the level conversion circuit 3 becomes low, and the output levels of the other level conversion circuits become high. Therefore, the output terminal SOUT of the NAND gate 55 becomes low. Similarly, when VIN of 0V is input, if any one of the plurality of level conversion circuits 1 to 9 malfunctions in which the output level becomes high, the output terminal SOUT becomes low. That is, SOUT becomes high only when all the level conversion circuits 1 to 9 operate normally, and any one of
If any one malfunctions, SOUT goes low. In this way, the inspection circuit 12 shown in FIG. 3 has a logic circuit configuration for comprehensively diagnosing the operation of the plurality of level conversion circuits. In the above-mentioned diagnosis, the input signal VIN is set to 0V and 3V.
Although the inspection was performed by switching between V, the present invention is not limited to this. For example, each level conversion circuit 1 to
By applying a DC voltage to 9 and scanning its level for diagnosis, the operating range (threshold voltage range) of the level conversion circuit can be selected as the entire panel.

FIG. 4 is a circuit diagram showing a second embodiment of the inspection circuit. The inspection circuit configuration shown in FIG. 3 is included as a whole, and corresponding parts are designated by corresponding reference numerals to facilitate understanding. This inspection circuit includes level conversion circuits 1 to
The gate circuit 60 is included as a means for switching the diagnosis of 9 and the diagnosis of the vertical drive circuit 7 and the horizontal drive circuit 8 (scanner section), and outputs the diagnosis result to the common output terminal SOUT. In other words, it is possible to check the Vth of the level conversion circuits 1 to 9 in the switching mode by using the output terminal SOUT for checking the scanner section originally provided in the conventional display panel. Here, the terminal VSSG is used as the switch input in the switching mode. This terminal VSS
G is a terminal that supplies a ground level (0 V) to the gate line, and is not connected to the scanner unit at all. That is, since the terminal is irrelevant to the operation of the scanner unit, there is no problem in operation even if it is used for switch input in the switching mode. VSS is used as the switching input terminal in the switching mode.
The terminal is not limited to G, and any terminal irrelevant to the operation of the scanner unit may be used. A block HOUT included in the scanner section represents a check output signal node of the horizontal drive circuit 8. The block VLOUT represents an output signal check node provided in the left vertical drive circuit 7. Further, the block VROUT represents a check node for the output signal of the vertical drive circuit 7 on the right side.
Further, the three-stage VS / R connected to VROUT via the two-stage inverter is provided so that the output timings of the right side vertical drive circuit and the left side vertical drive circuit are shifted so that they can be individually diagnosed. In this inspection circuit configuration, when a low-level switch input is applied to the terminal VSSG,
The diagnosis is performed in the normal mode, and the signal waveform output from the scanner unit is obtained at SOUT. On the other hand, when a high level switch input is applied to VSSG, the level conversion circuit switches to the Vth diagnostic mode. That is, similarly to the inspection circuit of FIG. 3, when SOUT goes high, it is determined that all the level conversion circuits 1 to 9 are operating normally, and SO
If the UT is at low level, abnormal operation will be indicated.

[0015]

As described above, according to the present invention, the display semiconductor device is constructed by incorporating the inspection circuit for diagnosing the operation of the level conversion circuit on the same substrate. By supplying a DC level input signal to each level conversion circuit,
The operation of each level conversion circuit can be easily diagnosed, and the inspection process can be significantly shortened. In addition, the diagnosis result can be used to make a selection according to the Vth of the level conversion circuit even after the panel is mounted.

[Brief description of drawings]

FIG. 1 is a schematic plan view showing a configuration of a display device according to the present invention.

FIG. 2 is a circuit diagram showing a circuit configuration example of a level conversion circuit.

FIG. 3 is a circuit diagram showing a first embodiment of an inspection circuit.

FIG. 4 is a circuit diagram showing a second embodiment of the inspection circuit.

FIG. 5 is a waveform diagram provided for explaining a general operation of the level conversion circuit.

[Explanation of symbols]

1 drive board 2 Counter substrate 3 gate lines 4 data lines 5 pixel electrodes 6 switching elements 7 Vertical drive circuit 8 Horizontal drive circuit 9 level conversion circuit 10 Image signal supply gate 11 terminals 12 Inspection circuit

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI G09G 5/00 G01R 31/28 V (58) Fields surveyed (Int.Cl. ⁷ , DB name) G01R 31/00 G01R 31 / 28 G02F 1/133 550 G09G 3/20 G09G 3/36 G09G 5/00

Claims (2)

(57) [Claims] 1. A pixel electrode arranged in a matrix, a switching element for writing an image signal to each pixel electrode, a vertical drive circuit which operates according to a control signal and selects the switching element for each row, and a control signal. A horizontal drive circuit that operates according to the above and supplies an image signal to the selected switching element;
A display semiconductor device in which a level conversion circuit for converting a control signal input from the outside from a low level to a high level and supplying it to a vertical drive circuit and a horizontal drive circuit is integrally formed on the same substrate, and is composed of a thin film transistor. that the test circuit for diagnosing the operation of the level conversion circuit built on the same substrate, the test circuit, overall operation of a plurality of level conversion circuit provided for each individual of the control signal input from outside look including a logic circuit diagnosis, the inspection circuit, a DC voltage is applied to the level converter
Also, the level is scanned to make a diagnosis, and the level is converted.
For variations in the threshold voltage of the thin film transistors that make up the circuit
The operation range of the dependent level conversion circuit can be selected, and the inspection circuit diagnoses the level conversion circuit and performs the vertical drive.
Having means for switching diagnosis of the circuit and the horizontal drive circuit,
A display semiconductor device characterized by outputting a diagnostic result to a common output terminal . 2. Pixel electrodes arranged in a matrix, switching elements for writing image signals to individual pixel electrodes, vertical drive circuits that operate according to control signals and select switching elements row by row, and according to control signals. A horizontal drive circuit that operates and supplies an image signal to the selected switching element, and a level conversion circuit that converts a control signal input from the outside from a low level to a high level and supplies it to the vertical drive circuit and the horizontal drive circuit A display device including: one substrate that is integrally formed in an integrated manner; the other substrate that has a counter electrode and is bonded to the one substrate through a predetermined gap; and an electro-optical material held in the gap. Te, wherein one of the substrates is possible to diagnose the operation of the level conversion circuit including the thin film transistors in a state of being bonded built and, the two substrates the test circuit, the test circuit, Overall look including a logic circuit for diagnosing the operation of a plurality of level conversion circuit provided for each individual control signal input from parts, the test circuit, a DC voltage is applied to the level converting circuit
Also, the level is scanned to make a diagnosis, and the level is converted.
For variations in the threshold voltage of the thin film transistors that make up the circuit
The operation range of the dependent level conversion circuit can be selected, and the inspection circuit diagnoses the level conversion circuit and performs the vertical drive.
Having means for switching diagnosis of the circuit and the horizontal drive circuit,
A display device that outputs diagnostic results to a common output terminal .