JPH08265154A - A/d converter - Google Patents

Abstract

PURPOSE: To attain highly accurate conversion with simple configuration. CONSTITUTION: An adjustment circuit 13 gives an analog signal obtained by converting a prescribed digital signal to an A/D conversion section 12. When the A/D conversion section 12 converts the analog signal into high-order and low-order digital signals and provides an output of them, the adjustment circuit 13 uses them for address signals and stores the prescribed digital signal to a correction memory 7 as error correction data. When the A/D conversion section 12 converts an external analog signal into high-order and low-order digital signals and provides an output of them, they are used for address signals and error correction data stored in the address are outputted from the correction memory 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital converter, and more particularly to an analog / digital converter capable of performing highly accurate analog / digital conversion with a relatively simple structure and easily adjusting conversion accuracy and conversion characteristics. / Related to digital converter.

[0002]

2. Description of the Related Art An analog signal such as an image signal is transmitted by 10b.
A sub-range type (sub-ranging system) analog-to-digital converter is known as an analog-to-digital conversion system for converting a digital signal at high speed with an accuracy of it or higher.

FIG. 8 is an explanatory view of a conventional technique and shows an example of a conventional sub-range type analog / digital converter.
In FIG. 8, an input signal, which is an analog signal, is input to a higher-order analog / digital conversion circuit 101, converted into, for example, a 7-bit digital signal, and output. As a result, the upper digit of the data is obtained. The converted output of the analog / digital conversion circuit 101 is input to the addition circuit 102 and the digital / analog conversion circuit 103.

The digital / analog conversion circuit 103 is
Convert the input digital signal into an analog signal,
Input to one terminal of the differential amplifier 104. On the other hand, the input signal which is an analog signal is input to the sample / hold circuit 1
After being held at 05, it is input to the other terminal of the differential amplifier 104.

The differential amplifier 104 obtains the difference between the analog signal obtained from the digital / analog conversion circuit 103 and the analog signal held in the sample / hold circuit 105, amplifies the difference to, for example, a value of 64 times, and lowers it. Input to the analog / digital conversion circuit 106. The analog / digital conversion circuit 106 converts the input analog signal into, for example, a 7-bit digital signal and outputs it. This determines the lower digit of the data. This converted output is input to the adder circuit 102.

The adder circuit 102 adds a high-order digit and a low-order digit, which are 7-bit digital signals output from the high-order and low-order analog / digital conversion circuits 101 and 106, by a predetermined operation, for example, 12-bit.
Output as a digital signal of. This 12-bit digital signal is the result of analog / digital conversion.

[0007]

In the above-mentioned sub-range type analog / digital converter, the flash type analog / digital conversion circuit 101 obtains the upper digit of the data and restores the upper digit to an analog value. The difference from the original input analog signal is amplified, the lower digit of the data is obtained by the flash type analog / digital conversion circuit 106, and a digital output is obtained by adding these.

In this system, what is important is the conversion accuracy of the digital / analog conversion circuit 103. That is, the conversion accuracy of the digital / analog conversion circuit 103 directly determines the overall accuracy of the analog / digital converter. For example, the digital / analog conversion circuit 1
03, the analog / digital conversion circuit 101
The 7-bit digital signal, which is the conversion output of, is converted into an analog signal.
Should be as accurate as the output from. Therefore, in this case, conversion accuracy of 12 bits or more is required. If the conversion accuracy of the digital / analog conversion circuit 103 is 12 bits or less, the difference between the conversion output of the digital / analog conversion circuit 103 and the original input analog signal largely deviates from the original value, and the difference from the addition circuit 102 is increased. The output contains a large quantization error.

On the other hand, the above-mentioned sub-range type analog / digital converter is a system of repeating the analog / digital conversion twice for one analog signal taken in at a certain time, and therefore the premise of the second analog / digital conversion. Therefore, the digital / analog conversion circuit 103 must perform digital / analog conversion at high speed.

As can be seen from the above, the digital / analog conversion circuit 103 is required to have the performance of performing the digital / analog conversion with a predetermined high accuracy and at a high speed. For this reason, the relatively inexpensive integration type digital / analog conversion circuit has a slow conversion speed, so that
It cannot be used as the analog conversion circuit 103.
It should be noted that the price of the digital / analog conversion circuit may be considered to be proportional to its conversion speed and conversion accuracy. Therefore, at present, for example, the digital / analog conversion circuit 103 is configured by a ladder-type (ladder network) resistance type or binary weight resistance type digital / analog conversion circuit capable of high-speed conversion, and the The necessary precision is achieved by laser trimming the internal resistance.

However, the ladder-type resistance type digital / analog conversion circuit itself is more expensive than the integral type digital / analog conversion circuit, and a device and a process for laser trimming are required. analog/
There is a problem that the price of the digital converter becomes expensive. Further, there is a problem that the adjustment of the conversion accuracy of the digital / analog conversion circuit 103 by laser trimming or the like is troublesome. Further, when trimming failure of the internal resistance of the IC occurs, sufficient conversion accuracy cannot be obtained and the analog / digital converter cannot be used in a product.

Apart from the above, according to the conventional analog / digital converter, it is difficult to change the analog / digital conversion characteristic once it is set. In particular, if the internal resistance of the IC was laser-trimmed in order to obtain high accuracy as described above, this could not be changed. Therefore, it is not possible to obtain high conversion accuracy while changing the analog / digital conversion characteristic to a desired characteristic.

The present invention is an analog / digital converter capable of highly accurate analog / digital conversion with a relatively simple structure.
It is an object to provide a digital converter. Also,
An object of the present invention is to provide an analog / digital converter whose conversion accuracy can be easily adjusted.

Another object of the present invention is to provide an analog / digital converter whose conversion characteristic can be easily changed.

[0015]

FIG. 1 is a principle block diagram of the present invention, showing the configuration of an analog / digital converter according to the present invention. This analog / digital converter stores a sub-range type analog / digital converter 12 which converts an input analog signal into upper and lower digital signals and outputs the same, and stores error correction data corresponding to the sub-range type analog / digital converter 12 at a predetermined address. A correction memory 7, and an adjustment circuit 13 for forming an address signal of the correction memory 7 for storing the error correction data in the analog / digital converter 12.
The input of the analog / digital converter 12 is adjusted by the adjusting circuit 13
A switch SW is provided for switching between an analog signal output from the device or an external analog signal input from the outside.

The adjusting circuit 13 switches the switch SW to convert the analog signal obtained by converting a predetermined digital signal into an analog / digital signal in a state where the input of the analog / digital converting section 12 is the analog signal from the adjusting circuit 13. Input to the digital conversion unit 12. The analog / digital converter 12 converts the input analog signal from the adjusting circuit 13 into upper and lower digital signals and outputs the digital signals. The adjusting circuit 13 uses the upper and lower digital signals output by the analog / digital converting unit 12 according to the input from the adjusting circuit 13 as address signals, and corrects a predetermined digital signal which is the source of the analog signal for error correction. The data is stored in the correction memory 7 at the corresponding address.

With the digital signal which is the error correction data stored in the correction memory 7, the adjustment circuit 13 switches the switch SW to change the analog / digital conversion unit 1.
Switch the input of 2 to the external analog signal. analog/
The digital conversion unit 12 converts the input external analog signal from the outside into upper and lower digital signals and outputs the digital signals. The correction memory 7 uses the upper and lower digital signals output by the analog / digital converter 12 in response to the input of the external analog signal as address signals,
The error correction data stored at the address is output.

[0018]

When a digital signal reflecting the conversion characteristic of the analog / digital converter 12 with respect to the input analog signal is input to the correction memory 7 as an address signal, the correction memory 7 outputs the error correction signal stored at that address. Output.

If the analog signal formed by the adjusting circuit 13 from a predetermined digital signal is equal to the actual input analog signal, the output of the correction memory 7 becomes a digital signal corresponding to the input analog signal. Therefore,
As the output of the correction memory 7, that is, the output of the analog / digital converter, a digital signal obtained by converting the input analog signal with high accuracy can be obtained.

As described above, in the analog / digital converter of the present invention, the analog / digital converter 12 is used.
The conversion accuracy of is not dominant. Therefore, it is not necessary to raise the conversion accuracy of the digital / analog conversion, which is a prerequisite for the second analog / digital conversion for one analog signal. For example, in the conventional analog / digital converter, the addition circuit 10 is used as the conversion accuracy.
The conversion accuracy of 12 bits or more, which is the same accuracy as the output from 2, was required, but under the same conditions, the conversion accuracy of 8 bits is sufficient according to the present invention.

Therefore, according to the present invention, it is not necessary to increase the conversion accuracy of the digital / analog conversion in the analog / digital conversion unit 12, so that the digital / analog conversion circuit has a relatively simple structure and is inexpensive. You can Further, it is not necessary to adjust the conversion accuracy by laser trimming or the like for realizing a predetermined high conversion accuracy, and the digital / analog conversion circuit can be made inexpensive accordingly.

On the other hand, since the processing of converting the predetermined digital signal into the analog signal in the adjusting circuit 13 does not follow the conversion of the actual external analog signal, the operation speed thereof may be slow. Therefore, a relatively inexpensive integration type digital / analog conversion circuit can be used.

Furthermore, by changing the error correction signal stored in the correction memory 7, it is possible to easily change the analog / digital conversion characteristic and obtain high conversion accuracy.

[0024]

FIG. 2 is a block diagram of an embodiment, showing an analog / digital converter. This analog / digital converter comprises an analog / digital converter 12, a correction memory 7, an adjusting circuit 13, and a switch SW.

Such an analog / digital converter is used, for example, in a color scanner to obtain a color gradation signal of an image signal which is an input analog signal. Therefore, the input analog signal is an actual image signal input from the image signal reading unit of the scanner to the analog / digital conversion unit 12, and the output of the analog / digital conversion unit 12 is sent to the image signal processing unit (CPU) of the scanner. Color gradation signal.

The analog / digital converter 12 is a circuit that actually performs analog / digital conversion, and is configured as, for example, one IC. The analog / digital converter 12 is basically the same as the conventional analog / digital converter (excluding the adder circuit 102) shown in FIG. 8 except that the conversion accuracy of the digital / analog converter circuit 3 is not dominant. It has the same configuration.

The analog / digital converter 12 has a flash type analog / digital converter 1, a digital / analog converter 3, a differential amplifier 4 including an operational amplifier, a sample / hold circuit 5, etc. It is composed of a flash type analog / digital conversion circuit 6. The analog / digital conversion circuits 1 and 6 take in an analog signal and perform digital conversion in synchronization with an operation clock supplied from the image signal processing unit of the scanner. The sample / hold circuit 5 captures and outputs an analog signal in synchronization with an operation clock supplied from the image signal processing unit of the scanner.

The upper analog / digital conversion circuit 1 converts an input signal, which is an analog signal, into a 7-bit digital signal and outputs it. As a result, the correction memory 7
The upper address of the address signal of is obtained. Therefore, the output of the higher-order analog / digital conversion circuit 1 is not the final output of the analog / digital conversion but an intermediate output for obtaining this. The converted output of the analog / digital conversion circuit 1 is input to the digital / analog conversion circuit 3.

The digital / analog conversion circuit 3 converts the input digital signal into an analog signal and inputs the analog signal into one terminal of the differential amplifier 4. Here, since the digital / analog conversion circuit 3 is required to have a high conversion speed, it is constituted by a ladder resistance type or binary weight resistance type digital / analog conversion circuit. Since it is not dominant in this analog / digital converter, a certain degree of accuracy is sufficient.
The digital / analog conversion circuit 3 is of a current source type.

For example, the output from the correction memory 7 is 1
To obtain a digital signal with a conversion accuracy of 2 bits or more,
It is not necessary to have the same accuracy as in the conventional case, but it is sufficient to have a conversion accuracy of 8 bits (conversion accuracy of 2/3).

This makes it unnecessary to adjust the conversion accuracy by trimming or the like. That is, as in the above-mentioned conventional example, 1
In order to realize the conversion accuracy of 2 bits, the variation in the resistance value of the resistor must be within a range in which a signal having a value of 1/4096 of the full range can be reproduced. Since such high accuracy cannot be guaranteed due to variations in the manufacture of ICs, it is essential to actually incorporate it in a circuit and then trim the resistor to adjust the conversion accuracy. On the other hand, if the conversion accuracy is 8 bits, it suffices that the variation in the resistance value is within a range in which a signal having a value of 1/256 of the full range can be reproduced. If the resistance has such accuracy, I
Since it can be built in C, it is not necessary to adjust the conversion accuracy by trimming or the like.

On the other hand, the input signal, which is an analog signal, is held in the sample / hold circuit 5, and then the differential amplifier 4
Input to the other terminal of. The difference amplifier 4 obtains a difference between the analog signal obtained from the digital / analog conversion circuit 3 and the analog signal held in the sample / hold circuit 5, amplifies this difference to, for example, 64 times, and outputs the lower analog / Input to the digital conversion circuit 6. The analog / digital conversion circuit 6 converts the input analog signal into, for example, a 7-bit digital signal and outputs it. As a result, the lower address of the address signal of the correction memory 7 is obtained. Therefore, the output of the lower analog / digital conversion circuit 1 is not the final output of the analog / digital conversion but an intermediate output for obtaining this.

In this embodiment, the total 14-bit signal from the analog / digital conversion circuits 1 and 6 is used as it is as a 14-bit address signal instead of the conventional calculation of 12-bit signal.
Thereby, the conversion accuracy can be improved.

The adjusting circuit 13 is a circuit for performing error correction processing (calibration processing) on the converted output and storing the error correction signal (error correction data) in the correction memory 7. The adjustment circuit 13 includes a digital / analog conversion circuit 8 and an MPU (micro processing unit).
9, input / output buffers 10 and 11.

The MPU 9 controls the analog / digital converter and sets it to either the adjustment mode (calibration mode) or the analog / digital conversion mode. For this purpose, the MPU 9 controls the switch SW. Further, the MPU 9 performs processing (adjustment processing or calibration processing) of storing the error correction signal in the correction memory 7 in the adjustment mode. For this purpose, the MPU 9 controls the adjustment circuit 13 and the correction memory 7. Specifically, the MPU 9 sends a predetermined digital signal to the digital / analog conversion circuit 8, and the input / output buffer 1
The predetermined digital signal is written to a predetermined address of the correction memory 7 via 0 and 11. This correction memory 7
In writing the predetermined digital signal to the
The PU 9 uses the digital signal (intermediate output) converted and output by the analog / digital converter 12 as the address signal.

The digital / analog conversion circuit 8 is an MPU.
The predetermined digital signal output from 9 is converted into an analog signal and output. This analog signal is sent to the analog / digital conversion circuit 1 and the sample / sample via the switch SW.
It is input to the hold circuit 5 and used to obtain a digital signal (intermediate output) in the analog / digital converter 12.

Therefore, this analog signal is a reference analog signal (reference voltage) for obtaining the address signal of the correction memory 7, and is also a pseudo external analog signal formed from a digital signal having a known value. is there. Therefore, the adjustment circuit 13 or the digital / analog conversion circuit 8
Is a reference voltage generation circuit or a pseudo analog signal generation circuit.

Here, the digital / analog conversion circuit 8
Is a circuit used only in the adjustment mode, and is not used in the actual analog / digital conversion mode. That is, it is not necessary to have such a high conversion speed as to follow a high speed analog signal such as an image signal. Therefore,
The digital / analog conversion circuit 8 can be configured by a well-known integral type digital / analog conversion circuit.

On the other hand, the conversion accuracy of the digital / analog conversion circuit 8 must be equal to or higher than the final output of analog / digital conversion. For example, the correction memory 7
When a digital signal having a conversion accuracy of 12 bits or more is obtained as an output from the same, a conversion accuracy of 12 bits equivalent to this is required. This is because a predetermined digital signal input to the digital / analog conversion circuit 8 is stored in the correction memory 7
This is because it is stored as the final output of the analog / digital conversion.

Since the digital / analog conversion circuit 8 is composed of an integral type digital / analog conversion circuit, such high conversion accuracy can be realized without adjusting the conversion accuracy by trimming or the like.

The input / output buffers 10 and 11 are bidirectional buffers controlled by the MPU 9. The input / output buffer 10 is an address buffer connected to the address bus and the address input terminal of the correction memory 7. The input / output buffer 11 is a data buffer connected to the data bus and the data input / output terminal of the correction memory 7.

The correction memory 7 stores the analog / digital conversion data (error correction signal) whose error has been corrected, is a readable / writable memory, and is composed of, for example, an SRAM. The output of the analog / digital converter 12 is supplied to the address bus of the correction memory 7 as an address signal. An error correction signal is output to the data bus of the correction memory 7. This is the final output of the analog / digital conversion.

The switch SW is means for switching the input of the analog / digital converter 12 to either an analog signal such as an actual image signal or a reference analog signal from the adjusting circuit 13. Switching of the switch SW is MPU
Controlled by 9. The switch SW is an analog switch, and is composed of, for example, a MOSFET that operates in analog.

The switch SW is turned on to the side a when the analog / digital converter 12 actually performs an analog / digital conversion process for converting an analog signal such as an image signal into a digital signal. That is, this is the case in the analog / digital conversion mode. The switch SW is turned on to the side b when the MPU 9 performs the adjustment process using the reference analog signal prior to the analog / digital conversion process. That is, this is the case in the adjustment mode.

Next, the adjustment process will be described with reference to FIG. First, the switch SW is set to b by the MPU 9.
It is thrown into the side. That is, the adjustment mode is set. As a result, the reference analog signal A output from the adjustment circuit 13
_ref is input to (the analog / digital conversion circuit 1 of) the analog / digital conversion unit 12 via the switch SW. At this point, no data is written in the correction memory 7.

In the adjustment circuit 13, the MPU 9 inputs the digital signal X _ref having a predetermined value to the digital / analog conversion circuit 8. This digital signal X _ref
Is, for example, 12-bit data. The digital / analog conversion circuit 8 converts the input digital signal X _ref into a reference analog signal A _ref and outputs it. The reference analog signal A _ref is input to the analog / digital conversion unit 12 via the switch SW.

On the other hand, the MPU 9 stores the digital signal X _ref input to the digital / analog conversion circuit 8 in the input / output buffer 11. The digital signal X _ref in the input / output buffer 11 is data for writing to a predetermined address of the correction memory 7.

In the analog / digital conversion section 12, the reference analog signal A _ref is input to the higher-order analog / digital conversion circuit 1, converted into, for example, a higher-order 7-bit digital signal Y _ref (1), and output.
As a result, the upper digit of the address of the correction memory 7 is obtained.
The output of the analog / digital conversion circuit 1 is the correction memory 7
It is sent to the upper 7 bits of the address bus.

Here, in the adjustment process, the correction memory 7 is set at the output timing of the analog / digital conversion circuit 1.
Is not activated. The output of the analog / digital conversion circuit 1 is taken into the upper 7 bits of the input / output buffer 10. At this timing, the MPU 9 controls the correction memory 7 not to be active, and controls the input / output buffer 10 to capture the output in the upper 7 bits.

The converted output Y _ref (1) of the analog / digital conversion circuit 1 is input to the input / output buffer 10 and also input to the digital / analog conversion circuit 3. The digital / analog conversion circuit 3 converts the input digital signal Y _ref (1) into an analog signal,
Input to one terminal of the differential amplifier 4. On the other hand, the input signal A _ref, which is the reference analog signal, is held in the sample / hold circuit 5 and then input to the other terminal of the difference amplifier 4.

The differential amplifier 4 obtains the difference between the analog signal obtained from the digital / analog conversion circuit 3 and the reference analog signal A _ref held in the sample / hold circuit 5, and amplifies this to a value of 64 times, for example. Then, it is input to the lower analog / digital conversion circuit 6. The analog / digital conversion circuit 6 converts the input analog signal into, for example, the lower 7-bit digital signal Y _ref (2) and outputs it. As a result, the lower digit of the address of the correction memory 7 is obtained. The output Y _ref (2) of the analog / digital conversion circuit 1 is sent to the lower 7 bits of the address bus.

Here, in the adjustment processing, the correction memory 7 is not activated at the output timing of the analog / digital conversion circuit 6 as in the above case. analog/
The output Y _ref (2) of the digital conversion circuit 6 is taken into the lower 7 bits of the input / output buffer 10. MPU9 is
At this timing, the correction memory 7 is controlled so as not to be activated, and the input / output buffer 10 outputs the output Y.
It controls so that _ref (2) is taken into the lower 7 bits. As a result, a 14-bit address signal Y _ref is obtained.

The MPU 9 writes the data in the correction memory 7, following the capture of the output Y _ref (2) of the analog / digital conversion circuit 6. First, MPU9
A predetermined control signal is sent to the control bus (not shown) to activate the correction memory 7 and set it in the write mode. Then, MPU 9 sends an output from the analog / digital converter 1 and 6 stored in the output buffer 10 Y _ref (1) and Y _{re f} (2) to the address bus. These are the outputs for the same digital signal X _ref . The MPU 9 uses these as the address signal Y _ref to access the correction memory 7. Next, MPU9
Sends out the 12-bit digital signal X _ref previously stored in the input / output buffer 11 onto the data bus and supplies it to the data input / output terminal of the correction memory 7. As a result, the digital signal X _ref is written in the address Y _ref of the correction memory 7.

As a result of the above adjustment processing, the digital signal X _ref is written in the correction memory 7 as a signal corresponding to the address signal Y _ref . Here, the digital signal X
_ref is a known value. The address signal Y _ref is a signal that reflects the characteristics of the digital / analog conversion circuit 8 and the analog / digital conversion unit 12 (excluding the correction memory 7).

FIG. 4 shows an adjustment processing flow executed by the MPU 9. The MPU 9 sets the switch SW to the b side (S1). MPU 9 is digital / analog conversion circuit 8
Input signal X _ref (X in the figure) of digital value "0"
(S2).

The MPU 9 receives the input signal X_refDigital /
Input to the analog conversion circuit 8 (S3). With this,
MPU9 is signal X_refWrite to I / O buffer 11
Mu. Digital / analog conversion circuit 8 receives input signal X_ref
To convert analog signal A _refAnalog / digital
When input to the converter 12, the upper and lower analogs
/ Digital conversion circuits 1 and 6 have two signals Y
_ref(1) and Y_refOutput (2). MPU9 is this
Two signals Y_ref(1) and Y_refEnter (2) sequentially
It is taken into the force buffer 10 (S4). This will
Signal Y_refIs obtained in the input / output buffer 10.

The MPU 9 uses one reference analog signal A
two signals Y _ref corresponding to _ref (1) and Y
_At the timing when _ref (2) is obtained, the correction memory 7 is set to the write mode, the correction memory 7 is accessed, and the signal X _ref in the input / output buffer 11 is written to the address Y _ref (S5).

The MPU 9 checks whether or not the signal X _ref is equal to the maximum value of the input range of the analog / digital converter (S6). If they are not equal, MPU9 outputs signal X
The value of _ref is incremented by "+1" (S7) and S3 and subsequent steps are repeated.
If they are equal, the MPU 9 ends the adjustment process.

As described above, for example, the value of the 12-bit reference voltage signal X _ref is sequentially incremented from "0" to the maximum value, and the adjustment processing is performed in the entire input range of the analog / digital conversion unit 12. As a result, all the values of the reference voltage signal X _ref and the digital signal Y in which the circuit characteristics of the analog / digital converter 12 are applied to the reference analog signal A _ref in the entire input range.
Can be associated with _ref . This correspondence is linear. Therefore, a linear conversion characteristic is set in the correction memory 7. That is, in the entire input range, analog /
The influence of the conversion characteristic of the digital conversion unit 12 can be eliminated, and accurate (linear) analog / digital conversion can be performed.

Further, in S3, the digital signal X _ref
Since the MPU 9 controls the timing (the cycle of repeating S3) set in the digital / analog conversion circuit 8, this can be a sufficiently long time. This can be easily realized by setting the control program of the MPU 9 as such.

Next, the actual analog / digital conversion processing performed using the correction memory 7 will be described with reference to FIG. The switch SW is turned on to the side a by the MPU 9. That is, the analog / digital conversion mode is set. As a result, the input signal A _out, which is an external analog signal such as an image signal, is input to the analog / digital conversion unit 12 via the switch SW.

During the period in the analog / digital conversion mode, the MPU 9 disconnects the input / output buffers 10 and 11 from the address bus and the data bus of the correction memory 7 and supplies a predetermined control signal to the correction memory 7. Read mode.

In the analog / digital conversion unit 12, the input analog signal A _out is input to the higher-order analog / digital conversion circuit 1, converted into, for example, a 7-bit digital signal Y _out (1) and output. As a result, the upper digit of the address of the correction memory 7 is obtained. The conversion output Y _out (1) of the analog / digital conversion circuit 1 is
It is input to the correction memory 7 and also to the digital / analog conversion circuit 3.

The digital / analog conversion circuit 3 converts the input digital signal Y _out (1) into an analog signal and inputs it to one terminal of the differential amplifier 4. on the other hand,
The input signal A _out, which is an analog signal, is held in the sample / hold circuit 5 and then input to the other terminal of the differential amplifier 4.

The differential amplifier 4 includes an analog signal obtained from the converted output of the analog / digital conversion circuit 1 and a sample / sample signal.
The difference with the analog signal A _out held in the hold circuit 5 is obtained, this is amplified to a value of 64 times, for example, and input to the lower analog / digital conversion circuit 6. The analog / digital conversion circuit 6 converts the input analog signal into, for example, a 7-bit digital signal Y _out (2) and outputs it. As a result, the lower digit of the address of the correction memory 7 is obtained. This converted output Y _out (2) is input to the correction memory 7.

The correction memory 7 is a 7-bit output from the upper and lower analog / digital conversion circuits 1 and 6.
The digital signal Y _out (1) and Y _out (2), respectively, by using a higher digit and lower digit of the address signal, and outputs the data X _out of 12bit stored in the address Y _out.

If the conversion result Y _out in the analog / digital converter 12 is equal to the signal Y _ref , the address Y _out of the correction memory 7 is Y _out = Y _ref , and the digital signal X _{out is} output as the output of the correction memory 7. =
Get X _ref . The conversion result Y _out is a value that reflects the conversion characteristics of the analog / digital conversion unit 12, and if this is equal to the signal Y _ref , the original external analog signal A
_out is equal to the analog signal A _ref within the range of conversion accuracy of the analog / digital converter 12. Since the analog signal A _ref is a signal obtained by analog-converting the digital signal X _ref with a conversion accuracy of 12 bits, it means that the original digital signal is accurately obtained with the conversion output X _out = X _ref . Therefore, accurate (linear) analog / digital conversion can be performed.

The digital signals Y _out (1) and Y
_The signal output from the correction memory 7 at the time of switching _out (2) is invalidated on the scanner side. For example, the digital signal Y _out (1) is switched to that for the second external analog signal A _out ,
_{If out} (2) is still for the first external analog signal A _out , an error correction signal at an undesired address is output. The output timing of this undesired signal can be known from the cycle of the analog / digital conversion processing in the analog / digital conversion unit 12 of the external analog signal A _out (operation clock of the analog / digital conversion circuits 1 and 6). Therefore, the scanner side (C
PU) invalidates this undesired signal.

Next, another embodiment of the present invention will be described with reference to FIGS. In the above-described embodiment, a linear analog /
Although this is an example of performing digital conversion, this embodiment is an example of performing non-linear analog / digital conversion by performing gamma correction using the correction memory 7. The gamma correction is for correcting the analog / digital conversion characteristic of the image signal from a linear characteristic to a predetermined non-linear characteristic so as to faithfully reproduce the halftone and / or the dark portion in the actual image.

First, the MPU 9 stores the digital signal X _ref corresponding to the predetermined address Y _ref of the correction memory 7 in the same manner as in the above-described embodiment, and once obtains the linear analog / digital conversion characteristic. In this state, MPU9
Performs gamma correction on the digital signal at each address, and builds a gamma correction processing unit 14 in the correction memory 7 as shown in FIG.

For this purpose, the MPU 9 reads a digital signal from a predetermined address of the correction memory 7 and sets the read digital signal to the maximum value (maximum value of the input range) of the digital signal in the correction memory 7 being "1". Normalize to Further, the MPU 9 obtains the power of 1 / γ of this normalized value. The value of γ is given in advance according to the nonlinear characteristic to be constructed. Then, the MPU 9 stores the value obtained by squaring again in the original address.

As a result, the gamma correction processing unit 14 is apparently constructed in the correction memory 7. That is, the correction memory 7
It is possible to obtain a result equivalent to reading out the linear conversion characteristic stored in, and performing gamma correction processing on the scanner side for output.

When the external analog signal A _out is input to the analog / digital converter 12, the correction memory 7 is accessed by the address signal Y _out according to the external analog signal A _out , and the digital signal stored at the address is output. As for this digital signal, the external analog signal A _out is the signal A _ref.
Is a signal obtained by gamma-correcting the digital signal X _ref .

As a result, for example, the gradation of the dark part of the image signal, which is an input analog signal, can be made larger than the value at the time of input, and that part can be made brighter to bring it closer to the actual image. Thus, in this embodiment, a gamma-corrected signal can be obtained without providing a gamma correction circuit on the scanner side.

FIG. 6 shows a gamma correction processing flow executed by the MPU 9. The MPU 9 sets the address signal Y of the correction memory 7 to "0" (S11). The MPU 9 uses the address signal Y to access the address Y of the correction memory 7 to read the data stored at the address Y,
This data is gamma-corrected by a predetermined calculation and stored in the address Y (S12). MPU9
However, it is checked whether the address signal Y is equal to the maximum address of the correction memory 7 (S13).

If they are not equal, the MPU 9 increases the value of the address signal Y by "+1" (S14) and repeats S12 and thereafter. If they are equal, the MPU 9 ends the correction process. Note that such processing is not limited to gamma correction processing,
Various other correction processes may be performed. Further, such processing may be executed in the factory of the maker, and after the data is written in the correction memory 7 so that the analog / digital conversion characteristic becomes linear and shipped, the user realizes the desired conversion characteristic. May be performed to

Next, still another embodiment of the present invention will be described with reference to FIG. Although the above-described embodiment is an example in which the analog / digital converter 12 and the correction memory 7 as well as the adjusting circuit 13 and the switch SW are provided as the analog / digital converter, this embodiment uses an analog / digital converter. Only the analog / digital converter 12 and the correction memory 7 are used, and another adjustment circuit 13 and a switch SW are provided.
Is an example in which is omitted.

The MPU 9 and the digital / analog conversion circuit 8 and the switch SW which constitute the adjusting circuit 13 are necessary only during the above-mentioned adjusting process and gamma correction process. That is, it is necessary only for adjusting the conversion characteristics of the analog / digital converter. So MP
U9, digital / analog conversion circuit 8, switch SW
Is adjusted and then removed to form an analog / digital converter including only the analog / digital converter 12 and the correction memory 7.

Therefore, in this embodiment, the correction memory 7 is composed of a non-volatile memory, for example, an EEPROM (electrically erasable read-only memory) 7A. As a result, predetermined data can be written during the adjustment processing and the gamma correction processing, and the written data can be held thereafter, and the conversion operation in the analog / digital converter can be sufficiently followed.

In this embodiment, the analog / digital converter is mounted on, for example, one board (printed circuit board) to form the ADC board 15. This A
As shown, the DC board 15 has an analog signal input terminal c, a digital signal (14-bit) output terminal d output from the analog / digital converter 12, and an EEP.
An output terminal e for the digital signal (12 bits) output from the ROM 7A is provided. Output terminal e of EEPROM 7A
Is the converted output of the analog / digital converter. Therefore, the external analog signal to the analog / digital converter is directly input to the c terminal shown in FIG.

On the other hand, in this embodiment, the MPU 9, the digital / analog conversion circuit 8 and the switch SW, which are removed after the adjustment, are also mounted on one board, and the adjustment jig 1 is used.
It is assumed to be 6. As shown in the figure, the adjusting jig 16 has an external analog signal input terminal f connected to the a terminal of the switch SW and an analog signal output terminal g connected to the a terminal or the b terminal via the switch SW. , An address signal input / output terminal h, and a conversion output input / output terminal i.

In the adjustment process using the adjustment jig 16,
As shown, terminals c, d and e of the ADC board 15
Are connected to terminals g, h and i of the adjusting jig 16, respectively. Then, the switch SW is connected to the b terminal side to perform adjustment processing and / or gamma correction processing. After that, the switch SW is connected to the terminal a side, and an external analog signal is supplied to the terminal f of the adjustment jig 16 to test whether the ADC board 15 operates properly. This test is executed by the MPU 9, for example. The terminal f of the adjustment jig 16 is omitted and A
The operation test of the DC board 15 may be omitted.

The adjusting jig 16 is repeatedly used for adjusting a plurality of analog / digital converters (ADC board 15) as shown in the figure. As a result, one adjustment jig 1
6 can be shared as an analog / digital converter, and the manufacturing cost thereof can be reduced.

[0084]

As described above, according to the present invention,
By storing the error correction signal at a predetermined address of the correction memory in the analog / digital converter, the input analog signal can be converted with high accuracy without being affected by the conversion accuracy of the digital / analog conversion in the analog / digital converter. Since the digital signal can be obtained, the digital / analog conversion circuit can be made relatively simple and inexpensive, and conversion precision adjustment by laser trimming or the like can be eliminated. Further, since the operation speed of the digital / analog conversion circuit of the adjustment circuit may be slow, a relatively inexpensive integral type digital / analog conversion circuit can be used, and further, the error correction signal of the correction memory is changed. Thus, the analog / digital conversion characteristic can be easily changed.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a configuration diagram of an embodiment.

FIG. 3 is an explanatory view of an embodiment.

FIG. 4 is an adjustment processing flow.

FIG. 5 is a configuration diagram of another embodiment.

FIG. 6 is a gamma correction processing flow.

FIG. 7 is a configuration diagram of another embodiment.

FIG. 8 is an explanatory view of a conventional technique.

[Explanation of symbols]

 1, 6 Analog / digital conversion circuit 3 Digital / analog conversion circuit 4 Difference amplifier 5 Sample / hold circuit 7 Correction memory 7A Non-volatile correction memory 8 Digital / analog conversion circuit 9 MPU 10, 11 Input / output buffer 12 Analog / digital conversion Part 13 Adjustment circuit 14 Gamma correction processing part 15 ADC board 16 Adjustment jig SW switch

Claims (4)

[Claims] 1. A sub-range type analog / digital conversion unit for converting an input analog signal into upper and lower digital signals and outputting the digital signal, and a correction memory for storing error correction data corresponding thereto at a predetermined address. An adjusting circuit for forming an address signal of the correction memory for storing error correction data in the analog / digital converting section; and an input of the analog / digital converting section is an analog signal output from the adjusting circuit, or A switch for switching to an external analog signal input from the outside is provided, and the adjustment circuit switches the switch to make an input of the analog / digital conversion unit an analog signal from the adjustment circuit and convert a predetermined digital signal. The obtained analog signal is input to the analog / digital conversion unit, and The log / digital conversion unit converts the input analog signal from the adjustment circuit into upper and lower digital signals, and outputs the upper and lower digital signals. The adjustment circuit outputs the analog / digital conversion unit according to the input from the adjustment circuit. The upper and lower digital signals output as the address signals are used as address signals, and the predetermined digital signals which are the basis of the analog signals are stored as error correction data at the addresses of the correction memory, The switch is switched to switch the input of the analog / digital conversion unit to an external analog signal, and the analog / digital conversion unit converts the input analog signal from the outside into upper and lower digital signals and outputs the converted signal. The memory is configured such that the analog / digital converter receives an external analog signal. Output by the upper and lower digital signal using as an address signal, an analog / digital converter and outputting the error correction data stored in the address. 2. The adjustment circuit reads the error correction data stored at a predetermined address of the correction memory,
The analog / digital converter according to claim 1, wherein a predetermined calculation is performed on the error correction data to correct it, and the corrected error correction data is stored in a predetermined address of the correction memory. 3. A sub-range type analog / digital converter for converting an input analog signal into upper and lower digital signals and outputting the analog signal, and an input of the analog signal obtained by converting a predetermined digital signal as the analog signal. A non-volatile correction in which the upper and lower digital signals converted and output by the digital / digital conversion unit are used as address signals, and the predetermined digital signal that is the source of the analog signal is stored as error correction data at the address. A memory, the analog / digital converter converts an external analog signal input from the outside into upper and lower digital signals, and outputs the upper and lower digital signals. The upper and lower digital signals output according to the input are used as address signals The analog / digital converter is characterized by outputting the error correction data stored at the address. 4. An analog / digital conversion section for converting an input analog signal into a digital signal and outputting the digital signal, and an analog / digital conversion section for converting an input of the analog signal obtained by converting a predetermined digital signal. And a correction memory that stores the predetermined digital signal that is the source of the analog signal as error correction data at the address using the output digital signal as an address signal. The input external analog signal is converted into a digital signal and output, and the correction memory uses the digital signal output by the analog / digital conversion unit according to the input of the external analog signal as an address signal to An analog that outputs stored error correction data / Digital converter.